IRFIZ44NPbF
HEXFET® Power MOSFET
PD - 94836
S
D
G
VDSS = 55V
RDS(on) = 0.024Ω
ID = 31A
lAdvanced Process Technology
lIsolated Package
lHigh Voltage Isolation = 2.5KVRMS
lSink to Lead Creepage Dist. = 4.8mm
lFully Avalanche Rated
lLead-Free
TO-220 FULLPAK
Parameter Typ. Max. Units
RθJC Junction-to-Case  3.3
RθJA Junction-to-Ambient  65
Thermal Resistance
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
11/13/03
Description
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 31
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 22 A
IDM Pulsed Drain Current  160
PD @TC = 25°C Power Dissipation 45 W
Linear Derating Factor 0.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy 210 mJ
IAR Avalanche Current 25 A
EAR Repetitive Avalanche Energy4.5 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 srew 10 lbfin (1.1Nm)
Absolute Maximum Ratings
°C/W
IRFIZ44NPbF
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55   V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆T
JBreakdown Voltage Temp. Coefficient  0.055  V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance   0.024 ΩVGS = 10V, ID = 17A
VGS(th) Gate Threshold Voltage 2.0  4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 17   S VDS = 25V, ID = 25A
  25 µA VDS = 55V, VGS = 0V
  250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage   100 VGS = 20V
Gate-to-Source Reverse Leakage   -100 nA VGS = -20V
QgTotal Gate Charge   65 ID = 25A
Qgs Gate-to-Source Charge   12 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge   27 VGS = 10V, See Fig. 6 and 13 
td(on) Turn-On Delay Time  7.3  VDD = 28V
trRise Time  69  ID = 25A
td(off) Turn-Off Delay Time  47  RG = 12Ω
tfFall Time  60  RD = 1.1Ω, See Fig. 10 
Between lead,
  6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance  1300  VGS = 0V
Coss Output Capacitance  410  VDS = 25V
Crss Reverse Transfer Capacitance  150   = 1.0MHz, See Fig. 5
C Drain to Sink Capacitance  12   = 1.0MHz
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance  
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
pF
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 470µH
RG = 25Ω, IAS = 25A. (See Figure 12)
t=60s, =60Hz
ISD ≤ 25A, di/dt ≤ 320A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Uses IRFZ44N data and test conditions
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode)   showing the
ISM Pulsed Source Current integral reverse
(Body Diode)   p-n junction diode.
VSD Diode Forward Voltage   1.3 V TJ = 25°C, IS = 17A, VGS = 0V
trr Reverse Recovery Time  65 98 ns TJ = 25°C, IF = 25A
Qrr Reverse RecoveryCharge  160 240 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
A
S
D
G
31
160
IRFIZ44NPbF
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTO M 4. 5V
20µs PULSE WIDTH
T = 25°C
C
A
4.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
A
4.5V
20µs PULSE WIDTH
T = 175°C
C
1
10
100
1000
45678910
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
A
V = 25V
20µs PULSE WIDTH
DS
T = 175°C
J
0.0
0.5
1.0
1.5
2.0
2.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 41A
D

TJTJ
IRFIZ44NPbF
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
500
1000
1500
2000
2500
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 10203040506070
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 13
V = 44V
V = 28V
DS
DS
I = 25A
D
1
10
100
1000
0.5 1.0 1.5 2.0 2.5 3.0
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
IRFIZ44NPbF
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150 175
0
5
10
15
20
25
30
35
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFIZ44NPbF
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
0
100
200
300
400
500
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
I
TOP 10A
18A
BOTTOM 25A
Starting T , Junction Temperature (°C)
V = 25V
D
DD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 13b. Gate Charge Test Circuit
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
tp
VDS
IAS
VDD
V(BR)DSS
10 V
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
Fig 13a. Basic Gate Charge Waveform
IRFIZ44NPbF
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRFIZ44NPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Data and specifications subject to change without notice.
TO-220 Full-Pak Part Marking Information
WITH ASSEMBLY
E XAMP L E : T H IS IS AN IR F I840G
LOT CODE 3432
AS S EMB L E D ON WW 24 1999
IN THE ASSEMBLY LINE "K"
PART NUMBER
LOT CODE
AS S E M B L Y
INT E R NAT IONAL
RECTIFIER
LOGO
34 32
924K
IR F I840G
DAT E CODE
YE AR 9 = 1999
WE E K 24
LINE K
Note: "P" in assembly line
position indicates "Lead-Free"
TO-220 Full-Pak Package Outline
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/