International Rectifier HEXFET Power MOSFET @ Dynamic dv/dt Rating @ Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirements Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low PD-9.374G IRF640 Voss = 200V . Rps(on) = 0.1 8Q s Ib = 18A on-resistance and cost-effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter Max. Units Ip @ Te = 25C Continuous Drain Current, Ves @ 10 V 18 : Ip @ Tc = 100C | Continuous Drain Current, Vas @ 10 V "1 A Jom Pulsed Drain Current 72 Pp @ Tc = 25C | Power Dissipation 125 Ww Linear Derating Factor 1.0 WPGC Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy 580 mJ EG Avalanche Current 18 A Ear Repetitive Avalanche Energy 13 mJ dv/dt Peak Diode Recovery dv/dt_ @ 5.0 Vins Ty Operating Junction and -55 to +150 Tsta Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case) | Mounting Torque, 6-32 or M3 screw 10 Ibfsin (1.1 Nem) Thermal Resistance Parameter Min. Typ. Max. Units Reic Junction-to-Case _ _ 1.0 Recs Case-to-Sink, Flat, Greased Surface _ 0.50 C/W Raia dunction-to-Ambient _ =_ 62 215IRF640 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Viprypss Drain-to-Source Breakdown Voltage 200 | + V_ | Ves=0V, Ip= 250A AVierpss/ATy| Breakdown Voltage Temp. Coefficient | 0.29 | | VC | Reference to 25C, Ip= 1mA Poston) Static Drain-to-Source On-Resistance = | 0.18 | Q | Vas=10V, lb=11A @ Vesith) Gate Threshold Voltage 2.0 4.0 V__| Vos=Ves, Ip= 250A Ots Forward Transconductance 6.7 _ _ S| Vos=50V, Ip=11A @ Ipss Drain-to-Source Leakage Current = = = HA Oe oy T)2125C less Gate-to-Source Forward Leakage _ | 100 nA Vag=20V Gate-to-Source Reverse Leakage - | -100 Vas=-20V Qg Total Gate Charge _ - 70 Ip=18A Qgs Gate-to-Source Charge -|- 13 | nC | Vps=160V Qga Gate-to-Drain ("Miller") Charge _ _ 39 Ves=10V See Fig. 6 and 13 tavon) Turn-On Delay Time _ 14 _ Vop=100V t Rise Time 1 ns (p=18A tavott) Tum-Off Delay Time = 45 = Rg=9.12 tr Fall Time _ 36 _ Rp=5.4Q See Figure 10 Lo Internal Drain Inductance _ 45 _ So pad } J nH | from package (ea Ls Internal Source Inductance |75] and center of die contact 8 Ciss Input Capacitance {| 1300} Ves=0V Coss Output Capacitance a | om | 430 | PF. | Vps=25V Crss Reverse Transfer Capacitance _ 130 | f=1,0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Ig Continuous Source Current |_| 4 MOSFET symbol (Body Diode) A showing the Ism Pulsed Source Current _ _ 72 integral reverse @ (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ 2.0 V_ | Tu=25C, Is=18A, Vas=0V tr Reverse Recovery Time | 300; 610 | ns | Ty=25C, Ip=18A Qn Reverse Recovery Charge - 3.4 | 7.1 pC | di/dt=100A/us @ ton Forward Tum-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) @ Vop=50V, starting Ti=25C, L=2.7mH Ra@=25Q, las=18A (See Figure 12) Isps18A, di/dts150A/us, Vpp 000 5 > QD oO 1500 5 o o 1000 D 3 Oo 500 2 > FOR TEST CIACUIT SEE FIGURE 13 409 104 1 30 Vps, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage @ a E required las DUT : 7 Vpp = s E las > 1 5 0.012 5 00 = Fig 12a. Unclamped Inductive Test Circuit 3 500 oO 2 S 400 wn 2 Wi 200 Vos 25 50 73 4100 125 150 Starting Ty, Junction Temperature(C) las -- Fig 12c. Maxinium Avalanche Energy . . Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator , ~~ Same Type as D.UT. 4] Io. Fe | q | 50KQ lev IT... I | I pF | bts 4 Ves 3mA LIL Charge - le * pb Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1509 Appendix C: Part Marking Information See page 1516 international Appendix E: Optional Leadforms See page 1525 Rectifier 220