TD62C805F TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TD62C805F 48BIT THERMAL HEAD DRIVER The TD62805F is a general purpose 48bit driver IC consisting of 8 block 8bit shift register and 48bit drivers (Open Drain). This device is best suited as a 48 dot thermal printer head drivers. FEATURES 8bit parallel input and 6 block 8bit shift register CMOS compatible input. High driverability ********** 30 V / 100 mA / ch Built in monostable multivibrator for head protection 16 steps gray scale operating with 4bit data 48bit open drain outputs Package ************************** PFP-80 pin Weight: 1.53 g (Typ.) 1 2001-07-05 TD62C805F PIN CONNECTION (TOP VIEW) 2 2001-07-05 TD62C805F BLOCK DIAGRAM 3 2001-07-05 TD62C805F PIN FUNCTION PIN No. PIN NAME FUNCTION 24 CLK 25 WRITE*CLK 37 RESET 28~36 DATA1~8 26 OUT / PWM 38 PWM 39 COUNTER*CLOCK 40 OUT* E 42 E *CLK 41 WRITE* E 43 MMV / E 22 MO ON / OFF monitor terminal of output OF8 23, 44 VDD Supply voltage terminal for control logic VSS (O) GND terminals for driver PIN No. : 2, 3, 12, 21, 45, 54, 63, 64, 73 27, 32 VSS (L) GND terminals for control logic " " : Data shift "H" : enable clock signal, "L" : disable clock signal pull-up input terminal "L" : all outputs "OFF", reset PWM counter reset PWM counter and MMV circuit Pull-up input terminal Input terminals for output data "H" : output "ON", "L" : output "OFF" And input terminals for PWM data "H" : enable output data for shift register "L" : enable PWM data for counter "L" : output enable (PWM operating) Input terminal for clock of PWM counter and for trigger of MMV "L" : all outputs "ON" " " : outputs "OFF" when OUT*E is "High". Outputs "ON" when OUT*E is "Low". Pull-up input terminal "H" : enable E-CLK signal pull-up input terminal CR connection terminal for MMV 4 2001-07-05 TD62C805F (1) Data Input D1~D6 of Input Dates are entered to shift Register by the clock signal with the timing of rise. Outputs are latched by holding the WRITE*CLK "Low" or to stop the clock signal. PWM Data (DATA1~4) are latched by OUT / PWM signal "Low". (2) Output Enable Outputs become "OFF" at the first rising edge of E*CLK after the OUT*E to "High", and become "ON" at the first rising edge of E*CLK after the OUT*E to "Low". Output ON / OFF duty is controlled by controlling OUT*E signal directly or to change the timing of WRITE*E and E*CLK. 5 2001-07-05 TD62C805F (3) PWM Control Outputs ON / OFF duty are controlled by OUT* E and PWM DATA of D1~D4 PWM control is performed by comparing the internal 4bit PWM Counter out and PWM DATA of D1~D4. For example, when PWM DATA is 7, 50% Output Duty is obtained. (Refer to tables below.) PWM DATA 0 1 2 3 4 5 6 7 8 9 Duty (%) 0 6.25 12.50 18.75 25.00 31.25 37.50 43.75 50.00 56.25 PWM DATA A B C D E F Duty (%) 62.50 68.75 75.00 81.25 87.50 100.00 6 2001-07-05 TD62C805F MMV OPERATION MMV output of Q becomes "L" when the MMV / E voltage becomes less than Vref (L) after the first rising edge of INTERNAL CLOCK. And becomes "H" when the MMV / E voltage above Vref (H) after re-charging of external capacitance connect to MMV / E. The external capacitance and Resistor connect to MMV / E control MMV Output "ON" period. So Output Load is protected from burn-out. It's required enough discharging time of external capacitance. (Refer to figure below) Pulse width of MMV 7 2001-07-05 TD62C805F INPUT CIRCUIT 1. DATA1~8, CLK, COUNTER*CLK, OUT / PWM , OUT* E 2. E *CLK, RESET , WRITE* E , WRITE*CLK 3. PWM OUTPUT CIRCUIT 1. OA1~ 8 ~ OF1~ 8 8 2001-07-05 TD62C805F MAXIMUM RATINGS (Ta = 25C) CHARACTERISTIC SYMBOL RATING UNIT Supply Voltage VDD 7 V Output Voltage VDS 30 V Output Current IDS 100 mA / ch Input Current IIN 5 mA Input Voltage VIN -0.4~VDD0.4 V Power Dissipation Free Air On PCB (Note) 1.0 PD W 1.3 Operating Temperature Topr -40~85 C Storage Temperature Tstg -55~150 C Note: On Glass Epoxy PCB (100 x 100 x 1.6 mm, Cu 40%) RECOMMENDED OPERATING CONDITIONS (Ta = -40~85C) CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT Output Voltage VDS 26 V Supply Voltage VDD 4.5 5.5 V Duty 50% 33.3 Duty 80% 26.4 Duty 100% 23.6 GND VDD V 5 MHz 50 ns 20 ns Output Current IDS Input Voltage VIN Operating Clock Frequency fCLK Clock Pulse Width tw Data Set-Up Time tsetup Data Hold Time thold Duty 50% COUNTER*CLK CLK 9 mA /ch 2001-07-05 TD62C805F ELECTRICAL CHARACTERISTICS (Ta = 25C, VDD = 5.5 V) SYMBOL TEST CIR- CUIT TEST CONDITION MIN TYP. MAX UNIT "H" Level VIH 3.5 VDD + 0.4 V "L" Level VIL -0.4 1.5 WRITE*CLK E *CLK, RESET WRITE* E IINH VIN = 0 V, VDD = 5 V -34 -70 -145 PWM IINL VIN = 5 V, VDD = 5 V 34 70 145 Output Voltage VDS OA1~OF8 IDS = 80 mA 960 IDS = 50 mA 600 Output On Resistor RON IDS = 50 mA 12.0 Output Leak Current IOZ VDS = 30 V 10 A Quiescent Current IDD 20 A IDDopr 5 A CHARACTERISTIC Input Voltage Input Current Operating Supply Current VDD = 5 V, fCLK = 5MHz Output OPEN 10 A mV 2001-07-05 TD62C805F SWITCHING CHARACTERISTICS (VDD = 5.5 V, VDS = 26 V, Ta = 25C) CHARACTERISTIC SYMBOL TEST CONDITION MIN TYP. MAX UNIT fMAX Duty 50% 10 MHz CLK- OUTn , WRITE*CLK- OUTn 80 RESET - OUTn 100 Maximum Operating Clock Frequency Propagation Delay Time "L"-"H" COUNTER, CLK-OUTn (Note) OUT* E - OUTn , WRITE* E - OUTn E *CLK- OUTn 110 100 130 60 100 90 OUT* E - OUTn , WRITE* E - OUTn E *CLK- OUTn 70 MMV / E - OUTn 80 Duty 50% VIN (H) = 4.5 V VIN (L) = 0 V RL = 375 CL = 15 pF MMV / E - OUTn CLK- OUTn , WRITE*CLK- OUTn RESET - OUTn Propagation Delay Time "H"-"L" tpLH COUNTER, CLK-OUTn (Note) Minimum Clock Pulse Width tpHL ns tw 25 DATA-OUT / PWM Data Set Up Time DATA-CLK tsetup 10 thold 10 tr 1 tf 1 tor 0.02 1 tof 0.05 0.4 tMMV 3 OUT* E - E *CLK DATA-OUT / PWM Data Hold Time DATA-CLK OUT* E - E *CLK Maximum Rise Time Maximum Fall Time Output Rise Time Output Fall Time COUNTER*CLK CLK COUNTER*CLK CLK OUTn MMV Pulse Width Note: s ms COUNTER DATA = F PRECAUTIONS for USING This IC does not integrate protection circuits such as overcurrent and overvoltage protectors. Thus, if excess current or voltage is applied to the IC, the IC may be damaged. Please design the IC so that excess current or voltage will not be applied to the IC. Utmost care is necessary in the design of the output line, VCC and GND line since IC may be destroyed due to short-circuit between outputs, air contamination fault, or fault by improper grounding. 11 2001-07-05 TD62C805F PACKAGE DIMENSIONS QFP80-P-1420-0.80C Unit: mm Weight: 1.53 g (Typ.) 12 2001-07-05 TD62C805F RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 13 2001-07-05