P2040C September 2005 rev 1.4 LCD Panel EMI Reduction IC Features system wide reduction of EMI of all clock dependent signals. The P2040C allows significant system cost FCC approved method of EMI attenuation. Provides up to 15dB of EMI suppression savings by reducing the number of circuit board layers and Generates a low EMI spread spectrum clock of the shielding that are traditionally required to pass EMI input frequency regulations. 50MHz to 170MHz input frequency range Optimized for 54MHz, 65MHz, 81MHz, 140MHz, and 162MHz pixel clock frequencies Internal loop filter minimizes external components and board space The P2040C uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all-digital method. The 8 selectable spread ranges, up to 2.2% P2040C modulates the output of a single PLL in order to SSON# control pin for spread spectrum enable and "spread" the bandwidth of a synthesized clock and, more disable options importantly, decreases the 2 selectable modulation rates harmonics. This result in a significantly lower system EMI Low Cycle-to-cycle jitter 3.3V Operating Voltage Ultra low power CMOS design Supports most mobile graphic accelerator and LCD compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called `spread spectrum clock generation'. timing controller specifications Available in 8 pin SOIC and TSSOP Packages peak amplitudes of its Applications Product Description The P2040C is a selectable spread spectrum frequency modulator designed specifically for digital flat panel applications. The P2040C reduces electromagnetic The P2040C is targeted towards digital flat panel applications for Notebook PCs, Palm-size PCs, Office Automation Equipments and LCD Monitors. interference (EMI) at the clock source which provides Block Diagram SR0 SR1 MRA SSON# VDD PLL Modulation CLKIN Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS Alliance Semiconductor 2575 Augustine Drive * Santa Clara, CA * Tel: 408.855.4900 * Fax: 408.855.4999 * www.alsc.com Notice: The information in this document is subject to change without notice. P2040C September 2005 rev 1.4 Pin Configuration CLKIN 1 8 VDD MRA 2 7 SR0 SR1 3 6 ModOUT VSS 4 5 SSON# P2040C Pin Description Pin# Pin Name Type 1 CLKIN I External reference frequency input. Connect to externally generated reference signal. 2 MRA I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor. 3 SR1 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 4 VSS P Ground to entire chip. Connect to system ground. Description 5 SSON# I Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 6 ModOUT O Spread spectrum Clock Output. 7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 8 VDD P Power supply for the entire chip. Modulation Selection (Commercial) - Table 1 MRA SR1 SR0 0 0 0 Spreading Range Modulation Rate 54MHz 65MHz 81MHz 140MHz 162MHz 0 1.4% 1.2% 1.0% 0.6% 0.4% (Fin/80) * 62.49KHz 0 1 2.0% 1.9% 1.6% 1.0% 0.8% (Fin/80) * 62.49KHz 0 1 0 1.1% 0.9% 0.5% 0.3% 0.3% (Fin/80) * 62.49KHz 0 1 1 1.8% 1.5% 1.0% 0.54% 0.4% (Fin/80) * 62.49KHz 1 0 0 1.3% 1.3% 1.3% 1.25% 1.1% (Fin/80) * 20.83KHz 1 0 1 2.2% 2.1% 2.1% 2.0% 1.8% (Fin/80) * 20.83KHz 1 1 0 1.4% 1.3% 1.4% 1.2% 0.9% (Fin/80) * 20.83KHz 1 1 1 2.1% 2.1% 2.1% 1.4% (Fin/80) * 20.83KHz 1.9% LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 9 P2040C September 2005 rev 1.4 Spread Spectrum Selection Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: The center frequency is the frequency of the external reference input on CLKIN, Pin 1). Example: P2040C is designed for high resolution flat panel applications and is able to support panel frequencies from 50MHz to 170MHz. For a 65MHz pixel clock frequency, a spreading selection of MRA=0, SR1=1 and SR0 =1 provides a percentage deviation of 1.50% (see Table 1). This result in frequency on ModOUT being swept from 64.03MHz to 65.98MHz at a modulation rate of 50.77KHz (see Table 1). This particular example (see Figure below) given here is a common EMI reduction method for notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic accelerator manufacturers. Application Schematic for Mobile LCD Graphics Controllers 65MHz from graphics accelerator 1 CLKIN VDD 8 2 MRA SR0 7 3 SR1 ModOUT 6 4 VSS SSON# 5 0.1F P2040C Modulated 65MHz signal with 1.5 % deviation and modulation rate of 50.77KHz. This signal is connected back to the spread +3.3V spectrum input pin (SSIN) of the graphics accelerator. Digital control for the SS enable or disable LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 9 P2040C September 2005 rev 1.4 Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to Ground -0.5 to +7.0 V Storage temperature -65 to +125 C TA Operating temperature -20 to +85 C Ts Max. Soldering Temperature (10 sec) Thermal Resistance from Junction For SOIC Package to Ambient ( No Air Flow) For TSSOP Package 260 156.5 124 150 C C/W 2 KV TSTG JA TJ Junction Temperature TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) C Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics (Test condition: All parameters are measured at room temperature (+25C) unless otherwise stated) Symbol Min Typ Max Unit VIL Input low voltage Parameter VSS - 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current (pull-up resistor on inputs SR0, SR1 and MRA) - - -40 A IIH Input high current (pull-down resistor on input SSON#) - - 40 A VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V VOH Output high voltage (VDD = 3.3V, IOL = 20mA) 2.5 - - V IDD Static supply current standby mode - 0.7 - mA ICC Dynamic supply current (3.3V and 10pF loading) 9 16 22 mA 3.0 3.3 3.6 V Power-up time (first locked cycle after power up) - 0.18 - mS Clock output impedance - 50 - VDD tON ZOUT Operating Voltage AC Electrical Characteristics Symbol Parameter Min Typ Max Unit 170 MHz fIN Input frequency 50 tLH* Output rise time (measured at 0.8V to 2.0V) 0.3 0.7 1.0 nS tHL* Output fall time (measured at 2.0V to 0.8V) 0.3 0.7 1.0 nS tJC Jitter (cycle to cycle) - - 360 pS tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 9 P2040C September 2005 rev 1.4 Package Information 8-lead (150-mil) SOIC Package H E D A2 A C A1 D e L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 0 8 0 8 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 9 P2040C September 2005 rev 1.4 8-lead Thin Shrunk Small Outline Package (4.40-MM Body) H E D A2 A C e A1 L B Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 0 8 0 8 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 9 P2040C September 2005 rev 1.4 Ordering Information Part Number Marking Package Type P2040C-08ST P2040C 8-Pin SOIC, TUBE P2040C-08SR P2040C 8-Pin SOIC, TAPE & REEL P2040C-08TT P2040C 8-Pin TSSOP, TUBE P2040C-08TR P2040C 8-Pin TSSOP, TAPE & REEL I2040C-08ST I2040C 8-Pin SOIC, TUBE I2040C-08SR I2040C 8-Pin SOIC, TAPE & REEL I2040C-08TT I2040C 8-Pin TSSOP, TUBE I2040C-08TR I2040C 8-Pin TSSOP, TAPE & REEL X2040C-08ST X2040C 8-Pin SOIC, TUBE X2040C-08SR X2040C 8-Pin SOIC, TAPE & REEL X2040C-08TT X2040C 8-Pin TSSOP, TUBE X2040C-08TR X2040C 8-Pin TSSOP, TAPE & REEL P2040CF-08ST P2040CF 8-Pin SOIC, TUBE, Pb Free P2040CF-08SR P2040CF 8-Pin SOIC, TAPE & REEL, Pb Free P2040CF-08TT P2040CF 8-Pin TSSOP, TUBE, Pb Free P2040CF-08TR P2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free I2040CF-08ST I2040CF 8-Pin SOIC, TUBE, Pb Free I2040CF-08SR I2040CF 8-Pin SOIC, TAPE & REEL, Pb Free I2040CF-08TT I2040CF 8-Pin TSSOP, TUBE, Pb Free I2040CF-08TR I2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free X2040CF-08ST X2040CF 8-Pin SOIC, TUBE, Pb Free X2040CF-08SR X2040CF 8-Pin SOIC, TAPE & REEL, Pb Free X2040CF-08TT X2040CF 8-Pin TSSOP, TUBE, Pb Free X2040CF-08TR X2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free P2040CG-08ST P2040CG 8-Pin SOIC, TUBE, Green P2040CG-08SR P2040CG 8-Pin SOIC, TAPE & REEL, Green P2040CG-08TT P2040CG 8-Pin TSSOP, TUBE, Green P2040CG-08TR P2040CG 8-Pin TSSOP, TAPE & REEL, Green I2040CG-08ST I2040CG 8-Pin SOIC, TUBE, Green I2040CG-08SR I2040CG 8-Pin SOIC, TAPE & REEL, Green I2040CG-08TT I2040CG 8-Pin TSSOP, TUBE, Green I2040CG-08TR I2040CG 8-Pin TSSOP, TAPE & REEL, Green X2040CG-08ST X2040CG 8-Pin SOIC, TUBE, Green X2040CG-08SR X2040CG 8-Pin SOIC, TAPE & REEL, Green X2040CG-08TT X2040CG 8-Pin TSSOP, TUBE, Green X2040CG-08TR X2040CG 8-Pin TSSOP, TAPE & REEL, Green LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. Qty/reel Temperature See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow 2500 See Flow See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow See Flow 2500 See Flow 7 of 9 P2040C September 2005 rev 1.4 Device Ordering Information P 2 0 4 0 C F - 0 8 X X Package: ST - SOIC, TUBE SR - SOIC, T/R TT - TSSOP, TUBE TR - TSSOP, T/R Pin Count F = Pb FREE and RoHS COMPLIANT PART G = Green DEVICE NUMBER Flow: P = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-40C to 85C) X = Automotive Temperature Range (-40C to 125C) Licensed under U.S Patent Nos 5,488,627 and 5,631,921 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 9 P2040C September 2005 rev 1.4 Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright (c) Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P2040C Document Version: v1.4 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 (c) Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 9 of 9