X2040CF-08ST - Alliance Semiconductor

September 2005 P2040C

rev 1.4

Notice: The information in this document is subject to change without notice.

Alliance Semiconductor

2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com

LCD Panel EMI Reduction IC

Features

 FCC approved method of EMI attenuation.

 Provides up to 15dB of EMI suppression

 Generates a low EMI spread spectrum clock of the

input frequency

 50MHz to 170MHz input frequency range

 Optimized for 54MHz, 65MHz, 81MHz, 140MHz,

and 162MHz pixel clock frequencies

 Internal loop filter minimizes external components

and board space

 8 selectable spread ranges, up to ± 2.2%

 SSON# control pin for spread spectrum enable and

disable options

 2 selectable modulation rates

 Low Cycle-to-cycle jitter

 3.3V Operating Voltage

 Ultra low power CMOS design

 Supports most mobile graphic accelerator and LCD

timing controller specifications

 Available in 8 pin SOIC and TSSOP Packages

Product Description

The P2040C is a selectable spread spectrum frequency

modulator designed specifically for digital flat panel

applications. The P2040C reduces electromagnetic

interference (EMI) at the clock source which provides

system wide reduction of EMI of all clock dependent

signals. The P2040C allows significant system cost

savings by reducing the number of circuit board layers and

shielding that are traditionally required to pass EMI

regulations.

The P2040C uses the most efficient and optimized

modulation profile approved by the FCC and is

implemented in a proprietary all-digital method. The

P2040C modulates the output of a single PLL in order to

“spread” the bandwidth of a synthesized clock and, more

importantly, decreases the peak amplitudes of its

harmonics. This result in a significantly lower system EMI

compared to the typical narrow band signal produced by

oscillators and most frequency generators. Lowering EMI

by increasing a signal’s bandwidth is called ‘spread

spectrum clock generation’.

Applications

The P2040C is targeted towards digital flat panel

applications for Notebook PCs, Palm-size PCs, Office

Automation Equipments and LCD Monitors.

Block Diagram

CLKIN

ModOUT

VSS

Frequency

Divider

Feedback

Divider

Modulation

Phase

Detector

Loop

Filter VCO Output

Divider

PLL

VDD

SSON#

SR0 SR1 MRA

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MRA

SSON#

ModOUT

SR0

1

2

3

4 5

6

7

8

P2040C

CLKIN

SR1

VSS

VDD

1

2

3

4 5

6

7

8

P2040C

CLKIN

S

R1

VDD

Pin Configuration

Pin Description

Pin# Pin

Name Type Description

1 CLKIN I External reference frequency input. Connect to externally generated reference signal.

2 MRA I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor.

3 SR1 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.

4 VSS P Ground to entire chip. Connect to system ground.

5 SSON# I

Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum

function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor.

6 ModOUT O Spread spectrum Clock Output.

7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.

8 VDD P Power supply for the entire chip.

Modulation Selection (Commercial) – Table 1

Spreading Range

MRA SR1 SR0 54MHz 65MHz 81MHz 140MHz 162MHz Modulation Rate

0 0 0 ±1.4% ±1.2% ±1.0% ±0.6% ±0.4% (Fin/80) * 62.49KHz

0 0 1 ±2.0% ±1.9% ±1.6% ±1.0% ±0.8% (Fin/80) * 62.49KHz

0 1 0 ±1.1% ±0.9% ±0.5% ±0.3% ±0.3% (Fin/80) * 62.49KHz

0 1 1 ±1.8% ±1.5% ±1.0% ±0.54% ±0.4% (Fin/80) * 62.49KHz

1 0 0 ±1.3% ±1.3% ±1.3% ±1.25% ±1.1% (Fin/80) * 20.83KHz

1 0 1 ±2.2% ±2.1% ±2.1% ±2.0% ±1.8% (Fin/80) * 20.83KHz

1 1 0 ±1.4% ±1.3% ±1.4% ±1.2% ±0.9% (Fin/80) * 20.83KHz

1 1 1 ±2.1% ±2.1% ±2.1% ±1.9% ±1.4% (Fin/80) * 20.83KHz

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Spread Spectrum Selection

Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without

affecting system performance. The spreading is described as a percentage deviation of the center frequency

(Note: The center frequency is the frequency of the external reference input on CLKIN, Pin 1).

Example: P2040C is designed for high resolution flat panel applications and is able to support panel frequencies from 50MHz

to 170MHz. For a 65MHz pixel clock frequency, a spreading selection of MRA=0, SR1=1 and SR0 =1 provides a percentage

deviation of ±1.50% (see Table 1). This result in frequency on ModOUT being swept from 64.03MHz to 65.98MHz at a

modulation rate of 50.77KHz (see Table 1). This particular example (see Figure below) given here is a common EMI reduction

method for notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic

accelerator manufacturers.

Application Schematic for Mobile LCD Graphics Controllers

`

Modulated 65MHz signal with

±1.5 % deviation and modulation

rate of 50.77KHz. This signal is

connected back to the spread

spectrum input pin (SSIN) of the

graphics accelerator.

1

2

3

4

CLKIN

MRA

SR1

VSS

SR0

5

6

7

8

SSON#

ModOUT

VDD

65MHz from graphics accelerator

+

3

.

3

V

0.1µF

P2040C Digital control for the SS enable

or disable

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Absolute Maximum Ratings

Symbol Parameter Rating Unit

VDD, VIN Voltage on any pin with respect to Ground -0.5 to +7.0 V

TSTG Storage temperature -65 to +125 °C

TA Operating temperature -20 to +85 °C

Ts Max. Soldering Temperature (10 sec) 260 °C

For SOIC Package 156.5

өJA Thermal Resistance from Junction

to Ambient ( No Air Flow) For TSSOP Package 124 °C/W

TJ Junction Temperature 150 °C

TDV Static Discharge Voltage

(As per JEDEC STD22- A114-B) 2 KV

Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect

device reliability.

DC Electrical Characteristics

(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)

Symbol Parameter Min Typ Max Unit

VIL Input low voltage VSS - 0.3 - 0.8 V

VIH Input high voltage 2.0 - VDD + 0.3 V

IIL Input low current (pull-up resistor on inputs SR0, SR1 and MRA) - - -40 µA

IIH Input high current (pull-down resistor on input SSON#) - - 40 µA

VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V

VOH Output high voltage (VDD = 3.3V, IOL = 20mA) 2.5 - - V

IDD Static supply current standby mode - 0.7 - mA

ICC Dynamic supply current (3.3V and 10pF loading) 9 16 22 mA

VDD Operating Voltage 3.0 3.3 3.6 V

tON Power-up time (first locked cycle after power up) - 0.18 - mS

ZOUT Clock output impedance - 50 - Ω

AC Electrical Characteristics

Symbol Parameter Min Typ Max Unit

fIN Input frequency 50 170 MHz

tLH* Output rise time (measured at 0.8V to 2.0V) 0.3 0.7 1.0 nS

tHL* Output fall time (measured at 2.0V to 0.8V) 0.3 0.7 1.0 nS

tJC Jitter (cycle to cycle) - - 360 pS

tD Output duty cycle 45 50 55 %

*tLH and tHL are measured into a capacitive load of 15pF

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Package Information

8-lead (150-mil) SOIC Package

D

EH

D

A1

A2

A

θ

L

C

B

e

Dimensions

Inches Millimeters

Symbol

Min Max Min Max

A1 0.004 0.010 0.10 0.25

A 0.053 0.069 1.35 1.75

A2 0.049 0.059 1.25 1.50

B 0.012 0.020 0.31 0.51

C 0.007 0.010 0.18 0.25

D 0.193 BSC 4.90 BSC

E 0.154 BSC 3.91 BSC

e 0.050 BSC 1.27 BSC

H 0.236 BSC 6.00 BSC

L 0.016 0.050 0.41 1.27

θ 0° 8° 0° 8°

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E

H

A

A1

A2

D

B

C

L

θ

e

8-lead Thin Shrunk Small Outline Package (4.40-MM Body)

Dimensions

Inches Millimeters

Symbol

Min Max Min Max

A 0.043 1.10

A1 0.002 0.006 0.05 0.15

A2 0.033 0.037 0.85 0.95

B 0.008 0.012 0.19 0.30

c 0.004 0.008 0.09 0.20

D 0.114 0.122 2.90 3.10

E 0.169 0.177 4.30 4.50

e 0.026 BSC 0.65 BSC

H 0.252 BSC 6.40 BSC

L 0.020 0.028 0.50 0.70

θ 0° 8° 0° 8°

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Ordering Information

Part Number Marking Package Type Qty/reel Temperature

P2040C-08ST P2040C 8-Pin SOIC, TUBE See Flow

P2040C-08SR P2040C 8-Pin SOIC, TAPE & REEL 2500 See Flow

P2040C-08TT P2040C 8-Pin TSSOP, TUBE See Flow

P2040C-08TR P2040C 8-Pin TSSOP, TAPE & REEL 2500 See Flow

I2040C-08ST I2040C 8-Pin SOIC, TUBE See Flow

I2040C-08SR I2040C 8-Pin SOIC, TAPE & REEL 2500 See Flow

I2040C-08TT I2040C 8-Pin TSSOP, TUBE See Flow

I2040C-08TR I2040C 8-Pin TSSOP, TAPE & REEL 2500 See Flow

X2040C-08ST X2040C 8-Pin SOIC, TUBE See Flow

X2040C-08SR X2040C 8-Pin SOIC, TAPE & REEL 2500 See Flow

X2040C-08TT X2040C 8-Pin TSSOP, TUBE See Flow

X2040C-08TR X2040C 8-Pin TSSOP, TAPE & REEL 2500 See Flow

P2040CF-08ST P2040CF 8-Pin SOIC, TUBE, Pb Free See Flow

P2040CF-08SR P2040CF 8-Pin SOIC, TAPE & REEL, Pb Free 2500 See Flow

P2040CF-08TT P2040CF 8-Pin TSSOP, TUBE, Pb Free See Flow

P2040CF-08TR P2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free 2500 See Flow

I2040CF-08ST I2040CF 8-Pin SOIC, TUBE, Pb Free See Flow

I2040CF-08SR I2040CF 8-Pin SOIC, TAPE & REEL, Pb Free 2500 See Flow

I2040CF-08TT I2040CF 8-Pin TSSOP, TUBE, Pb Free See Flow

I2040CF-08TR I2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free 2500 See Flow

X2040CF-08ST X2040CF 8-Pin SOIC, TUBE, Pb Free See Flow

X2040CF-08SR X2040CF 8-Pin SOIC, TAPE & REEL, Pb Free 2500 See Flow

X2040CF-08TT X2040CF 8-Pin TSSOP, TUBE, Pb Free See Flow

X2040CF-08TR X2040CF 8-Pin TSSOP, TAPE & REEL, Pb Free 2500 See Flow

P2040CG-08ST P2040CG 8-Pin SOIC, TUBE, Green See Flow

P2040CG-08SR P2040CG 8-Pin SOIC, TAPE & REEL, Green 2500 See Flow

P2040CG-08TT P2040CG 8-Pin TSSOP, TUBE, Green See Flow

P2040CG-08TR P2040CG 8-Pin TSSOP, TAPE & REEL, Green 2500 See Flow

I2040CG-08ST I2040CG 8-Pin SOIC, TUBE, Green See Flow

I2040CG-08SR I2040CG 8-Pin SOIC, TAPE & REEL, Green 2500 See Flow

I2040CG-08TT I2040CG 8-Pin TSSOP, TUBE, Green See Flow

I2040CG-08TR I2040CG 8-Pin TSSOP, TAPE & REEL, Green 2500 See Flow

X2040CG-08ST X2040CG 8-Pin SOIC, TUBE, Green See Flow

X2040CG-08SR X2040CG 8-Pin SOIC, TAPE & REEL, Green 2500 See Flow

X2040CG-08TT X2040CG 8-Pin TSSOP, TUBE, Green See Flow

X2040CG-08TR X2040CG 8-Pin TSSOP, TAPE & REEL, Green 2500 See Flow

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Notice: The information in this document is subject to change without notice.

Device Ordering Information

P2040CF-08XX

Licensed under U.S Patent Nos 5,488,627 and 5,631,921

DEVICE NUMBER

Flow:

P = Commercial Temperature Range (0°C to 70°C)

I = Industrial Temperature Range (-40°C to 85°C)

X = Automotive Temperature Range (-40°C to 125°C)

Pin Count

F = Pb FREE and RoHS COMPLIANT PART

G = Green

Package:

ST – SOIC, TUBE

SR - SOIC, T/R

TT – TSSOP, TUBE

TR - TSSOP, T/R

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trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective

companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance

assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's

best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time,

without notice. If the product described herein is under development, significant changes to these specifications are possible.

The information in this product data sheet is intended to be general descriptive information for potential customers and users,

and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume

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claims arising from such use.

Alliance Semiconductor Corporation

2575 Augustine Drive,

Santa Clara, CA 95054

Tel# 408-855-4900

Fax: 408-855-4999

www.alsc.com

Preliminary Information

Part Number: P2040C

Document Version: v1.4

Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003