LTC3900
1
3900fb
Typical applicaTion
DescripTion
Synchronous Rectifier Driver
for Forward Converters
FeaTures
applicaTions
n 48V Input Isolated DC/DC Converters
n Isolated Telecom Power Supplies
n High Voltage Distributed Power
Step-Down Converters
n Industrial Control System Power Supplies
n Automotive and Heavy Equipment
n N-Channel Synchronous Rectifier MOSFET Driver
n Programmable Timeout Protection
n Reverse Inductor Current Protection
n Pulse Transformer Synchronization
n Wide VCC Supply Range: 4.5V to 11V
n 15ns Rise/Fall Times at VCC = 5V, CL = 4700pF
n Undervoltage Lockout
n Small SO-8 Package
The LTC
®
3900 is a secondary-side synchronous recti-
fier driver designed to be used in isolated forward con-
verter power supplies. The chip drives N-channel rectifier
MOSFETs and accepts pulse sychronization from the
primary-side controller via a pulse transformer.
The LTC3900 incorporates a full range of protection for the
external MOSFETs. A programmable timeout function is
included that disables both drivers when the synchroniza-
tion signal is missing or incorrect. Additionally, the chip
senses the output inductor current through the drain-source
resistance of the catch MOSFET, shutting off the MOSFET
if the inductor current reverses. The LTC3900 also shuts
off the drivers if the supply voltage is too low.
ISOLATION
BARRIER
T1
Q3
Q4
Q1
R
CS1
R
CS2
R
CS3
CS
+
CG
CS
–
FG
SYNC
V
CC
TIMER
LTC3900 R
TMR
R
SYNC
T2
C
SG
R1
R2
C
TMR
C
VCC
V
OUT
3.3V
40A
V
IN
36V TO 72V
3900 F01
L0
D3
C
Z
R
Z
R
B
D
Z
C
OUT
Q
REG
+
GND
270Ω
OPTO
COMP
FB
V
IN
GND
OC
OUT
OC
I
SENSE
S
OUT
COMP
GND
LT1952
470Ω
10mΩ
SG
GATE
LT4430
OCI
LOAD CURRENT (A)
0
65
EFFICIENCY (%)
70
75
80
85
10 20 30 40
3900 F10b
90
95
5 15 25 35
VOUT = 3.3V
VIN = 36V
VIN = 72V
VIN = 48V
Efficiency
Figure 1. Simplified Isolated Synchronous Forward Converter
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
LTC3900
2
3900fb
pin conFiguraTionabsoluTe MaxiMuM raTings
(Note 1)
TOP VIEW
SYNC
TIMER
GND
FG
CS+
CS–
CG
VCC
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
TJMAX = 150°C, θJA = 130°C/W
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3)
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3900ES8#PBF LTC3900ES8#TRPBF 3900 8-Lead Plastic Small Outline –40°C to 125°C
LTC3900IS8#PBF LTC3900IS8#TRPBF 3900 8-Lead Plastic Small Outline –40°C to 125°C
LTC3900HS8#PBF LTC3900HS8#TRPBF 3900 8-Lead Plastic Small Outline –40°C to 150°C
LTC3900MPS8#PBF LTC3900MPS8#TRPBF 3900 8-Lead Plastic Small Outline –55°C to 150°C
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3900ES8 LTC3900ES8#TR 3900 8-Lead Plastic Small Outline –40°C to 125°C
LTC3900IS8 LTC3900IS8#TR 3900 8-Lead Plastic Small Outline –40°C to 125°C
LTC3900HS8 LTC3900HS8#TR 3900 8-Lead Plastic Small Outline –40°C to 150°C
LTC3900MPS8 LTC3900MPS8#TR 3900 8-Lead Plastic Small Outline –55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Supply Voltage
VCC ........................................................................12V
Input Voltage
CS–, TIMER .............................. –0.3V to (VCC +0.3V)
SYNC ...................................................... –12V to 12V
Input Current
CS+ ....................................................................15mA
Operating Junction Temperature Range (Note 2)
LTC3900E ........................................... –40°C to 125°C
LTC3900I............................................ –40°C to 125°C
LTC3900H .......................................... –40°C to 150°C
LTC3900MP ....................................... –55°C to 150°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage Range l4.5 511 V
VUVLO VCC Undervoltage Lockout Threshold
VCC Undervoltage Lockout Hysteresis
Rising Edge
Rising Edge to Falling Edge
l4.1
0.5
4.5 V
V
IVCC VCC Supply Current VSYNC = 0V
fSYNC = 100kHz, CFG = CCG = 4700pF (Note 4)
l
l
0.5
7
1
15
mA
mA
Timer
VTMR Timer Threshold Voltage l–10% VCC/5 10% V
ITMR Timer Input Current VTMR = 0V l–6 –10 µA
LTC3900
3
3900fb
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tTMRDIS Timer Discharge Time CTMR = 1000pF, RTMR = 4.7k l40 120 ns
VTMRMAX Timer Pin Clamp Voltage CTMR = 1000pF, RTMR = 4.7k 2.5 V
Current Sense
ICS+CS+ Input Current VCS+ = 0V l±1 µA
ICS–CS– Input Current VCS– = 0V l±1 µA
VCSMAX CS+ Pin Clamp Voltage IIN = 5mA, VSYNC = –5V 11 V
VCS Current Sense Threshold Voltage VCS– = 0V
LTC3900E/LTC3900I (Note 5)
LTC3900H/LTC3900MP (Note 5)
l
l
7.5
3
1
10.5 13.5
18
20
mV
mV
mV
SYNC Input
ISYNC SYNC Input Current VSYNC = ±10V l±1 ±10 µA
VSYNCP SYNC Input Positive Threshold
SYNC Positive Input Hysteresis
(Note 6)
l1.0 1.4
0.2
1.8 V
V
VSYNCN SYNC Input Negative Threshold
SYNC Negative Input Hysteresis
(Note 6)
l–1.8 –1.4
0.2
–1.0 V
V
Driver Output
RONH Driver Pull-Up Resistance IOUT = –100mA
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
0.9 1.2
1.6
2.0
Ω
Ω
Ω
RONL Driver Pull-Down Resistance IOUT = 100mA
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
0.9 1.2
1.6
2.0
Ω
Ω
Ω
IPK Driver Peak Output Current (Note 6) 2 A
Switching Characteristics (Note 7)
tdSYNC Input to Driver Output Delay CFG = CCG = 4700pF, VSYNC = ±5V
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
60
120
150
ns
ns
tSYNC Minimum SYNC Pulse Width VSYNC = ±5V l75 ns
tr, tfDriver Rise/Fall Time CFG = CCG = 4700pF, VSYNC = ±5V 15 ns
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3900 is tested under pulsed load conditions such that
TJ
≈
TA. The LTC3900E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTC3900I is guaranteed over the –40°C to 125°C operating
junction temperature range. The LTC3900H is guaranteed over the full
–40°C to 150°C operating junction temperature range. The LTC3900MP
is guaranteed and tested over the full –55°C to 150°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes; operating lifetime is derated for junction temperatures greater
than 125°C. Note that the maximum ambient temperature consistent
with these specifications is determined by specific operating conditions
in conjunction with board layout, the rated package thermal impedance
and other environmental factors. The junction temperature (TJ, in °C) is
calculated from the ambient temperature (TA, in °C) and power dissipation
(PD, in watts) according to the formula:
TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
impedance.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: The current sense comparator threshold has a 0.33%/°C
temperature coefficient (TC) to match the TC of the external MOSFET
RDS(ON).
Note 6: Guaranteed by design, not subject to test.
Note 7: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured from ±1.4V at SYNC input to 20%/80% levels at the
driver output.
LTC3900
4
3900fb
Typical perForMance characTerisTics
Current Sense Threshold vs
Temperature
VCS(MAX) Clamp Voltage vs CS+
Input Current
SYNC Positive Threshold vs
Temperature
SYNC Negative Threshold vs
Temperature Propagation Delay vs VCC
Propagation Delay vs
Temperature
Timeout vs V
CC Timeout vs Temperature Timeout vs RTMR
TIMEOUT (µs)
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
4.75
VCC (V)
4
TIMEOUT (µs)
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
4.75 689
3900 G01
5710 11
TEMPERATURE (°C)
–50–75 0 50 75
3900 G02
–25 25 100 150125
RTMR (kΩ)
10
9
8
7
6
5
4
3
2
1
0
TIMEOUT (µs)
3900 G03
0 10 20 30 40 50 60 70 80 90 100
TA = 25°C
RTMR = 51k
CTMR = 470pF
TA = 25°C
VCC = 5V
CTMR = 470pF
VCC = 5V
RTMR = 51k
CTMR = 470pF
CURRENT SENSE THRESHOLD (mV)
17
15
13
11
9
7
5
3
3900 G04
VCC = 5V, 11V
CS+ INPUT CURRENT (mA)
0 5
VCS(MAX) CLAMP VOLTAGE (V)
10 2015 25 30
3900 G05
18
17
16
15
14
13
12
11
10
TEMPERATURE (°C)
–75 –50
SYNC POSITIVE THRESHOLD (V)
100
3900 G06
0 50
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
–25 25 75 150125
TEMPERATURE (°C)
–50–75 100
0 50–25 25 75 150125
TA = 25°C
VCC = 5V
VCC = 11V
TEMPERATURE (°C)
SYNC NEGATIVE THRESHOLD (V)
3900 G07
–1.0
–1.1
–1.2
–1.3
–1.4
–1.5
–1.6
–1.7
–1.8
VCC (V)
4
PROPAGATION DELAY (ns)
10
3900 G08
6 8
120
110
100
90
80
70
60
50
40
5 7 9 11
TEMPERATURE (°C)
3900 G09
–75 –50 100
0 50–25 25 75 150125
TA = 25°C
CLOAD = 4.7nF
VCC = 5V
CLOAD = 4.7nF
VCC = 5V, 11V
SYNC TO FG
SYNC TO CG
SYNC TO FG
SYNC TO CG
PROPAGATION DELAY (µs)
120
110
100
90
80
70
60
50
40
–75 –50 100
0 50–25 25 75 150125
LTC3900
5
3900fb
CLOAD (nF)
10 2 3 104 5 6 7 98
RISE/FALL TIME (ns)
50
45
40
35
30
25
20
15
10
5
0
TA = 25°C
VCC = 5V
FALL TIME
RISE TIME
UNDERVOLTAGE LOCKOUT THRESHOLD
VOLTAGE (V)
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
3900 G143900 G13
3900 G15
TEMPERATURE (°C)
–75 –50 100
0 50–25 25 75 125 150
FALLING EDGE
RISING EDGE
TEMPERATURE (°C)
–75 –50 100
0 50
–25 25 75 150125
CLOAD = 4.7nF
VCC SUPPLY CURRENT (mA)
20
18
16
14
12
10
8
6
4
VCC = 5V
VCC = 11V
CLOAD (nF)
10 2 3 104 5 6 7 98
TA = 25°C
fSYNC = 100kHz
3900 G16
VCC = 5V
VCC = 11V
SUPPLY CURRENT (mA)
30
25
20
15
10
5
0
Typical perForMance characTerisTics
Rise/Fall Time vs Load
Capacitance
Undervoltage Lockout Threshold
Voltage vs Temperature
VCC Supply Current vs
Temperature
VCC Supply Current vs Load
Capacitance
Propagation Delay vs CLOAD Rise/Fall Time vs VCC Rise/Fall Time vs Temperature
CLOAD (nF)
1 2 3 10
3900 G10
4 5 6 7 98
RISE/FALL TIME (ns)
50
45
40
35
30
25
20
15
10
5
0
RISE/FALL TIME (ns)
50
45
40
35
30
25
20
15
10
5
0
3900 G11
TEMPERATURE (°C)
3900 G12
TA = 25°C
CLOAD = 4.7nF
TA = 25°C
VCC = 5V
VCC = 5V
CLOAD = 4.7nF
SYNC TO FG
SYNC TO CG
PROPAGATION DELAY (ns)
120
110
100
90
80
70
60
50
40
VCC (V)
4 10
6 85 7 9 11
FALL TIME
FALL TIME
RISE TIME
RISE TIME
–75 –50 100
0 50–25 25 75 150125
LTC3900
6
3900fb
block DiagraM
pin FuncTions
CS+, CS– (Pin 1, 2): Current Sense Differential Input.
Connect CS+ through a series resistor to the drain of the
external catch MOSFET, Q4. Connect CS– to the source.
The LTC3900 monitors the CS inputs 250ns after CG goes
high. If the inductor current reverses and flows into the
MOSFET causing CS+ to rise above CS– by more than
10.5mV, the LTC3900 pulls CG low. See the Current Sense
section for more details on choosing the resistance value
for RCS1 to RCS3.
CG (Pin 3): Catch MOSFET Gate Driver. This pin drives the
gate of the external N-channel catch MOSFET, Q4.
VCC (Pin 4): Main Supply Input. This pin powers the driv-
ers and the rest of the internal circuitry. Bypass this pin
to GND using a 4.7µF ceramic capacitor in close proximity
to the LTC3900.
FG (Pin 5): Forward MOSFET Gate Driver. This pin drives
the gate of the external N-channel forward MOSFET, Q3.
GND (Pin 6): The VCC bypass capacitor should be con-
nected directly to this GND pin.
TIMER (Pin 7): Timer Input. Connect this pin to an external
R-C network to program the timeout period. The LTC3900
resets the timer at every negative transition of the SYNC
input. If the SYNC signal is missing or incorrect, the
LTC3900 pulls both CG and FG low once the TIMER pin
goes above the timeout threshold. See the Timer section
for more details on programming the timeout period.
SYNC (Pin 8): Driver Synchronization Input. This input
is signal edge sensitive. A negative voltage slew at SYNC
forces FG to pull high and CG to pull low. A positive volt-
age slew at SYNC forces FG to pull low and CG to pull
high. The SYNC input can accept both pulse or square
wave signals.
SYNC
AND
DRIVER
LOGIC
IS
S–
S+SYNC+
SYNC–
TMR
–1.4V
+1.4V
DISABLE
DRIVER
UVLO
ZTMR
0.5 • VCC
ZCS
11V
7
2
1
8
5
4
SYNC
CS+
CS–
TIMER
MTMR
R1
180k
R2
45k
TIMER
RESET
FG
GND
CG
VCC
3
6
3900 BD
+
–
10.5mV
LTC3900
7
3900fb
applicaTions inForMaTion
Overview
In a typical forward converter topology, a power trans-
former is used to provide the functions of input/output
isolation and voltage step-down to achieve the required
low output voltage. Schottky diodes are often used on
the secondary-side to provide rectification. Schottky
diodes, though easy to use, result in a loss of efficiency
due to relatively high voltage drops. To improve efficiency,
synchronous output rectifiers utilizing N-channel MOSFETs
can be used instead of Schottky diodes. The LTC3900
provides all of the necessary functions required to drive
the synchronous rectifier MOSFETs.
Figure 1 shows a simplified forward converter application.
T1 is the power transformer; Q1 is the primary-side power
transistor driven by the primary controller, LT1952 output
(OUT). The pulse transformer T2 provides synchronization
and is driven by LT1952 synchronization signal, SOUT
or SG
from the primary controller. Q3 and Q4 are secondary-side
synchronous switches driven by the LTC3900’s FG and CG
output. Inductor LO and capacitor COUT form the output
filter to provide a steady DC output voltage for the load.
Also shown in Figure 1 is the feedback path from VOUT
through the optocoupler driver LT4430 and an optocoupler,
back to the primary controller to regulate VOUT.
Each full cycle of the forward converter operation con-
sists of two periods. In the first period, Q1 turns on and
the primary-side delivers power to the load through T1.
SG goes high and T2 generates a negative pulse at the
LTC3900 SYNC input. The LTC3900 forces FG to turn on
and CG to turn off, Q3 conducts. Current flows to the
load through Q3, T1 and LO. In the next period, Q1 turns
off, SG goes low and T2 generates a positive pulse at the
LTC3900 SYNC input. The LTC3900 forces FG to turn off
and CG to turn on, Q4 conducts. Current continues to
flow to the load through Q4 and LO. Figure 2 shows the
LTC3900 synchronization waveforms.
External MOSFET Protection
A programmable timer and a differential input current sense
comparator are included in the LTC3900 for protection
of the external MOSFET during power down and Burst
Mode
®
operation. The chip also shuts off the MOSFETs
if VCC < 4.1V.
When the primary controller is powering down, the primary
controller shuts down first and the LTC3900 continues to
operate for a while by drawing power from the VCC bypass
cap, CVCC. The SG signal stops switching and there is no
SYNC pulse to the LTC3900. The LTC3900 keeps one of
the drivers turned on depending on the polarity of the
last SYNC pulse. If the last SYNC pulse is positive, CG
will remain high and the catch MOSFET, Q4 will stay on.
The inductor current will start falling down to zero and
continue going in the negative direction due to the voltage
that is still present across the output capacitor (the current
now flows from COUT back to LO). If Q4 is turned off while
the inductor current is negative, the inductor current will
produce high voltage across Q4, resulting in a MOSFET
avalanche. Depending on the amount of energy stored in
the inductor, this avalanche energy may damage Q4.
Figure 2. Synchronization Waveforms
GATE
(OUT)
SG
(SOUT)
SYNC
FG
CG
3900 F02
LTC3900
8
3900fb
applicaTions inForMaTion
The timer circuit and current sense comparator in LTC3900
are used to prevent reverse current buildup in the output
inductor.
Timer
Figure 3 shows the LTC3900 timer internal and external
circuits. The timer operates by using an external R-C
charging network to program the time-out period. On
every negative transition at the SYNC input, the chip
generates a 200ns pulse to reset the timer cap. If the
SYNC signal is missing or incorrect, allowing the timer
cap voltage to go high, it shuts off both drivers once the
voltage reaches the time-out threshold. Figure 4 shows
the timer waveforms.
A typical forward converter cycle always turns on Q3
and Q4 alternately and the SYNC input should alternate
between positive and negative pulses. The LTC3900 timer
also includes sequential logic to monitor the SYNC input
sequence. If after one negative pulse, the SYNC compara-
tor receives another negative pulse, the LTC3900 will not
reset the timer cap. If no positive SYNC pulse appears,
both drivers are shut off once the timer times out. Once
positive pulses reappear the timer resets and the drivers
start switching again. This is to protect the external com-
ponents in situations where only negative SYNC pulse is
present and FG output remains high. Figure 5 shows the
timer waveforms with incorrect SYNC pulses.
The LTC3900 has two separate SYNC comparators (S+ and
S– in the Block Diagram) to detect the positive and negative
pulses. The threshold voltages of both comparators are
Figure 3. Timer Circuit
ZTMR
RTMR
CTMR
7
3900 F03
TMR
4
R1R2 VCC
TIMEOUT
TIMER
RESET
designed to be of the same magnitude (1.4V typical) but
opposite in polarity. In some situations, for example dur-
ing power up or power down, the SYNC pulse magnitude
may be low, slightly higher or lower than the threshold of
the comparators. This can cause only one of the SYNC
comparators to trip. This also appears as incorrect SYNC
pulse and the timer will not reset.
The timeout period is determined by the external RTMR
and CTMR values and is independent of the VCC voltage.
This is achieved by making the timeout threshold a ratio
of VCC. The ratio is 0.2x, set internally by R1 and R2 (see
Figure 3). The timeout period should be programmed to
be around one period of the primary switching frequency
using the following formula:
TIMEOUT = 0.2 • RTMR • CTMR + 0.27E-6
To reduce error in the timeout setting due to the discharge
time, select CTMR between 100pF and 1000pF. Start with a
CTMR around 470pF and then calculate the required RTMR.
CTMR should be placed as close as possible to the LTC3900
with minimum PCB trace between CTMR, the TIMER pin
and GND. This is to reduce any ringing caused by the PCB
trace inductance when CTMR discharges. This ringing may
introduce error to the timeout setting.
The timer input also includes a current sinking clamp
circuit (ZTMR in Figure 3) that clamps this pin to about
0.5 • VCC if there is missing SYNC/timer reset pulse. This
clamp circuit prevents the timer cap from getting fully
charged up to the rail, which results in a longer discharge
SYNC
FG
CG
TIMER RESET
(INTERNAL)
TIMER
SG
TIMEOUT
THRESHOLD
LAST
PULSE
3900 F04
Figure 4. Timer Waveforms
LTC3900
9
3900fb
applicaTions inForMaTion
time. The current sinking capability of the circuit is around
1mA. The timeout function can be disabled by connecting
the timer pin to GND.
Current Sense
The differential input current sense comparator is used
for sensing the voltage across the drain-to-source termi-
nals of Q4 through the CS+ and CS– pins. If the inductor
current reverses into the Q4 causing CS+ to rise above
CS– by more than 10.5mV, the LTC3900 pulls CG low. This
comparator is used to prevent inductor reverse current
buildup during power down or Burst Mode operation, which
may cause damage to the MOSFET. The 10.5mV input
threshold has a positive temperature coefficient, which
closely matches the TC of the external MOSFET RDS(ON).
The current sense comparator is only active 250ns after
CG goes high; this is to avoid any ringing immediately
after Q4 is switched on.
Under light load conditions, if the inductor average cur-
rent is less than half of its peak-to-peak ripple current,
the inductor current will reverse into Q4 during a portion
of the switching cycle, forcing CS+ to rise above CS–.
The current sense comparator input threshold is set at
10.5mV to prevent tripping under light load conditions.
If the product of the inductor negative peak current and
MOSFET RDS(ON) is higher than 10.5mV, the LTC3900 will
operate in discontinuous current mode. Figure 6 shows
the LTC3900 operating in discontinuous current mode;
the CG output goes low before the next negative SYNC
pulse, as soon as the inductor current becomes negative.
Discontinuous current mode is sometimes undesirable.
To disable discontinuous current mode operation, add a
resistor divider, RCS1 and RCS2 at the CS+ pin to increase
the 10.5mV threshold so that the LTC3900 operates in
continuous mode at no load.
The LTC3900 CS+ pin has an internal current sinking
clamp circuit (ZCS in the Block Diagram) that clamps the
pin to 11V. The clamp circuit is to be used together with
the external series resistor, RCS1 to protect the CS+ pin
from high Q4 drain voltage in the power transfer cycle.
During the power transfer cycle, Q4 is off, the drain volt-
age of Q4 is determined by the primary input voltage and
the transformer turns ratio. This voltage can be high and
may damage the LTC3900 if CS+ is connected directly to
the drain of Q4. The current sinking capability of the clamp
circuit is 5mA minimum.
SYNC
FG
CG
TIMER RESET
(INTERNAL)
TIMER
TIMEOUT
THRESHOLD
3900 F05
TIMEOUT
MISSING/LOW
POSITIVE
SYNC PULSE
TIMER RESET AFTER
RECEIVING POSITIVE
SYNC PULSE
TIMER DO NOT RESET
AT SECOND NEGATIVE
SYNC PULSE
Figure 5. Timer Waveforms with Incorrect SYNC Pulses
Figure 6a. Discontinuous Current Mode Operation at No Load
LTC3900
10
3900fb
The value of the resistors, RCS1, RCS2 and RCS3, should
be calculated using the following formulas to meet both
the threshold and clamp voltage requirements:
k = 48 • IRIPPLE • RDS(ON) –1
RCS2 = {200 • VIN(MAX) • (NS/NP) –2200 • (1 + k)} /k
RCS1 = k • RCS2
RCS3 = {RCS1 • RCS2} / {RCS1 + RCS2}
If k = 0 or less than zero, RCS2 is not needed and RCS1
= RCS3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA
where:
IRIPPLE = Inductor peak-to-peak ripple current
RDS(ON) = On-resistance of Q4 at IRIPPLE/2
VIN(MAX) = Primary side main supply maximum input
voltage
NS/NP = Power transformer T1, turn ratio
If the LTC3900 still operates in discontinuous mode with
the calculated resistance value, increase the value of RCS1
to raise the threshold. The resistors RCS1 and RCS2 and the
CS+ pins input capacitance plus the PCB trace capacitance
form an R-C delay; this slows down the response time
of the comparator. The resistors and CS+ input leakage
currents also create an input offset error.
To minimize this delay and error, do not use resistance
value higher than required and make the PCB trace from
the resistors to the LTC3900 CS+/CS– pins as short as
possible. Add a series resistor, RCS3 with value equal to
parallel sum of RCS1 and RCS2 to the CS– pin and connect
the other end of RCS3 directly to the source of Q4.
SYNC Input
Figure 7 shows the external circuit for the LTC3900 SYNC
input. With a selected type of pulse transformers, the
values of the CSG and RSYNC should be adjusted to obtain
an optimum SYNC pulse amplitude and width. A bigger
capacitor, CSG, generates a higher and wider SYNC pulse.
The peak of this pulse should be much higher than the typi-
cal LTC3900 SYNC threshold of ±1.4V. Amplitudes greater
than ±5V will help to speed up the SYNC comparator and
reduce the SYNC to drivers propagation delay. The pulse
width should be wider than 75ns. Overshoot during the
pulse transformer reset interval must be minimized and
kept below the minimum SYNC threshold of ±1V. The
amount of overshoot can be reduced by having a smaller
RSYNC.
SYNC
FG
CG
3900 F06b
INDUCTOR
CURRENT 0A
ADJUSTED CURRENT
SENSE THRESHOLD
Figure 6b. Continuous Current Mode Operation
with Adjusted Current Sense Threshold
Figure 7. SYNC Input Circuit
R
SYNC
470Ω
T2
T2: COILCRAFT Q4470B
OR PULSE P0926
C
SG
220pF
PRIMARY
CONTROLLER
SG
(S
OUT
)
LTC3900
SYNC
3900 F07
applicaTions inForMaTion
LTC3900
11
3900fb
applicaTions inForMaTion
An alternative method of generating the SYNC pulse is
shown in Figure 8. This circuit produces square SYNC
pulses with amplitude dependent on the logic supply
voltage. The SYNC pulse width can be adjusted with R1
and C1 without affecting the pulse amplitude.
For nonisolated applications, the SYNC input can be driven
directly by a bipolar square pulse. To reduce the propa-
gation delay, make the positive and negative magnitude
of the square wave much greater than the ±1.4V SYNC
threshold.
VCC Regulator
The VCC supply for the LTC3900 can be generated by peak
rectifying the transformer secondary winding as shown
in Figure 9. The Zener diode DZ sets the output voltage to
(VZ – 0.7V). A resistor, RB (on the order of a few hundred
ohms), in series with the base of QREG may be required
to surpress high frequency oscillations depending on
QREG’s selection.
The LTC3900 has an UVLO detector that pulls the drivers
output low if VCC < 4.1V. The UVLO detector has 0.5V of
hysteresis to prevent chattering.
In a typical forward converter, the secondary-side circuits
have no power until the primary-side controller starts
operating. Since the power for biasing the LTC3900 is
derived from the power transformer T1, the LTC3900 will
initially remain off. During that period (VCC < 4.1V), the
output rectifier MOSFETs Q3 and Q4 will remain off and
the MOSFETs body diodes will conduct. The MOSFETs
may experience very high power dissipation due to a high
voltage drop in the body diodes. To prevent MOSFET dam-
age, VCC voltage greater than 4.1V should be provided
quickly. The VCC supply circuit shown in Figure 9 will pro-
vide power for the LTC3900 within the first few switching
pulses of the primary controller, preventing overheating
of the MOSFETs.
MOSFET Selection
The required MOSFET RDS(ON) should be determined based
on allowable power dissipation and maximum required
output current.
The body diodes conduct during the power-up phase, when
the LTC3900 VCC supply is ramping up. The CG and FG
signals stay low and the inductor current flows through
the body diodes. The body diodes must be able to handle
the load current during start-up until VCC reaches 4.1V.
The LTC3900 drivers dissipate power when switching
MOSFETs. The power dissipation increases with switch-
ing frequency, VCC and size of the MOSFETs. To calculate
Figure 9. VCC Regulator
Figure 8. Symmetrical SYNC Drive
R
SYNC
470Ω
T2 LTC3900
SYNC
3900 F08
74HC14
74HC14
74HC132
R1
470Ω
C1
220pF
SYNC
SG
PRIMARY
CONTROLLER
SG
3900 F09
D3
MBR0540
T1
SECONDARY
WINDING
0.1µF R
Z
2k R
B
10Ω Q
REG
BCX55
C
VCC
4.7µF
V
CC
D
Z
7.5V
LTC3900
12
3900fb
applicaTions inForMaTion
the driver dissipation, the total gate charge QG is used.
This parameter is found on the MOSFET manufacturers
data sheet.
The power dissipated in each LTC3900 MOSFET driver
is:
PDRIVER = QG • VCC • fSW
where fSW is the switching frequency of the converter.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3900 for your layout:
1. Connect the 4.7µF bypass capacitor as close as possible
to the VCC and GND pins.
2. Connect the two MOSFET drain terminals directly to
the transformer. The two MOSFET sources should be as
close together as possible.
3. Keep the timer, SYNC and VCC regulator circuit away
from the high current path of Q3, Q4 and T1.
4. Place the timer capacitor, CTMR, as close as possible
to the LTC3900.
5. Keep the PCB trace from the resistors RCS1, RCS2 and
RCS3 to the LTC3900 CS+/CS– pins as short as possible.
Connect the other ends of the resistors directly to the drain
and source of the MOSFET, Q4.
•
••
••
LTC3900
8V
BIAS
V
B1
V
B1
220pF
BAT760
8V
BIAS
3
FG
5CG
+V
IN
36V TO 72V
PA0912.002
BAS516
BCX55
V
OUT
3.3V, 40A
10k
10k
10k
1nF
1µF
15k
560R
C
OUT
100µF
3x
0.1µF
2.2µF
1nF
12V Q2
PH3230
2x
Q3
PH3230
2x
18V
NEC
PS2701
Q4470-B
V
B1
C16
10pF
C13
1µF
C14
33nF
C15
6.8nF
82k
47k
3900 TA01
L1
SD_V
SEC
OUT
LT1952
7 14
R
OSC
V
IN
3 15
BLANK GND
9 8
SS_MAXDC PGND
5 13
DELAY 12
V
R
= 2.5V OC
6 11
COMP I
SENSE
1 10
FB = 1.23V SOUT
2 16
Si7846
1
GND
6CS
+
2
V
CC
4CS
–
7
SYNC
8TIMER
370k
0.010R
1nF
470Ω
39k
13.2k
115k
27k
0.22µF
0.1µF
10k59k
33k
2.2k 22k
L1: PA0713, PULSE ENGINEERING
ALL CAPACITORS X7R, CERAMIC, TDK R24
27.4k
1%
R25
6.04k
1%
R23
3.3k
6
5
4
1
2
3
LT4430
V
IN
GND
OC
OPTO
COMP
FB
8V BIAS
R22
270Ω
Typical applicaTions
36V to 72V, 3.3V at 40A Synchronous Forward Converter
LTC3900
13
3900fb
3900 TA02
16
15
14
13
12
11
10
9
COMP
FB = 1.23V
ROSC
SYNC
MAXDC
VR = 2.5V
SD
GND
SOUT
VIN
OUT
PGND
DELAY
OC
ISENSE
BLANK
1
2
3
4
5
6
7
8
LT1952-1 Si7462
22k
SOUT
100pF
145k
10k10k
47k
Q2 Q3
Q2, Q3, Q4, Q5 = Si7850
L1: DRQ127-220 VOUT2
24V
2A
VOUT1
12V
2A
VOUT1
L1A
0.030R
13.3k
340k
22k
VU1
VFB
1µF
82k
680Ω
56k
0.47µF
0.1µF
1.2k
VFB
BC857BF
33k
115k
VIN
T1
PA1577
BAS516
BAS516 150µF
16V
33µF
16V
BAS516
BAS516
470R
FG
BCX56
PDZ10B
1.5mH
0.1µF 0.1µF
VU1
2
1
7
9
2.2µF
VIN
36V TO 72V
VIN
VU1
1µF
82k
•
3
4
•
•
•
CG
•
Q4 Q5
L1B
FG
8
10
•
CG
VOUT1
1k
•
+
560R
PE-68386
SOUT
BCX55
PDZ7.5B
PS2801-1 LT4430
VAUX
FG
470pF 220pF
CG
VAUX
1µF
3.92k
5.23k
100k
33pF
15nF
LTC3900
38.3k
10k
10k
CS+
CS–
CG
VCC
SYNC
TIMER
GND
FG
1
2
3
4
8
7
6
5
•
•
VCC
GND
OC
OPTO
COMP
FB
1
2
3
6
5
4
Typical applicaTions
36V to 72V Input to 12V and 24V (or ± 12V), 2A Output Converter in 1/8th Brick Footprint
The LTC3900 can drive multiple synchronous output
rectifiers. The 12V and 24V or ±12V output converter
has good cross regulation due to low voltage drops in
the output MOSFETs. Other combinations like 3.3V and
–5V or 1.5V and 5V can be easily achieved by changing
the transformer turns ratio.
LTC3900
14
3900fb
Typical applicaTions
IOUT (A)
0
90
92
96
6 10
3900 TA03b
88
86
2 4 8 12 14
84
82
94
EFFICIENCY (%)
VIN = 24V
VOUT = 14V
By Using Active Reset and 60V MOSFETs Converter is Achieving 94% to 95%
Efficiency with Only Four MOSFETs.
Si3459
BAS516
0.1µF
0.1µF
255R
10k
0.004R
40R2-4421.003
HAT2266
×2
BAS521
680µH
BAS516
PZTA42
PDZ10B
1.5mH
VU1
1
6
6.8µF
×4
VIN
18V TO 40V
VIN
22k
7
11
•
•
VU1
BAS516
255R
220pF
LTC4441
57.6k
332k
2.2µF
VR
PGND
BL
RBL
SGND
IN
OUT
DRVCC
VIN
FB
EN
1
2
3
4
5
10
9
8
7
6
16
15
14
13
12
11
10
9
COMP
FB = 1.23V
ROSC
SYNC
MAXDC
VR = 2.5V
SD
GND
SOUT
VIN
OUT
PGND
DELAY
OC
ISENSE
BLANK
1
2
3
4
5
6
7
8
LT1952-1
22k
158k
13.3k
165k 22k
VFB
VU1
SOUT
GATE
82k
2K
158k
0.1µF
0.47µF
VFB
BC857BF
33k
115k
VIN
VR
4.7µF
220R
1µF 1.2k
PS2801-1
VOUT1
2.2nF 1µF
BAS516
270R LT4430
VAUX
3.65k
15nF
33pF
1.96k
82.5k
VCC
GND
OC
OPTO
COMP
FB
1
2
3
6
5
4
3900 TA03a
VOUT1
14V
14A
HAT2266
PA1494.362
33µF
150µF
PXE
FG
2, 3
4, 5
•
CG
+
1k
560R
PE-68386
GATE
BCX55
PDZ7.5B
FG
470pF
220pF
CG
VAUX
0.22µF
1µF
10k
82k
47k
VAUX
10k
LTC3900
CS+
CS–
CG
VCC
SYNC
TIMER
GND
FG
1
2
3
4
8
7
6
5
•
•
PGND
18V to 40V Input to 14V at 14A Output Converter in 1/4 Brick Footprint
LTC3900
15
3900fb
3900 TA04a
14
11
10
15
8
13
12
16
SD/VSEC
ROSC
BLANK
SS
VR
COMP
FB
OUT
OC
ISENSE
VIN
GND
PGND
DELAY
SOUT
7
3
9
5
6
1
2
5
8
6
7
3
1
2
4
LT1952-1
Si7430
470pF
12.4k
L1: PULSE PA1393.302
L2: COILCRAFT DO1607B-155
ALL CERAMIC CAPS ARE X5R OR X7R
220pF
75k
2k 38.3k
1k
1nF
97.6k
47nF
0.1µF
1µF
13.3k
370k
82k 2.2µF
PZTA42
22k158k
82k
133k
VU1
T1
PA0423
VU1
4.7µF
0.010
PE-68386
•
•
7
10
560R
BAS516PDZ10B
1.5mH 3µH
VU1
1
6
VIN
36V TO 72V
L2 L1
2
5
•
•
•
LTC3900
PDZ7.5
BCX55
47k
10k
1µF
HAT2244
33µF
VOUT
12V
14A
FB
SYNC
GND
TIMER
CG
CS+
CS–
VCC
10k
20k
Typical applicaTions
IOUT (A)
0
90
92
96
6 10
3900 TA04b
88
86
2 4 8 12 14
84
82
94
EFFICIENCY (%)
VIN = 48V
VOUT = 12V
36V to 72V Input to 12V, 14A Output Converter in 1/8th Brick Footprint
The Efficiency of 12V Output Converter is Over 95% at 8A Output.
LTC3900
16
3900fb
Typical applicaTions
18V to 72V Input to 12V at 13A Active Reset Converter Fits in 1/8th Brick Size
IOUT (A)
0
90
92
96
6 10
3900 TA05b
88
86
2 4 8 12 14
84
80
82
94
EFFICIENCY (%)
24VIN
48VIN
The High Efficiency of Converter is Achieved by Precise MOSFET Timing Provided
by LT1952 and LTC3900 Controllers.
16
15
14
13
12
11
10
9
COMP
FB = 1.23V
ROSC
SYNC
MAXDC
VR = 2.5V
SD
GND
SOUT
VIN
OUT
PGND
DELAY
OC
ISENSE
BLANK
1
2
3
4
5
6
7
8
LT1952-1
BAS516
LTC4440
HAT2173
×2
GATE
22k
220pF 237Ω
Si2325
33nF
10k
0.1µF
BAS516
VU1
VFB
57Ω 0.006Ω
3 5
1, 6
2, 4
137k
13.3k
189k 22k
1k
0.1µF
1µF
39.2K
VFB
VU1
BC857
33k
174k
VR2
332k
VB
4.7µF
40R2-4444.004
BAS516
PZTA42
10V
1.5mH
VU1
1
6
2.2µF
×3
VIN
18V TO 72V
VIN
33k
2
5
•
•
VR2 VOUT
12V
13A
HAT2173
×2
PA2050.103
HAT2169
33µF
330µF
FG
7
10
•
CG
0.22µF BAS521
680µH
+
560R
220pF
GATE
FG
470pF
PE-68386
1µF
10k
1k
22k
7.5V
BCX55
10k
47k
CG
LTC3900
CS+
CS–
CG
VCC
SYNC
TIMER
GND
FG
1
2
3
4
8
7
6
5
•
•
3900 TA05a
VOUT
1µF
2.2nF
1.2k
BAS516
470R
PS2801-1 LT4430
7.87k
18.2k
348k
10pF
10nF
VCC
GND
OC
OPTO
COMP
FB
1
2
3
6
5
4
LTC3900
17
3900fb
Typical applicaTions
Synchronous Forward Converter With Pulse Skip Mode
The Discontinuous Current Mode (DCM) Operation of Circuit is About 10% More Efficient
with 1A-2A Loads. The No Load Input Current is 15mA in DCM Versus 90mA in CCM.
3900 TA06a
16
15
14
13
12
11
10
9
COMP
FB = 1.23V
ROSC
SYNC
MAXDC
VR = 2.5V
SD
GND
SOUT
VIN
OUT
PGND
DELAY
OC
ISENSE
BLANK
1
2
3
4
5
6
7
8
LT1952-1
Si7430
22k
SOUT
133k
VOUT
3.3V
30A
HA2165
VOUT
13.3k
442k
22.1k
VFB
VU1
1µF
82k 1.2k
910Ω
158k
0.1µF
0.47µF
VFB
BC857
33k
115k
VIN
T1
PA0369
BAS516
100µF
PA1671
470µF
BAS516
270R
FG
PZTA42
PDZ10B
1.5mH
VU1
1
6
7
10
2.2µF
VIN
36V TO 72V
VIN
1.5nF
0.015R
1µF
82k
2
5
•
•
•
CG
1k
PS2801-1 LT4430
1.96k
18.2k
82.5k
47pF
15nF
560R
PE-68386
SOUT
BCX55
PDZ7.5B
FG
470pF 220pF
CG
0.22µF
B0540W
B0540W
1µF
10k
10nF
10k
38.3k
VAUX
R_DCM
3.3M
2.2R
0.02µF
10k
LTC3900
CS+
CS–
CG
VCC
SYNC
TIMER
GND
FG
1
2
3
4
8
7
6
5•
•
VCC
GND
OC
OPTO
COMP
FB
1
2
3
6
5
4
+
*
*CONVERTERS THAT USE THE LTC3900 CAN BE FORCED TO OPERATE IN DISCONTINUOUS CURRENT MODE
AT LIGHT LOADS BY OFFSETTING THE CURRENT SENSE INPUT WITH R_DCM RESISTOR.
IOUT (A)
0
65
75
95
15 25
3900 TA06b
55
45
5 10 20 30
35
85
EFFICIENCY (%)
CONTINUOUS
CURRENT MODE
DISCONTINUOUS
CURRENT MODE
VIN = 48V
VOUT = 3.3V
LTC3900
18
3900fb
package DescripTion
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160
±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS
SHALL NOT EXCEED .006" (0.15mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
LTC3900
19
3900fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
B5/11 Added H- and MP-grade parts. Reflected throughout the data sheet. 1 to 20
(Revision history begins at Rev B)
LTC3900
20
3900fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003
LT 0511 REV B • PRINTED IN USA
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT1952/LT1952-1 Synchronous Forward Converter Controllers Ideal for Medium Power 24V or 48V Input Isolated Applications
LTC3901 Secondary Side Synchronous Driver for Push-Pull and Full
Bridge Converters
Similar to the LTC3900, Used in Full Bridge and Push-Pull
Converters
LT4430 Secondary Side Optocoupler Driver Optocoupler Driver with Precise Reference Voltage
LT1431 Programmable Reference Adjustable Shunt Voltage Regulator with 100mA Sink Capability
LTC3726/LTC3725 Synchronous No Opto Forward Converter Controller Chip Set Ideal for Medium Power 24V or 48V Input Isolated Applications
LTC3723-1/
LTC3723-2
Synchronous Push-Pull Controllers High Efficiency with On-Chip MOSFET Drivers
LTC3721-1/
LTC3721-2
Nonsynchronous Push-Pull Controllers Minimizes External Components, On-Chip MOSFET Drivers
LTC3722/
LTC3722-2
Synchronous Phase Modulated Full Bridge Controllers Ideal for High Power 24V or 48V Input Applications
36V to 72V Input to 12V at 20A “No Optocoupler” Synchronous “Bus Converter”
LTC3900-Based Synchronous “Bus Converter” Efficiency vs Load Current
•
••
••
LTC3900
8V
BIAS
VU1
VU1
220pF
8V
BIAS
3
FG
5CG
VIN
36V TO 72V
PA0815.002
BAS516
BCX55
VOUT
12V, ±10%,
20A MAX
10k
10k
10k
CT
1nF
1µF
RT
15k
560Ω L1: PULSE PA1494.242
ALL CAPACITORS ARE TDK, X5R CERAMIC
COUT
33µF, 16V
X5R, TDK
×3
0.1µF
2.2µF, 100V
×2
1nF
BAT
760
12V Si7370
×2
PH4840
×2
18V
Q4470-B
82k
47k
3900 TA07a
L1
2.4µH
SD_VSEC OUT
LT1952
7 14
ROSC VIN
3 15
BLANK GND
9 8
SS_MAXDC PGND
5 13
DELAY 12
VR = 2.5V OC
6 11
COMP ISENSE
1 10
FB = 1.23V SOUT
2 16
PH21NQ15
×21
GND
6CS+
2
VCC
4CS–
7
SYNC
8TIMER
370k
9mΩ
1µF
470Ω
39k
13.2k
115k
27k
0.47µF
0.1µF
10k59k
LOAD CURRENT (A)
4
EFFICIENCY (%)
96.0
95.5
95.0
94.5
94.0
93.5
93.0 10 12 1486 16 18 20
3900 TA07b
VIN = 48V
VOUT = 12V
16
12
8
4
POWER LOSS (W)
EFFICIENCY
POWER LOSS