VC-801 CMOS Crystal Oscillator Previous Vectron Model VCC4 VC-801 Description Vectron's VC-801 Crystal Oscillator (XO) is a quartz stabilized square wave generator with a CMOS output. The VC-801 uses fundamental or 3rd overtone crystals resulting in very low jitter performance, and a monolithic IC which improves reliability and reduces cost. Features Applications * * * * * CMOS output XO Output Frequencies from 32.768kHz to 125.000MHz 5.0, 3.3, 2.5 or 1.8 V Operation Low Jitter Performance Output Disable Feature * 20ppm Frequency Stability Available * Operating Temperature ranging from -55C to +125C * Small Industry Standard Package, 3.2 x 5.0 x 1.3mm * * * * * * * * Product is compliant to RoHS directive and fully compatible with lead free assembly Block Diagram Output VDD Crystal Oscillator GND E/D Page1 SONET/SDH/DWDM Ethernet, GE, SynchE Storage Area Networking Fiber Channel Digital Video Broadband Access Base Stations, Picocells Specifications Performance Specifications Table 1. Electrical Performance, 5V Option Parameter Symbol Min VDD 4.5 Typical Max Units 5.5 V 7 V 10 30 40 mA mA mA 30 uA 75.000 MHz Supply Voltage Voltage1 Max Voltage 5.0 -0.7 2 IDD Current 20.000MHz 20.001 to 50.000MHz 50.001 to 75.000MHz Current, Output Disabled Frequency Nominal Frequency3 fN 1.544 4,8 Stability (Ordering Option) 20, 25, 32, 50, 100 ppm Output Output Logic Levels2 Output Logic High Output Logic Low Output Logic High Drive Output Logic Low Drive VOH VOL IOH IOL V V mA mA 15 pF 8 5 2 ns ns ns 10 uA 55 % 16 16 Load Output Rise /Fall Time2 <20.000MHz 20.000 to 50.000MHz 50.001 to 75.000MHz 0.1*VDD 0.9*VDD tR/tF Output Leakage, Output Disabled IZ 2,5 Duty Cycle 45 6 Period Jitter RMS Peak-Peak J RMS Jitter, 12kHz-20MHz J 50 3.0 21 ps ps 0.5 1 ps 0.8 V V 100 ns Enable/Disable Output Enable/Disable7 Output Enable Output Disable VIH VIL Disable time tD 4.0 Enable Internal Pull-Up Resistor 100 Start-Up Time tSU Operating Temp (Ordering Option) TOP 1] 2] 3] 4] 5] 6] 7] 8] + 8 ms -10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125 C The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF. Parameters are tested with the test circuit shown in Fig 1. See Standard Frequencies and Ordering Information tables for more specific information. Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options. Duty Cycle is measured as On Time/Period, see Fig 2. Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance. The Output is Enabled if the Enable/Disable is left open. Only 50 and 100 stability option available for -40/105 C, -40/125 C, -55/105 C and -55/125 C Operating temperature range. tR IDD VDD Kohm tF VOH .1F .01F 4 3 1 2 15pF 50% VOL On Time + Period Fig 2: Waveform Fig 1: Test Circuit Page2 Specifications Performance Specifications Table 2. Electrical Performance, 3.3V Option Parameter Symbol Min VDD 2.97 Typical Max Units 3.63 V 5.0 V 5 7 20 30 40 mA mA mA mA mA 30 uA 125.000 MHz Supply Voltage Voltage1 Max Voltage 3.30 -0.5 2 Current 32.768kHz to 1.499MHz 1.500 to 20.000 MHz 20.001 to 50.000MHz 50.001 to 100.000MHz 100.001 to 125.000MHz IDD Current, Output Disabled Frequency Nominal Frequency3 fN 0.032 4,8 Stability (Ordering Option) 20, 25, 32, 50, 100 ppm Output Output Logic Levels2 Output Logic High Output Logic Low Output Logic High Drive Output Logic Low Drive VOH VOL IOH IOL Output Rise /Fall Time 32.768kHz to 345.6kHz 345.6kHz to 20.000MHz 20.001 to 50.000MHz 50.001 to 75.000MHz 75.001 to 125.000MHz Output Leakage, Output Disabled V V mA mA 15 pF 200 6 4 3 2 ns ns ns ns ns 10 uA 55 % 8 8 Load 2 0.1*VDD 0.9*VDD tR/tF IZ 2,5 Duty Cycle 45 Period Jitter6 RMS Peak-Peak J RMS Jitter, 12kHz-20MHz J 50 3.0 21 0.5 ps ps 1 ps 0.5 V V Enable/Disable 7 Output Enable/Disable Output Enable Output Disable VIH VIL Disable time tD 2.0 100 Enable Internal Pull-Up Resistor 1] 2] 3] 4] 5] 6] 7] 8] 100 Start-Up Time tSU Operating Temp (Ordering Option) TOP ns Kohm 8 -10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125 ms C The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF. Parameters are tested with the test circuit shown in Fig 1. See Standard Frequencies and Ordering Information tables for more specific information. Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options. Duty Cycle is measured as On Time/Period, see Fig 2. Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance. The Output is Enabled if the Enable/Disable is left open. Only 50 and 100 stability option available for -40/105 C, -40/125 C, -55/105 C and -55/125 C Operating temperature range. Page3 Specifications Performance Specifications Table 3. Electrical Performance, 2.5V Option Parameter Symbol Min Typical Max Units 2.75 V 5.0 V 5 7 15 20 25 30 mA mA mA mA mA mA 30 uA 125.000 MHz Supply Voltage Voltage1 VDD Max Voltage 2.25 2.50 -0.5 Current2 32.768kHz to 1.499MHz 1.500 to 20.000 MHz 20.001 to 50.000MHz 50.001 to 75.000MHz 75.001 to 100.000MHz 100.001 to 125.000MHz IDD Current, Output Disabled Frequency 3 Nominal Frequency fN 0.032 4,9 Stability (Ordering Option) 20, 25, 32, 50, 100 ppm Output Output Logic Levels2 Output Logic High Output Logic Low Output Logic High Drive Output Logic Low Drive Output Logic High Drive8 Output Logic Low Drive8 VOH VOL IOH IOL IOH IOL Load IOUT 2 Output Rise /Fall Time 32.768kHz to 345.6kHz 345.6kHz to 20.000MHz 20.001 to 50.000MHz 50.001 to 75.000MHz 75.001 to 125.000MHz Output Leakage, Output Disabled 0.9*VDD 0.1*VDD 4 4 8 8 15 pF 200 6 5 3 2 ns ns ns ns ns 10 uA 55 % tR/tF IZ Duty Cycle2,5 45 6 V V mA mA mA mA Period Jitter RMS Peak-Peak J RMS Jitter, 12kHz-20MHz J 50 3.0 21 0.5 ps ps 1 ps 0.5 V V Enable/Disable 7 Output Enable/Disable Output Enable Output Disable VIH VIL Disable time tD 1.75 100 Enable Internal Pull-Up Resistor 100 Start-Up Time tSU Operating Temp (Ordering Option) TOP 1] 2] 3] 4] 5] 6] 7] 8] 9] ns Kohm 8 -10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125 ms C The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF. Parameters are tested with the test circuit shown in Fig 1. See Standard Frequencies and Ordering Information tables for more specific information. Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options. Duty Cycle is measured as On Time/Period, see Fig 2. Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance. The Output is Enabled if the Enable/Disable is left open. For 3rd overtone crystal designs. Only 50 and 100 stability option available for -40/105 C, -40/125 C, -55/105 C and -55/125 C Operating temperature range. Page4 Performance Specifications Table 4. Electrical Performance, 1.8V Option Parameter Symbol Min Typical Max Units 1.89 V 3.6 V 5 15 20 25 mA mA mA mA 30 uA 125.000 MHz Supply Voltage 1 Voltage VDD Max Voltage 1.71 1.80 -0.5 2 Current 1.544 to 20.000 MHz 20.001 to 70.000MHz 70.001 to 100.000MHz 100.001 to 125.000MHz IDD Current, Output Disabled Frequency 3 Nominal Frequency fN 1.544 4,9 Stability (Ordering Option) 20, 25, 32, 50, 100 ppm Output Output Logic Levels2 Output Logic High Output Logic Low Output Logic High Drive Output Logic Low Drive Output Logic High Drive8 Output Logic Low Drive8 VOH VOL IOH IOL IOH IOL 0.9*VDD 0.1*VDD 2.8 2.8 8 8 Load 2 Output Rise /Fall Time 1.544 to 20.000MHz 20.001 to 50.000MHz 50.001 to 125.000MHz Output Leakage, Output Disabled 15 pF 6 5 3 ns ns ns 10 uA 55 % tR/tF IZ 2,5 Duty Cycle 6 V V mA mA mA mA 45 Period Jitter RMS Peak-Peak J RMS Jitter, 12kHz-20MHz J 50 3.0 21 0.5 ps ps 1 ps 0.5 V V 100 ns Enable/Disable Output Enable/Disable7 Output Enable Output Disable VIH VIL Disable time tD 1.26 Enable Internal Pull-Up Resistor 1 Start-Up Time tSU Operating Temp (Ordering Option) TOP 1] 2] 3] 4] 5] 6] 7] 8] 9] Mohm 8 -10/70, -20/70, -40/85, -40/105, -40/125, -55/105, -55/125 ms C The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF. Parameters are tested with the test circuit shown in Fig 1. See Standard Frequencies and Ordering Information tables for more specific information. Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and aging for 50 and 100ppm options. Duty Cycle is measured as On Time/Period, see Fig 2. Broadband Period Jitter measured using Wavecrest SIA3300C, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance. The Output is Enabled if the Enable/Disable is left open. For 3rd overtone crystal designs. Only 50 and 100 stability option available for -40/105 C, -40/125 C, -55/105 C and -55/125 C Operating temperature range. Page5 Outline Drawing & Pad Layout 2.54 FX-700 YWWC V NNMNNN 1.2 2.2 . YYWW C 1.4 Dimensions in mm Table 5. Pin Out All dimensions in mm Pin Symbol Function 1 E/D Enable Disable 2 GND Case and Electrical Ground 3 Output Output 4 VDD Power Supply Voltage Reliability VI qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow simulation. The VC-801 family is capable of meeting the following qualification tests: Table 6. Environmental Compliance Parameter Conditions Mechanical Shock MIL-STD-883, Method 2002 Mechanical Vibration MIL-STD-883, Method 2007 Solderability MIL-STD-883, Method 2003 Gross and Fine Leak MIL-STD-883, Method 1014 Resistance to Solvents MIL-STD-883, Method 2015 Moisture Sensitivity Level MSL 1 Contact Pads Gold over Nickel Typical Characteristics - Phase Noise and Gain Curve Although ESD protection circuitry has been designed into the VC-801 proper precautions should be taken when handling and mounting. VI employs a human body model (HBM) and a charged device model (CDM) for ESD susceptibility testing and design protection evaluation. Table 7. ESD Ratings Model Minimum Conditions Human Body Model 1500V MIL-STD-883, Method 3015 Charged Device Model 1000V JESD22-C101 Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied at these or any other conditions in excess of conditions represented in the operational sections of this datasheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability. Permanent damage is also possible if E/D is applied before VDD. Table 8. Absolute Maximum Ratings Parameter Symbol Ratings Unit Storage Temperature TS -55 to 125 C Soldering Temp/Time TLS 260 / 30 C / sec Page6 IR Reflow The VC-801 is qualified to meet the JEDEC standard for Pb-Free assembly. The temperatures and time intervals listed are based on the Pb-Free small body requirements. The VC-801 device is hermetically sealed so an aqueous wash is not an issue. Table 9. Reflow Profile Parameter Symbol Value PreHeat Time Ts-min Ts-max tS 60 sec Min, 260 sec Max 150C 200C Ramp Up RUP 3 C/sec Max Time Above 217 C tL 60 sec Min, 150 sec Max Time To Peak Temperature TAMB-P 480 sec Max Time at 260 C tP 30 sec Max Ramp Down RDN 6 C/sec Max Tape and Reel Table 10 . Tape and Reel Dimensions Tape Dimensions (mm) Reel Dimensions (mm) Dimension W F Do Po P1 A B C D N W1 W2 Tolerance Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max # Per Reel VC-801 16 7.5 1.5 4 8 180 2 13 21 60 17 21 1000 Page7 Table 11. Standard Output Frequencies (MHz) 9.8304 10.000 11.0590 11.0596 11.2896 12.000 12.272 12.288 12.353 13.000 13.500 13.560 14.318 14.7456 16.000 16.376 16.384 16.777216 16.800 17.734 17.734475 18.432 19.440 19.660 19.800 20.000 20.480 22.000 22.5792 24.000 24.5453 24.576 25.000 26.000 27.000 27,120 28.686 28.375 30.000 32.000 32.768 33.000 33.333 34.368 36.000 37.056 47.500 40.000 42.500 44.000 44.736 48.000 48.090 50.000 54.000 60.000 62.500 66.000 66.666 75.000 80.000 100.000 125.000 Ordering Information VC-801- E A W- K A A N- xxMxxxxxxx Frequency M for MHz or K for kHz (32.768 kHz is available) Product Crystal Oscillator Package 3.2x5 Ceramic Custom Options N: Standard Option Load A: 15pF B: 30pF C: 50pF Power Supply D: +5.0Vdc E: +3.3Vdc H: +2.5Vdc J: +1.8Vdc Enable/Disable A: Enable/Disable, Enable High Output A: CMOS Temp Range W: -10/70C J: -20/70C E: -40/85C F: -40/105C (50 and 100ppm) 7: -40/125C (50 and 100ppm) B: -55/105C (50 and 100ppm) C: -55/125C (50 and 100ppm) Stability E: 20ppm F: 25ppm H: 32ppm K: 50ppm S: 100ppm Example: VC-801-EAW-KAAN-125M000000 *Note: not all combination of options are available. Other specifications may be available upon request. Please consult with factory. For Additional Information, Please Contact * Add _SNPBDIP for tin lead solder dip Example: VC-801-EAW-KAAN-125M000000_SNPBDIP Page8 Revision History Revision Date Approved October 17, 2014 VN Modified package drawing to reflect 1.40mm maximum height. Added Revision History Table. Description January 20, 2015 VN Included ordering options for -40/105C, -40/125C and -55/105C Operating temperature ranges August 10, 2018 FB Update log and ordering information, Add SNPBDIP ordering information, Page9 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Vectron: VC-801-JAW-KAAN-38M4000000