LM4674
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LM4674 Filterless 2.5W Stereo Class D Audio Power
Amplifier
Check for Samples: LM4674
1FEATURES DESCRIPTION
The LM4674 is a single supply, high efficiency,
2 Output Short Circuit Protection 2.5W/channel, filterless switching audio amplifier. A
Stereo Class D Operation low noise PWM architecture eliminates the output
No Output Filter Required filter, reducing external component count, board area
consumption, system cost, and simplifying design.
Logic Selectable Gain
Independent Shutdown Control The LM4674 is designed to meet the demands of
mobile phones and other portable communication
Minimum External Components devices. Operating from a single 5V supply, the
Click and Pop Suppression device is capable of delivering 2.5W/channel of
Micro-Power Shutdown continuous output power to a 4load with less than
10% THD+N. Flexible power supply requirements
Available in Space-Saving 2mm x 2mm x allow operation from 2.4V to 5.5V.
0.6mm DSBGA, and 4mm x 4mm x 0.8mm
WQFN Packages The LM4674 features high efficiency compared to
conventional Class AB amplifiers. When driving an
APPLICATIONS 8speaker from a 3.6V supply, the device features
85% efficiency at PO= 500mW. Four gain options are
Mobile Phones pin selectable through the G0 and G1 pins.
PDAs Output short circuit protection prevents the device
Laptops from being damaged during fault conditions. Superior
click and pop suppression eliminates audible
KEY SPECIFICATIONS transients on power-up/down and during shutdown.
Independent left/right shutdown control maximizes
Efficiency at 3.6V, 100mW into 8: 80% (typ) power savings in mixed mono/stereo applications.
Efficiency at 3.6V, 500mW into 8: 85% (typ)
Efficiency at 5V, 1W into 8: 85% (typ)
Quiescent Power Supply Current
at 3.6V supply: 4mA
Power Output at VDD = 5V,
RL= 4, THD 10%: 2.5 W (typ)
Shutdown Current: 0.03μA (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SDR
SDL
G0
G1
INR-
INL-
INR+
INL+
OUTRA
OUTRB
OUTLA
OUTLB
VDD PVDD
GND PGND
2.4V to 5.5V
H-BRIDGE
GAIN/
MODULATOR
H-BRIDGE
GAIN/
MODULATOR
OSCILLATOR
CS1 CS2
Ci
Ci
Ci
Ci
AUDIO
INPUT
AUDIO
INPUT
LM4674
SNAS344E DECEMBER 2005REVISED APRIL 2013
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TYPICAL APPLICATION
Ci= 1 μF
CS1 = 1 μF
CS2 = 0.1 μF
Figure 1. Typical Audio Amplifier Application Circuit
EXTERNAL COMPONENTS DESCRIPTION
(Figure 1)
Components Functional Description
1. CSSupply bypass capacitor which provides power supply filtering. Refer to the AUDIO AMPLIFIER INPUT CAPACITOR
SELECTION section for information concerning proper placement and selection of the supply bypass capacitor.
2. CiInput AC coupling capacitor which blocks the DC voltage at the amplifier's input terminals.
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4
3
2
1
AB C D
INL+
OUTLA
PVDD
OUTLB
INL-
G1
SDR
SDL
INR-
G0
GND
PGND
INR+
VDD
OUTRA
OUTRB
8
7
6
5
13
14
15
16
INR+
PVDD
GND
PGND
OUTLB
OUTLA
OUTRB
G1
1 32 4
9101112
INL-
INL+
INR-
OUTRA
G0
VDD
SDR
SDL
LM4674
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SNAS344E DECEMBER 2005REVISED APRIL 2013
CONNECTION DIAGRAM
Figure 2. DSBGA (Top View) Figure 3. WQFN (Top View)
See YZR0016 Package See RGH0016A Package
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PIN DESCRIPTION
BUMP PIN NAME FUNCTION
A1 4 INL+ Non-inverting left channel input
A2 6 PVDD Power VDD
A3 7 OUTLA Left channel output A
A4 8 OUTLB Left channel output B
B1 3 INL- Inverting left channel input
B2 5 G1 Gain setting input 1
B3 10 SDR Right channel shutdown input
B4 9 SDL Left channel shutdown input
C1 2 INR- Inverting right channel input
C2 16 G0 Gain setting input 0
C3 12 GND Ground
C4 11 PGND Power Ground
D1 1 INR+ Non-inverting right channel input
D2 15 VDD Power Supply
D3 14 OUTRA Right channel output A
D4 13 OUTRB Right channel output B
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage(1) 6.0V
Storage Temperature 65°C to +150°C
Input Voltage –0.3V to VDD +0.3V
Power Dissipation(3) Internally Limited
ESD Susceptibility, all other pins(4) 2000V
ESD Susceptibility(5) 200V
Junction Temperature (TJMAX) 150°C
Thermal Resistance θJA (DSBGA) 45.7°C/W
θJA (WQFN) 38.9°C/W
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX TA)/ θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4674 see power derating currents for more information.
(4) Human body model, 100pF discharged through a 1.5kresistor.
(5) Machine Model, 220pF–240pF discharged through all pins.
OPERATING RATINGS(1)(2)
Temperature Range (TMIN TATMAX)40°C TA85°C
Supply Voltage 2.4V VDD 5.5V
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
ELECTRICAL CHARACTERISTICS VDD = 3.6V(1)(2)
The following specifications apply for AV= 6dB, RL= 15µH + 8+ 15µH, f = 1kHz unless otherwise specified. Limits apply for
TA= 25°C. LM4674 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
VOS Differential Output Offset Voltage VIN = 0, VDD = 2.4V to 5.0V 5 mV
VIN = 0, RL=,4 6 mA
Both channels active, VDD = 3.6V
IDD Quiescent Power Supply Current VIN = 0, RL=,5 7.5 mA
Both channels active, VDD = 5V
ISD Shutdown Current V SDR = V SDL = GND 0.03 1 μA
VSDIH Shutdown Voltage Input High 1.4 V (min)
VSDIL Shutdown Voltage Input Low 0.4 V (max)
TWU Wake Up Time V SDR/SDL = 0.4V 0.5 ms
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
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ELECTRICAL CHARACTERISTICS VDD = 3.6V(1)(2) (continued)
The following specifications apply for AV= 6dB, RL= 15µH + 8+ 15µH, f = 1kHz unless otherwise specified. Limits apply for
TA= 25°C. LM4674 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
G0, G1 = GND 6 6 ± 0.5 dB
RL=
G0 = VDD, G1 = GND 12 12 ± 0.5 dB
RL=
AVGain G0 = GND, G1 = VDD 18 18 ± 0.5 dB
RL=
G0, G1 = VDD 24 24 ± 0.5 dB
RL=
AV= 6dB 28 k
AV= 12dB 18.75 k
RIN Input Resistance AV= 18dB 11.25 k
AV= 24dB 6.25 k
RL= 15μH + 4+ 15μH, THD 10%
f = 1kHz, 22kHz BW
VDD = 5V 2.5 W
VDD = 3.6V 1.2 W
VDD = 2.5V 0.530 W
RL= 15μH + 8+ 15μH, THD 10%
f = 1kHz, 22kHz BW
VDD = 5V 1.5 W
VDD = 3.6V 0.78 0.6 W
VDD = 2.5V 0.350 W
POOutput Power RL= 15μH + 4+ 15μH, THD 1%
f = 1kHz, 22kHz BW
VDD = 5V 1.9 W
VDD = 3.6V 1 W
VDD = 2.5V 0.430 W
RL= 15μH + 8+ 15μH, THD = 1%
f = 1kHz, 22kHz BW
VDD = 5V 1.25 W
VDD = 3.6V 0.63 W
VDD = 2.5V 0.285 W
PO= 500mW, f = 1kHz, RL = 80.07 %
THD+N Total Harmonic Distortion PO= 300mW, f = 1kHz, RL = 80.05 %
VRIPPLE = 200mVP-P Sine,
fRIPPLE = 217Hz, Inputs AC GND, 75 dB
Ci= 1μF, input referred
PSRR Power Supply Rejection Ratio VRIPPLE = 1VP-P Sine,
fRIPPLE = 1kHz, Inputs AC GND, 75 dB
Ci= 1μF, input referred
VRIPPLE = 1VP-P
CMRR Common Mode Rejection Ratio 67 dB
fRIPPLE = 217Hz
PO= 1W, f = 1kHz,
ηEfficiency 85 %
RL= 8, VDD = 5V
Xtalk Crosstalk PO= 500mW, f = 1kHz 84 dB
SNR Signal to Noise Ratio VDD = 5V, PO= 1W 96 dB
εOS Output Noise Input referred, A-Weighted Filter 20 μV
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PWM MODULATOR H-BRIDGE
OSCILLATOR
BIAS CLICK/POP
SUPPRESSION
PWM MODULATOR H-BRIDGE
GAIN
CONTROL
VDD
PVDD
INL+
INL-
G0
G1
INR+
INR-
GNDPGND SDR SDL
OUTLA
OUTLB
OUTRA
OUTRB
2.4V to 5.5V
PWM MODULATOR H-BRIDGE
OSCILLATOR
BIAS CLICK/POP
SUPPRESSION
PWM MODULATOR H-BRIDGE
GAIN
CONTROL
VDD
PVDD
INL+
INL-
G0
G1
INR+
INR-
GNDPGND SDR SDL
OUTLA
OUTLB
OUTRA
OUTRB
2.4V to 5.5V
LM4674
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BLOCK DIAGRAMS
Figure 4. Differential Input Configuration
Figure 5. Single-Ended Input Configuration
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10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
0.01
0.1
1
10
0.001
10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
0.01
0.1
1
10
0.001
0.001 0.01 0.1 1 10
OUTPUT POWER/CHANNEL (W)
THD+N (%)
VDD = 5V
VDD = 3.6V
VDD = 2.5V
0.01
0.1
1
10
100
0.001 0.01 0.1 1 10
OUTPUT POWER/CHANNEL (W)
THD+N (%)
VDD = 5V
VDD = 3.6V
VDD = 2.5V
0.01
0.1
1
10
100
0.001 0.01 0.1 1 10
OUTPUT POWER/CHANNEL (W)
THD+N (%)
VDD = 5V
VDD = 3.6V
VDD = 2.5V
0.01
0.1
1
10
100
0.001 0.01 0.1 1 10
THD+N (%)
VDD = 5V
VDD = 3.6V
VDD = 2.5V
0.01
0.1
1
10
100
OUTPUT POWER/CHANNEL (W)
LM4674
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TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Output Power THD+N vs Output Power
f = 1kHz, AV= 24dB, RL= 8f = 1kHz, AV= 6dB, RL= 8
Figure 6. Figure 7.
THD+N vs Output Power THD+N vs Output Power
f= 1kHz, AV= 24dB, RL= 4f = 1kHz, AV= 6dB, RL= 4
Figure 8. Figure 9.
THD+N vs Frequency THD+N vs Frequency
VDD = 2.5V, POUT = 100mW/ch, RL= 8VDD = 3.6V, POUT = 250mW/ch, RL= 8
Figure 10. Figure 11.
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0 500 1000 1500 2000
OUTPUT POWER (mW)
EFFICIENCY (%)
0
10
20
30
40
50
60
70
80
90
100
VDD
= 2.5V
VDD = 3.6V
VDD = 5V
10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
0.01
0.1
1
10
0.001
10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
0.01
0.1
1
10
0.001
10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
0.01
0.1
1
10
0.001
10 100 1000 10000 100000
FREQUENCY (Hz)
THD+N (%)
100
10
1
0.1
0.01
0.001
LM4674
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Frequency THD+N vs Frequency
VDD = 5V, POUT = 375mW/ch, RL= 8VDD = 2.5V, POUT = 100mW/ch, RL= 4
Figure 12. Figure 13.
THD+N vs Frequency THD+N vs Frequency
VDD = 3.6V, POUT = 250mW/ch, RL= 4VDD = 5V, POUT = 375mW/ch, RL= 4
Figure 14. Figure 15.
Efficiency vs Output Power/channel Efficiency vs Output Power/channel
RL= 4, f = 1kHz RL= 8, f = 1kHz
Figure 16. Figure 17.
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2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
OUTPUT POWER (mW)
0
500
1000
1500
2000
THD+N = 1%
THD+N = 10%
2500
3000
2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
OUTPUT POWER (mW)
0
500
1000
1500
2000
THD+N = 1%
THD+N = 10%
VDD = 2.5V
0 1000 2000 3000 4000
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
0
250
500
750
1000
VDD = 3.6V
VDD = 5V
POUT = POUTL + POUTR
0 500 1000 1500 2000 2500
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
VDD = 5V
VDD = 3.6V
VDD = 2.5V
POUT = POUTL + POUTR
0
100
200
300
400
LM4674
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power Dissipation vs Output Power Power Dissipation vs Output Power
RL= 4, f = 1kHz RL= 8, f = 1kHz
Figure 18. Figure 19.
Output Power/channel vs Supply Voltage Output Power/channel vs Supply Voltage
RL= 4, f = 1kHz RL= 8, f = 1kHz
Figure 20. Figure 21.
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2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
0
1
2
3
4
5
6
7
8
10 100 1000 10000 100000
FREQUENCY (Hz)
-80
-70
-60
-50
-40
-30
-20
-10
0
CMRR(dB)
10 100 1000 10000 100000
FREQUENCY (Hz)
PSRR (dB)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10 100 1000 10000 100000
FREQUENCY (Hz)
CROSSTALK (dB)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
LM4674
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR vs Frequency Crosstalk vs Frequency
VDD = 3.6V, VRIPPLE= 200mVP-P, RL= 8VDD = 3.6V, VRIPPLE = 1VP-P, RL= 8
Figure 22. Figure 23.
CMRR vs Frequency Supply Current vs Supply Voltage
VDD = 3.6V, VCM = 1VP-P, RL= 8RL=
Figure 24. Figure 25.
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APPLICATION INFORMATION
GENERAL AMPLIFIER FUNCTION
The LM4674 stereo Class D audio power amplifier features a filterless modulation scheme that reduces external
component count, conserving board space and reducing system cost. The outputs of the device transition from
VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs for each channel switch with
a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage across
the speaker, thus there is no current to the load in the idle state.
With the input signal applied, the duty cycle (pulse width) of the LM4674 outputs changes. For increasing output
voltage, the duty cycle of the A output increases, while the duty cycle of the B output decreases for each
channel. For decreasing output voltages, the converse occurs. The difference between the two pulse widths
yields the differential output voltage.
DIFFERENTIAL AMPLIFIER EXPLANATION
As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal
handling to preserve signal to noise ratios with restricted voltage signs. The LM4674 features two fully differential
amplifiers. A differential amplifier amplifies the difference between the two input signals. Traditional audio power
amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to
differential inputs. The LM4674 also offers the possibility of DC input coupling which eliminates the input coupling
capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio (CMRR)
over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity to ground
offset related noise injection, especially important in noisy systems.
POWER DISSIPATION AND EFFICIENCY
The major benefit of a Class D amplifier is increased efficiency versus a class AB amplifier. The efficiency of the
LM4674 is attributed to the region of operation of the transistors in the output stage. The Class D output stage
acts as current steering switches, consuming negligible amounts of power compared to their Class AB
counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET on-
resistance (RDS(ON)), along with switching losses due to gate charge.
SHUTDOWN FUNCTION
The LM4674 features independent left and right channel shutdown controls, allowing each channel to be
disabled independently. SDR controls the right channel, while SDL controls the left channel. Driving either low
disables the corresponding channel.
It is best to switch between ground and VDD for minimum current consumption while in shutdown. The LM4674
may be disabled with shutdown voltages in between GND and VDD, the idle current will be greater than the
typical 0.03µA value. For logic levels between GND and VDD bypass SD_ with a 0.1μF capacitor.
The LM4674 shutdown inputs have internal pulldown resistors. The purpose of these resistors is to eliminate any
unwanted state changes when SD_ is floating. To minimize shutdown current, SD_ should be driven to GND or
left floating. If SD_ is not driven to GND or floating, an increase in shutdown supply current will be noticed.
SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION
The LM4674 is compatible with single-ended sources. When configured for single-ended inputs, input capacitors
must be used to block any DC component at the input of the device. Figure 5 shows the typical single-ended
applications circuit.
AUDIO AMPLIFIER POWER SUPPLY BYPASSING/FILTERING
Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass
capacitor as close to the device as possible. Typical applications employ a voltage regulator with 10µF and 0.1µF
bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the
LM4674 supply pins. A 1µF capacitor is recommended.
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AUDIO AMPLIFIER INPUT CAPACITOR SELECTION
Input capacitors may be required for some applications, or when the audio source is single-ended. Input
capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of
the audio source and the bias voltage of the LM4674. The input capacitors create a high-pass filter with the input
resistance Ri. The -3dB point of the high pass filter is found using Equation (1) below.
f = 1 / 2πRiCi(1)
The values for Ri can be found in the EC table for each gain setting.
The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers
cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps
protect the speakers. When the LM4674 is using a single-ended source, power supply noise on the ground is
seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217 Hz in a
GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors
with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR.
AUDIO AMPLIFIER GAIN SETTING
The LM4674 features four internally configured gain settings. The device gain is selected through the two logic
inputs, G0 and G1. The gain settings are as shown in the following table.
LOGIC INPUT GAIN
G1 G0 V/V dB
0026
0 1 4 12
1 0 8 18
1 1 16 24
PCB LAYOUT GUIDELINES
As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and
power supply create a voltage drop. The voltage loss due to the traces between the LM4674 and the load results
in lower output power and decreased efficiency. Higher trace resistance between the supply and the LM4674 has
the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing peak output
power. The effects of residual trace resistance increases as output current increases due to higher output power,
decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output
power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should
be as wide as possible to minimize trace resistance.
The use of power and ground planes will give the best THD+N performance. In addition to reducing trace
resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line.
The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the
parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that
can radiate or conduct to other components in the system and cause interference. In is essential to keep the
power and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout
techniques are all useful in preventing unwanted interference.
As the distance from the LM4674 and the speaker increases, the amount of EMI radiation increases due to the
output wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close
to the LM4674 outputs may be needed to reduce EMI radiation.
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C5
1 PF
C6
1 PF
A1
B1
INL-
INL+
VDD
SDL
LM4674TL
U1
JP5
B4 SDL
VDD
SDR
JP4 B3 SDR
INL+
INL-
JP3
VDD
VDD
VDD
GND
JP7 VDD
G1
B2 G1
SDL
SDRG1
VDD
GND
JP6 VDD
G0
G0
C2 G0
LEFT INPUT
C4
1 PF
C3
1 PF
C1
D1
INR-
INR+
C3 GND
D2 VDD
C1
1 PF
C11
10 PF
VDD
GND
JP1
POWER
VDD
C2
1 PF
C4
A2
PGND
PVDD
INR+
INR-
JP2
RIGHT INPUT 1
2
JP9
Header 2
L1
1 mH
D3
OUTRA
D4
OUTRB
L2
1 mH
C7
0.022 PF
C8
0.022 PF
R1
300 1
2
JP10
Right Output
1
2
JP8
Header 2
L4
1 mH
A3
OUTLA
A4
OUTLB
L3
1 mH
C10
0.022 PF
C9
0.022 PF
R2
300 1
2
JP11
Left Output
+
LM4674
SNAS344E DECEMBER 2005REVISED APRIL 2013
www.ti.com
LM4674TL DEMO BOARD SCHEMATIC
Figure 26. LM4674TL Demo Board Schematic
LM4674TL DEMONSTRATION BOARD LAYOUT
Figure 27. Layer 1
14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM4674
LM4674
www.ti.com
SNAS344E DECEMBER 2005REVISED APRIL 2013
Figure 28. Layer 2
Figure 29. Layer 3
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM4674
LM4674
SNAS344E DECEMBER 2005REVISED APRIL 2013
www.ti.com
Figure 30. Layer 4
Figure 31. Top Silkscreen
16 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM4674
LM4674
www.ti.com
SNAS344E DECEMBER 2005REVISED APRIL 2013
Figure 32. Bottom Silkscreen
LM4674SQ DEMO BOARD SCHEMATIC
Figure 33. LM4674SQ Demo Board Schematic
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM4674
LM4674
SNAS344E DECEMBER 2005REVISED APRIL 2013
www.ti.com
LM4674SQ DEMONSTRATION BOARD LAYOUT
Figure 34. Layer 1
Figure 35. Layer 2
Figure 36. Layer 3
18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM4674
LM4674
www.ti.com
SNAS344E DECEMBER 2005REVISED APRIL 2013
Figure 37. Top Silkscreen
Figure 38. Bottom Layer
REVISION TABLE
Rev Date Description
1.0 12/16/06 Initial release.
1.1 05/17/06 Added the LLP package.
1.2 05/31/06 Added the LLP markings.
1.3 09/05/06 Added “No Load” in the Conditions on Av (3.6V table).
1.4 09/21/06 Edited graphics (26, 38, 60) and input some text edits.
1.5 09/27/06 Edited Figure 1 (page 2), TL and LLP pkg/marking drawings (page 3).
Input text edits.
1.6 07/13/07 Added the TL and SQ demo boards and schematics diagrams.
1.7 10/30/07 Updated the SQ schematic diagram and replaced the demo boards.
1.8 07/02/08 Text edits (under SHUTDOWN FUNCTION).
E 04/05/13 Changed layout of National Data Sheet to TI format.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM4674
PACKAGE OPTION ADDENDUM
www.ti.com 26-Aug-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4674SQ/NOPB ACTIVE WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L4674SQ
LM4674TLX/NOPB ACTIVE DSBGA YZR 16 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 GG2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4674SQ/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM4674TLX/NOPB DSBGA YZR 16 3000 178.0 8.4 2.08 2.08 0.76 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4674SQ/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM4674TLX/NOPB DSBGA YZR 16 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 12-Aug-2013
Pack Materials-Page 2
MECHANICAL DATA
YZR0016xxx
www.ti.com
TLA16XXX (Rev C)
0.600±0.075 D
E
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
4215051/A 12/12
D: Max =
E: Max =
1.99 mm, Min =
1.99 mm, Min =
1.93 mm
1.93 mm
www.ti.com
PACKAGE OUTLINE
C
SEE TERMINAL
DETAIL
16X 0.3
0.2
2.6 0.1
16X 0.5
0.3
0.8 MAX
(A) TYP
0.05
0.00
12X 0.5
4X
1.5
B4.1
3.9 A
4.1
3.9 0.3
0.2
0.5
0.3
WQFN - 0.8 mm max heightRGH0016A
PLASTIC QUAD FLATPACK - NO LEAD
4214978/B 01/2017
DIM A
OPT 1 OPT 1
(0.1) (0.2)
PIN 1 INDEX AREA
0.08
SEATING PLANE
1
49
12
58
16 13
(OPTIONAL)
PIN 1 ID
0.1 C A B
0.05
EXPOSED
THERMAL PAD
17 SYMM
SYMM
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
SCALE 3.000
DETAIL
OPTIONAL TERMINAL
TYPICAL
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
16X (0.25)
16X (0.6)
( 0.2) TYP
VIA
12X (0.5)
(3.8)
(3.8)
(1)
( 2.6)
(R0.05)
TYP
(1)
WQFN - 0.8 mm max heightRGH0016A
PLASTIC QUAD FLATPACK - NO LEAD
4214978/B 01/2017
SYMM
1
4
58
9
12
13
16
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
17
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
16X (0.6)
16X (0.25)
12X (0.5)
(3.8)
(3.8)
4X ( 1.15)
(0.675)
TYP
(0.675) TYP
(R0.05)
TYP
WQFN - 0.8 mm max heightRGH0016A
PLASTIC QUAD FLATPACK - NO LEAD
4214978/B 01/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SYMM
TYP
EXPOSED METAL
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 17
78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
SYMM
1
4
58
9
12
13
16
17
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