IDT5962-9221802M2A - Integrated Device Technology, Inc.

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

1JUNE 2002MILITARY AND INDUSTRIAL TEMPERATURE RANGES

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Std., A, and C grades

• Low input and output leakage ≤≤

≤≤

≤1µA (max.)

• CMOS power levels

• True TTL input and output compatibility:

–VOH = 3.3V (typ.)

–VOL = 0.3V (typ.)

• High Drive outputs (-15mA IOH, 48mA IOL)

• Meets or exceeds JEDEC standard 18 specifications

• Military product compliant to MIL-STD-883, Class B and DESC

listed (dual marked)

• Power off disable outputs permit "live insertion"

• Available in the following packages:

– Industrial: SOIC, SSOP, QSOP, TSSOP

– Military: CERDIP, LCC

FUNCTIONAL BLOCK DIAGRAM

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D

DESCRIPTION:

The FCT374T is an 8-bit register built using an advanced dual metal

CMOS technology. These registers consist of eight D-type flip-flops with a

buffered common clock and buffered 3-state output control. When the output

enable (OE) input is low, the eight outputs are enabled. When the OE input

is high, the outputs are in the high-impedance state.

Input data meeting the set-up and hold time requirements of the D inputs

is transferred to the Q outputs on the low-to-high transition of the clock input.

CP D

QQQ QQQQ

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

PIN CONFIGURATION

Symbol Description Max Unit

VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V

VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V

TSTG Storage Temperature –65 to +150 °C

IOUT DC Output Current –60 to +120 mA

ABSOLUTE MAXIMUM RATINGS(1)

NOTES:

1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability. No terminal voltage may exceed

Vcc by +0.5V unless otherwise noted.

2. Inputs and Vcc terminals only.

3. Output and I/O terminals only.

Symbol Parameter(1) Conditions Typ. Max. Unit

CIN Input Capacitance VIN = 0V 6 10 pF

COUT Output Capacitance VOUT = 0V 8 12 pF

CAPACITANCE (TA = +25°C, F = 1.0MHz)

NOTE:

1. This parameter is measured at characterization but not tested.

CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP

TOP VIEW LCC

TOP VIEW

VCC

GND

810 11 12 13 14

1920

GND

INDEX

NOTE:

1 . H = HIGH Voltage Level

X = Don’t Care

L = LOW Voltage Level

Z = High Impedance

NC = No Change

↑ = LOW-to-HIGH transition

FUNCTION TABLE(1)

Inputs Outputs Internal

Function OE CP Dx Qx Qx

High-Z H L X Z NC

HHXZNC

Load L ↑LLH

H↑LZH

H↑HZL

Pin Names Description

Dx D flip-flop data inputs

CP Clock Pulse for the register. Enters data on LOW-to-

HIGH transition.

Qx 3-State Outputs (TRUE)

Qx 3-State Outputs (INVERTED)

OE Active LOW 3-State Output Enable Input

PIN DESCRIPTION

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit

VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V

VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V

IIH Input HIGH Current(4) VCC = Max. VI = 2.7V — — ±1µA

IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1µA

IOZH High Impedance Output Current VCC = Max VO = 2.7V — — ±1µA

IOZL (3-State output pins)(4) VO = 0.5V — — ±1

IIInput HIGH Current(4) VCC = Max., VI = VCC (Max.) — — ±1µA

VIK Clamp Diode Voltage VCC = Min, IIN = -18mA — –0.7 –1.2 V

VHInput Hysteresis — — 200 — m V

ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.01 1 µA

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4 . The test limit for this parameter is ±5µA at TA = –55°C.

Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit

VOH Output HIGH Voltage VCC = Min IOH = –6mA MIL 2.4 3.3 —

VIN = VIH or VIL IOH = –8mA IND V

IOH = –12mA MIL 2 3 —

IOH = –15mA IND

VOL Output LOW Voltage VCC = Min IOL = 32mA MIL — 0.3 0.5 V

VIN = VIH or VIL IOL = 48mA IND

IOS Short Circuit Current VCC = Max., VO = GND(3) –60 –120 –225 mA

OUTPUT DRIVE CHARACTERISTICS

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit

∆ICC Quiescent Power Supply Current VCC = Max. — 0.5 2 mA

TTL Inputs HIGH VIN = 3.4V(3)

ICCD Dynamic Power Supply VCC = Max. VIN = VCC — 0.15 0.25 mA/

Current(4) Outputs Open VIN = GND M Hz

OE = GND

One Input Toggling

50% Duty Cycle

ICTotal Power Supply Current(6) VCC = Max. VIN = VCC — 1.5 3.5 mA

Outputs Open VIN = GND

fCP = 10MHz

50% Duty Cycle

OE = GND VIN = 3.4V — 2 5.5

fi = 5MHz VIN = GND

One Bit Toggling

50% Duty Cycle

VCC = Max. VIN = VCC — 3.8 7.3(5)

Outputs Open VIN = GND

fCP = 10MHz

50% Duty Cycle

OE = GND VIN = 3.4V — 6 16.3(5)

Eight Bits Toggling VIN = GND

fi = 2.5MHz

50% Duty Cycle

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ f iNi)

ICC = Quiescent Current

∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

fi = Output Frequency

Ni = Number of Outputs at fi

All currents are in milliamps and all frequencies are in megahertz.

POWER SUPPLY CHARACTERISTICS

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not tested.

74FCT374AT 74FCT374CT

Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit

tPLH Propagation Delay CL = 50pF 2 6.5 2 5.2 ns

tPHL CP to Qx RL = 500Ω

tPZH Output Enable Time 1.5 6.5 1.5 5.5 ns

tPZL

tPHZ Output Disable Time 1.5 5.5 1.5 5 ns

tPLZ

tSU Set-up Time HIGH or LOW 2 — 2 — n s

Dx to CP

tHHold Time HIGH or LOW 1.5 — 1.5 — ns

Dx to CP

tWCP Pulse Width HIGH or LOW (3) 5—5—ns

SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL

54FCT374T 54FCT374AT 54FCT374CT

Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit

tPLH Propagation Delay CL = 50pF 2 11 2 7.2 2 6.2 ns

tPHL CP to Qx RL = 500Ω

tPZH Output Enable Time 1.5 14 1.5 7.5 1.5 6.2 ns

tPZL

tPHZ Output Disable Time 1.5 8 1.5 6.5 1.5 5.7 ns

tPLZ

tSU Set-up Time HIGH or LOW 2 — 2 — 2 — n s

Dx to CP

tHHold Time HIGH or LOW 1.5 — 1.5 — 1.5 — ns

Dx to CP

tWCP Pulse Width HIGH or LOW (3) 7— 6 — 6 —ns

SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

Pulse

Generator

D.U.T

VCC

VIN

VOUT

50pF 500Ω

500Ω

7.0V

1.5V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CO NTROL

tSU tH

tREM

tSU tH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

1.5V

SAME PHASE

INPUT TRANSITION

1.5V

VOH

tPLH

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

1.5V

tPLH tPHL

tPHL

VOL

CONTROL

INPUT

1.5V

3.5V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH

CLOSED

SWITCH

OPEN

VOL

0.3V

tPLZtPZL

tPZH tPHZ

3.5V

1.5V

ENABLE DISABLE

VOH

PRESET

CLEAR

CLOCK ENABLE

ETC.

Octal link

TEST CIRCUITS AND WAVEFORMS

Propagation Delay

Test Circuits for All Outputs

Enable and Disable Times

Set-Up, Hold, and Release Times

Pulse Width

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

Test Switch

Open Drain

Disable Low Closed

Enable Low

All Other Tests Open

SWITCH POSITION

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

IDT54/74FCT374T/AT/CT

FAST CMOS OCTAL D REGISTER (3-STATE)

ORDERING INFORMATION

IDT XX

Temp. R ange FCT XXXX

Device Type XX

Package X

Process

Fast CMOS Octal D Register (3-State)

374T

374AT

374CT

Indust r ial O pti ons

Small Outline IC

Shrink Small Outline P ackage

Quar ter-si ze Small Outline Package

Thin S hrink Small Outl ine Pack age

Military Options

CERDIP

Leadless Chip Carrier

Blank

BIndustrial

MI L-STD-883, Class B

74 – 55°C to +125°C

– 40°C to +85°C

CORPORATE HEADQUARTERS for SALES: for Tech Support:

2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com

Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459

www.idt.com

6/26/2002 Updated as per PDNs Logic-00-07 and Logic-01-04

DATA SHEET DOCUMENT HISTORY