SiP32475
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47 m, 1.2 V to 5.5 V,
Low Quiescent Current Load Switch in Ultra Thin μDFN-4
DESCRIPTION
The SiP32475 is a compact, ultra thin high side load switch
that operates over a input voltage range from 1.2 V to 5.5 V.
Designed with a p-channel MOSFET featuring an adaptive
charge pump gate drive, the SiP32475 provides 47 m
switch on-resistance over a wide input voltage range and
maintains a low quiescent current level.
The SiP32475 also features slew rate control, reverse
blocking when the switch is off, and output discharge. With
guaranteed 1 V control logic high, the SiP32475 can
interface directly with a low voltage control I/O, without the
need for an extra level shift or driver. The device is logic high
enabled and a 2.8 M pull-down resistor is integrated at the
logic control EN pin. The slow slew rate of the SiP32475
limits the in-rush current and minimizes the switching noise.
The SiP32475 is available in the µDFN-4L 1 mm x 1 mm
package with a 0.3 mm thickness. The device is specified for
operation over a temperature range of -40 °C to +85 °C.
FEATURES
• 1.2 V to 5.5 V input voltage range
• 47 m typical on-resistance
• 3 µA quiescent current
• 2 A maximum continuous switch current
• Slew rate controlled turn-on: 160 µs
• Guaranteed 1 V logic high over the input voltage range
• Reverse current blocking when the switch is off or VIN is
ground
• Integrated output discharge switch
• ESD performance per JESD 22: 4 kV HBM
• Compact µDFN-4L package with 0.3 mm thickness
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• PDAs / smart phones
• Notebook / netbook computers
•Tablet PCs
• Portable media players
• Digital cameras
• GPS navigation devices
• Data storage devices
• Medical and healthcare devices
TYPICAL APPLICATION CIRCUIT
Fig. 1 - Typical Application Circuit
Available
SiP32475
IN VOUT
OUT
VIN
GND
GND
GND
EN
EN
CIN COUT
SiP32475
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PIN CONFIGURATION
Fig. 2 - μDFN-4L 1 mm x 1 mm
DEVICE MARKING
Fig. 3 - μDFN-4L 1 mm x 1 mm
ORDERING INFORMATION
PART NUMBER PACKAGE ton
(μs) RDISCHARGE MARK CODE TEMPERATURE RANGE
SiP32475DN-T1-GE4 µDFN-4L 1 mm x 1 mm 300 Yes D-40 °C to +85 °C
PIN DESCRIPTION
PIN# NAME FUNCTION
3OUT Switch output
2IN Switch input
4GND Ground connection
1EN Switch on/off control. A pull down resistor is integrated
TRUTH TABLE
EN SWITCH
1ON
0OFF
GND
EN
OUT
IN
Bottom View
Pin 1 Indicator
2
1
3
4
Pin 1 Indicator
DW
Line 1 : Plant code
Line 2 : D = Device part number
W = Assembly week
Line 3 : Pin 1 dot + fab code DW
SiP32475
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Notes
(1) Negative current injection up to 300 mA
(2) Measured on 2 oz double side layer 1 x 1 inch board
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
PARAMETER CONDITIONS LIMIT UNIT
Supply input voltage VIN Reference to GND -0.3 to +6.5
V
Output voltage VOUT Reference to GND -0.3 to +6.5
Output voltage VOUT Pulse at 1 ms reference to GND (1) -1.6
Enable input voltage EN Reference to GND -0.3 to +6.5
Maximum continuous switch current 2 A
Maximum pulse switch current Pulse at 1 ms, 10 % duty cycle 2.5
ESD rating (HBM) 4000 V
Thermal resistance, junction-to-ambient (2) 150 °C/W
Maximum power dissipation (2) TA = 25 °C 650 mW
TEMPERATURE
Operating temperature -40 to +85
°COperating junction temperature 125
Storage temperature -65 to +150
RECOMMENDED OPERATING RANGE
ELECTRICAL PARAMETER MINIMUM TYPICAL MAXIMUM UNIT
Input voltage (VIN) 1.2 - 5.5 V
Output voltage (VOUT)0-5.5
SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
VIN = 1.2 V to 5.5 V, TA = -40 °C to +85 °C
(Typical values are at 25 °C)
LIMITS
UNIT
MIN. TYP. MAX.
POWER SUPPLY
Quiescent current IQVIN = 3.3 V, IOUT = 0 mA - 4.7 7
µA
Shutdown current ISD OUT = GND - 0.001 2
Off switch current IDS(off) EN = GND, OUT = GND - 0.001 2
Reverse blocking current I(in)RB
Out = 5 V, IN = 1.2 V, EN = 0 V, (Measured at IN pin) - 0.01 1
Out = 5 V, IN = 0 V, EN = 0 V, (Measured at IN pin) - 0.12 1
SWITCH RESISTANCE
On resistance RDS(on)
IOUT = 500 mA, VIN = 1.2 V, TA = 25 °C - 92 120
m
IOUT = 500 mA, VIN = 1.5 V, TA = 25 °C - 74 90
IOUT = 500 mA, VIN = 1.8 V, TA = 25 °C - 64 80
IOUT = 500 mA, VIN = 3 V, TA = 25 °C - 49 60
IOUT = 500 mA, VIN = 5 V, TA = 25 °C - 47 60
Discharge switch on resistance RPD
When VIN = 3 V at 25 °C - 77 -
When VIN = 1.8 V at 25 °C - < 200 -
EN pin pull down resistor REN EN = 1.2 V 1 2.6 6 M
On resistance temperature
coefficient TCRDS - 2800 - ppm/°C
SiP32475
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BLOCK DIAGRAM
Fig. 4 - Functional Block Diagram
ON/OFF LOGIC
EN input low voltage VIL VIN = 1.5 V 0.4 - - V
EN input high voltage VIH VIN = 5.5 V - - 1
SWITCHING SPEED
Switch turn-on delay time ton_DLY
RLOAD = 500 , CL = 0.1 µF
VIN = 5 V -138-
µs
Switch turn-on rise time tr
RLOAD = 500 , CL = 0.1 µF
VIN = 5 V -162-
Switch turn-off delay time toff_DLY RLOAD = 500 , CL = 0.1 µF,
(50 % VIN to 90 % VOUT)-3-
SPECIFICATIONS
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
VIN = 1.2 V to 5.5 V, TA = -40 °C to +85 °C
(Typical values are at 25 °C)
LIMITS
UNIT
MIN. TYP. MAX.
Control
Logic
Charge
Pump Tur n O n
Slew Rate
Control
Reverse
Blocking
IN
EN
OUT
GND
SiP32475
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TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
Fig. 5 - Quiescent Current vs. Input Voltage
Fig. 6 - Reverse Blocking Current vs. Temperature
Fig. 7 - Off Supply Current vs. Temperature
Fig. 8 - Quiescent Current vs. Temperature
Fig. 9 - Off Supply Current vs. Input Voltage
Fig. 10 - Off Switch Current vs. Input Voltage
10
100
1000
10000
0
1
2
3
4
5
6
7
8
01234567
Axis Title
1st line
2nd line
IQ-Quiescent Current (μA)
VIN - Input Voltage (V)
2nd line
10
100
1000
10000
-5000
-4000
-3000
-2000
-1000
0
-40 -10 20 50 80 110 140
Axis Title
1st line
2nd line
I(IN)RB - Input Current (nA) )
Temperature (ºC)
VIN = 1.2 V
VIN = 0 V
VOUT = 5 V
10
100
1000
10000
0.001
0.01
0.1
1
10
100
1000
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
IQ(OFF) - Off Supply Current (nA)
Temperature (°C)ine
V
IN
= +5.5 V
V
IN
= +1.0 V
V
IN
= +1.2 V
V
IN
= +2.5 V
V
IN
= +3.3 V
V
IN
= +5 V
10
100
1000
10000
0
1
2
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100 120 140
Axis Title
1st line
2nd line
IQ-Quiescent Current (μA)
Temperature (ºC)
VIN = 5.5 V
VIN = 5 V VIN = 3.3 V
VIN = 2.5 V
VIN = 1 V
VIN = 1.2 V
10
100
1000
10000
0
100
200
300
400
500
600
700
800
900
01234567
Axis Title
1st line
2nd line
IQ(OFF) -Off Supply Current (nA)
VIN - Input Voltage (V)2nd line
OUT=OPEN
10
100
1000
10000
0
100
200
300
400
500
600
700
800
900
012345678
Axis Title
1st line
2nd line
IDS(off) -Off Switch Current (nA)
VIN - Input Voltage (V)
IN Current
OUT = GND
SiP32475
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TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
Fig. 11 - Reverse Blocking Current vs. Output Voltage
Fig. 12 - Off Switch Current vs. Temperature
Fig. 13 - RDS(on) vs. Input Voltage
Fig. 14 - Turn-on Delay Time vs. Temperature
Fig. 15 - EN Threshold Voltage vs. Input Voltage
Fig. 16 - RDS(on) vs. Temperature
10
100
1000
10000
-1200
-1000
-800
-600
-400
-200
0
200
01234567
Axis Title
1st line
2nd line
I(IN)RB - Input Current (nA)
VOUT - Output Voltage (V)line
V
IN
= +1.2 V
V
IN
= 0 V
10
100
1000
10000
0.0001
0.001
0.01
0.1
1
10
100
1000
10 000
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
IDS(off) - Off Switch Current (nA)
Temperature (°C)
VIN = 5.5 V
VIN = 1 V
VIN = 1.2 V
VIN = 2.5 V
VIN = 3.3 V
VIN = 5 V
10
100
1000
10000
40
50
60
70
80
90
100
110
120
130
123456
Axis Title
1st line
2nd line
RDS(ON) -On-Resistance (m)
VIN - Input Voltage (V)
IOUT = 1.5 A
IOUT =100 mA and 200 mA
IOUT = 500 mA
IOUT = 1 A
10
100
1000
10000
80
90
100
110
120
130
140
150
160
170
180
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
2nd line
tON_DLY - Turn-On Delay Time (s)
Temperature (°C)
2nd line
VIN = 5 V,
RL= 500 Ω,
CL= 0.1 µF
10
100
1000
10000
0.4
0.5
0.6
0.7
0.8
0.9
1.0
01234567
Axis Title
1st line
2nd line
VEN-EN Threshold Voltage (V)
VIN - Input Voltage (V)
VIH
VIL
10
100
1000
10000
30
40
50
60
70
80
90
100
110
120
130
140
150
160
170
180
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
2nd line
RDS(ON) -On-Resistance (m)
Temperature (°C)
VIN = 1 V
VIN = 5 V and 5.5 V
VIN = 3.3 V
VIN = 2.5 V
VIN = 1.2 V
IOUT = 500 mA
SiP32475
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TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
Fig. 17 - Rise Time vs. Temperature Fig. 18 - Turn-off Delay Time vs. Temperature
Fig. 19 - Output Pulldown Resistance vs. Temperature
10
100
1000
10000
120
130
140
150
160
170
180
190
200
210
220
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
tr-Rise Time (s)
Temperature (ºC)line
V
IN
= 5 V,
R
L
= 500 Ω,
C
L
= 0.1 µF
10
100
1000
10000
1
1.5
2
2.5
3
3.5
4
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
tOFF_DLY - Turn-Off Delay Time (μs)
Temperature (ºC)
V
IN
= 5 V,
R
L
= 500 Ω,
C
L
= 0.1 µF
10
100
1000
10000
50
70
90
110
130
150
170
190
210
230
250
270
290
-40-20 0 20406080100120140
Axis Title
1st line
2nd line
RPD -Output Pulldown Resistance ()
Temperature (ºC)
V
IN
= V
OUT
= 3 V
I
OUT
= 5 mA
SiP32475
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TYPICAL WAVEFORMS
Fig. 20 - Enable Power Up
Fig. 21 - Enable Power Up
Fig. 22 - Enable Power Up
Fig. 23 - Enable Power Down
Fig. 24 - Enable Power Down
Fig. 25 - Enable Power Down
VOUT(200mV/div)
VIN(200mV/div)
VEN(500mV/div)
IOUT(10mA/div)
VIN=1.2V
RL=500Ω
CL=0.1μF
200 µs/div
VIN(500mV/div)
VOUT(500mV/div)
VEN(500mV/div)
IOUT(10mA/div)
VIN=1.8V
RL=500Ω
CL=0.1μF
100 µs/div
VIN=3.3V
RL=500Ω
CL=0.1μF
VIN(500mV/div)
VEN(1V/div)
VOUT(500mV/div)
IOUT(10mA/div)
100 µs/div
VIN(200mV/div)
VOUT(200mV/div)
VEN(500mV/div)
IOUT(10mA/div)
VIN=1.2V
RL=500Ω
CL=0.1μF
100 µs/div
VIN(500mV/div)
VEN(500mV/div)
VOUT(500mV/div)
IOUT(10mA/div)
VIN=1.8V
RL=500Ω
CL=0.1μF
20 µs/div
VIN=3.3V
RL=500Ω
CL=0.1μF
VIN(500mV/div)
VOUT(500mV/div)
VEN(1V/div)
IOUT(10mA/div)
10 µs/div
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TYPICAL WAVEFORMS
Fig. 26 - Enable Power Up
Fig. 27 - Enable Power Up
Fig. 28 - Enable Power Up
Fig. 29 - Enable Power Down
Fig. 30 - Enable Power Down
Fig. 31 - Enable Power Down
VIN=5.0V
RL=500Ω
CL=0.1μF
VIN(1V/div)
VOUT(1V/div)
VEN(1V/div)
IOUT(10mA/div)
100 µs/div
VIN=5.5V
RL=500Ω
CL=0.1μF
VEN(1V/div)
VIN(1V/div)
VOUT(1V/div)
IOUT(10mA/div)
100 µs/div
VIN=1.2V
IL=1.2A
CL=0.1μF
VEN(500mV/div)
VIN(200mV/div)
VOUT(200mV/div)
IOUT(200mA/div)
500 µs/div
VIN(1V/div)
VEN(1V/div)
VOUT(1V/div)
IOUT(10mA/div)
VIN=5.0V
RL=500Ω
CL=0.1μF
10 µs/div
VIN=5.5V
RL=500Ω
CL=0.1μF
VEN(1V/div) VIN(1V/div)
V
OUT
(1V/div)
IOUT(10mA/div)
10 µs/div
VIN=1.2V
IL=1.2A
CL=0.1μF
VEN(500mV/div)
VIN(200mV/div)
VOUT(200mV/div)
IOUT(200mA/div)
500 µs/div
SiP32475
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TYPICAL WAVEFORMS
Fig. 32 - Enable Power Up
Fig. 33 - Enable Power Up
Fig. 34 - Enable Power Up
Fig. 35 - Enable Power Down
Fig. 36 - Enable Power Down
Fig. 37 - Enable Power Down
VIN=1.8V
IL=1.2A
CL=0.1μF
VEN(500mV/div)
VIN(500mV/div)
VOUT(500mV/div)
IOUT(200mA/div)
500 µs/div
VIN=3.3V
IL=1.2A
CL=0.1μF
VEN(1V/div)
VIN(1V/div)
VOUT(1V/div)
IOUT(500mA/div)
200 µs/div
VIN=5V
IL=1.2A
CL=0.1μF
VEN(1V/div)
VIN(1V/div)
VOUT(1V/div)
IOUT(500mA/div)
200 µs/div
VIN=1.8V
IL=1.2A
CL=0.1μF
VEN(500mV/div)
VIN(500mV/div)
VOUT(500mV/div)
IOUT(200mA/div)
5 µs/div
VIN=3.3V
IL=1.2A
CL=0.1μF
VEN(1V/div)
VIN(1V/div)
VOUT(1V/div)
IOUT(500mA/div)
2 µs/div
VIN=5V
IL=1.2A
CL=0.1μF
VEN(1V/div)
VIN(1V/div)
VOUT(1V/div)
IOUT(500mA/div)
2 µs/div
SiP32475
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DETAILED DESCRIPTION
SiP32475 is high side, slew rate controlled, load switch. It
incorporates a negative charge pump at the gate to keep the
gate to source voltage high when turned on. This keeps the
on resistance low at lower input voltages. SiP32475 is
designed with slow slew rate to minimize inrush current
during turn on. SiP32475 has a reverse blocking circuit,
when disabled, to prevent the current from going back to the
input when the output voltage is higher than the input
voltage. SiP32475 has an output pull down resistor to
discharge the output capacitance when the device is off.
APPLICATION INFORMATION
Input Capacitor
While a bypass capacitor on the input is not required, a
4.7 µF or larger capacitor for CIN is recommended in almost
all applications. The bypass capacitor should be placed as
physically close as possible to the input pin to be effective
in minimizing transients on the input. Ceramic capacitors are
recommended over tantalum because of their ability to
withstand input current surges from low impedance sources
such as batteries in portable devices.
Output Capacitor
A 0.1 µF capacitor across VOUT and GND is recommended
to insure proper slew operation. There is inrush current
through the output MOSFET and the magnitude of the
inrush current depends on the output capacitor, the bigger
the COUT the higher the inrush current. There is no ESR or
capacitor type requirement.
Enable
The EN pin is compatible with CMOS logic voltage levels. It
requires at least 0.4 V or below to fully shut down the device
and 1 V or above to fully turn on the device. There is a
2.6 M resistor connected between EN pin and GND pin.
Protection Against Reverse Voltage Condition
This device contains a reverse blocking circuit. When
disabled (VEN less than 0.4 V) this circuit keeps the output
current from flowing back to the input when the output
voltage is higher than the input voltage.
Thermal Considerations
Due to physical limitations of the layout and assembly of the
device the maximum switch current is 2 A as stated in the
Absolute Maximum Ratings table. However, another limiting
characteristic for the safe operating load current is the
thermal power dissipation of the package.
The maximum power dissipation in any application is
dependent on the maximum junction temperature,
TJ(max.) = 125 °C, the junction-to-ambient thermal
resistance, J-A = 150 °C/W, and the ambient temperature,
TA, which may be expressed as:
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to
about 666 mW.
So long as the load current is below the 2 A limit, the
maximum continuous switch current becomes a function
two things: the package power dissipation and the RDS(on) at
the ambient temperature.
As an example let us calculate the worst case maximum
load current at TA = 70 °C. The worst case RDS(on) at 25 °C is
120 m at VIN = 1.5 V. The RDS(on) at 70 °C can be
extrapolated from this data using the following formula:
RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x T)
Where TC is 2800 ppm/°C. Continuing with the calculation
we have
RDS(on) (at 70 °C) = 120 m x (1 + 0.0028 x (70 °C - 25 °C))
= 135 m
The maximum current limit is then determined by
which in this case is 2.2 A. Under the stated input voltage
condition, if the 2.2 A current limit is exceeded the internal
die temperature will rise and eventually, possibly damage
the device.
To avoid possible permanent damage to the device and
keep a reasonable design margin, it is recommended to
operate the device maximum up to 2 A only as listed in the
“Absolute Maximum Ratings” table.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?75792
150
125
(max.)
(max.)
A
A
J
A
J
T
TT
P
-
=
-
=
-
θ
)(
(max.)
(max.)
onDS
LOAD
R
P
I<
Package Information
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μDFN-4L 1 mm x 1 mm Case Outline
Notes
(1) Use millimeters as the primary measurement
(2) Dimensioning and tolerances conform to ASME Y14.5M-1994
(3) N is the number of terminals
Nd and Ne is the number of terminals in each D and E site respectively
(4) Dimensions b applies to plated terminal and is measured between 0.20 mm and 0.30 mm from terminal tip
(5) The pin 1 identifier must be existed on the top surface of the package by using indentation mark or other feature of package body
(6) Package warpage max. 0.05 mm
DIM. MILLIMETERS INCHES
MIN. NOM. MAX. MIN. NOM. MAX.
A 0.25 0.30 0.35 0.010 0.012 0.014
A1 0.00 - 0.05 0.000 - 0.002
b 0.20 0.25 0.30 0.008 0.010 0.012
D 0.95 1.00 1.05 0.037 0.039 0.041
E 0.95 1.00 1.05 0.037 0.039 0.041
e 0.50 BSC 0.020 BSC
K 0.20 Ref. 0.008 Ref.
K1 0.125 Ref. 0.005 Ref.
L 0.35 0.40 0.45 0.014 0.016 0.018
ECN: S17-1722-Rev. A, 27-Nov-17
DWG: 6059
0.1 C
0.10 CAB
M
0.05 C
M
Bottom view
Side view
Top view
0.1 C
0.05 C
0.05 C
2x
2x
A
B
E
D
e
K
L
K1
b
12
34
A1
A
C
Pin 1 index area
C 0.10
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Revision: 01-Jan-2019 1Document Number: 91000
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