NJM3524 SWITCHING REGULATOR CONTROL CIRCUIT GENERAL DESCRIPTION PACKAGE OUTLINE The NJM3524 of regulating pulse width modulators contains all of the control circuitry necessary to implement switching regulators of either polarity converters and voltage doublers, as well as other power control applications. This device includes a 5V voltage regulator capable of supplying up to 50mA to external circuitry a control amplifier, an oscillator, a pulse width modulator, a phase splitting flip-flop, dual alternating output NJM3524D NJM3524M switch transistors, and current limiting and shut-down circuitry. Both the regulator output transistor and each output switch are internally current limited and, to limit junction temperature, an internal thermal shut-down circuit is employed. NJM3524V FEATURES * Operating Voltage (8V to 40V) * Complete PWM Power Control Circuitry * Uncommitted Outputs for Single-Ended or Pash-Pull Appli Cutions * Low Stand by Current * Package Outline DIP16, DMP16, SSOP16 * Bipolar Technology RECOMMEND OPERATING CONDITION Parameter Symbol + Operating Voltage V Output Reference Current IREF Timing Resistance RT Timing Capacitor CT Operating Temperature Range Topr Min. 8 0 1.8 -20 PIN CONFIGURATION Typ. 20 25 Max. 40 50 100 0.1 75 Unit V mA k F C EQUIVALENT CIRCUIT Ver.2003-07-18 -1- NJM3524 ABSOLUTE MAXIMUM RATINGS PARAMETER (Ta = 25C) SYMBOL RATINGS UNIT Supply Voltage + V 40 V Output Current IO 100 mA Output Reference Current IREF 50 mA Power Dissipation PD (DIP16) 700 (DMP16) 300 Operating Temperature Range Topr -20 to + 75 C Storage Temperature Range Tstg -40 to +125 C mW mW ELECTRICAL CHARACTERISTICS Electrical characteristics over recommended operating free-air temperature range, V+ = 20V, f = 20kHz (unless otherwise noted). Reference Section PARAMETER Output Voltage Line Regulation Load Regulation SYMBOL VREF MIN. TYP. MAX. UNIT + TEST CONDITION 4.6 5.0 5.4 V + - 10 30 mV + - 20 50 mV + V = 20v + VREF-V V = 8 to 40V VREF-IREF V = 10V, IREF = 0 to 20mA Ripple Rejection RR V = 20V, f = 120Hz - 66 - dB Temperature Coefficient T. C. Ta = -20 to +75C - -1 - mV/C Short Circuit Output Current IREF S - 100 - mA Error Amplifier Section Input Offset Voltage VIO VIC = 2.5V - 2 10 mV Input Bias Current IB (1) VIC = 2.5V - 2 10 A 60 80 - dB 1.8 - 3.4 V Open Loop Voltage Gain AV Input Common Mode Voltage Range VCM Common Mode Rejection Ratio CMR - 70 - dB Unity Gain Bandwidth - - 3 - MHz Output Voltage Swing - 0.5 - 3.8 V - 30 - kHz Ta = 25C Oscillator Section Frequency fOSC CT = 0.01F, RT = 2k + Frequency Change with Voltage - V = 8 to 40V - - 1 % Frequency Change with Temperature - Ta = -20 to +75C - - 3 % Output Pulse Width (Pin 3) - CT = 0.01F - 0.5 - S Output Amplitude (Pin 3) - - 3.5 - V -2- Ver.2003-07-18 NJM3524 Comparator Section Maximum Duty Cycle - Input Threshold (Pin 9) VIH Input Threshold (Pin 9) VIH Input Bias Current 0 - 45 % "0" duty cycle - 1.0 - V "Max" duty cycle - 3.5 - V - 1 - A -0.7 - +1.0 V 180 200 220 mV - 0.2 - mV/C 40 - - V IB (2) Current Limiting Section Input Voltage Range - Sense Voltage - Sense Voltage Temperature Coefficient - V(2) - V(1) 50mV Output Section Collector-Emitter Breakdown Voltage VCER Collector Leakage Current ICER VCE = 40V - 0.1 50 A VCE(SAT) IO = 50mA - 1 2 V 17 18 - V Collector-Emitter Saturation Voltage + Emitter Output Voltage - V = 20V, IF = -250A Turn-off Voltage Rise Time Tr RC = 2k - 0.2 - S Turn-on Voltage Fall Time TI RC = 2k - 0.1 - S IQ V+ = 40V, Pin(2) = 2V - 8 10 mA Total Device Standby Current 1, 4, 7, 8, 9, 11, 14 = GND All Other Inputs and Outputs Open BLOCK DIAGRAM Ver.2003-07-18 -3- NJM3524 ERROR AMPLIFIER BIAS CIRCUITS (A) Positive Output VO = (B) Negative Output VREF R2 + 1 2 R1 VO = - VREF R2 - 1 2 R1 CURRENT LIMIT (a) Take the detection output from the ground line side, because the input voltage range is -0.7V to +1.0V. (b) The sensing voltage is 200mV typical. 1 R2 IO(MAX) = (VSENSE + VO) RS R1 + R2 IOS = VSENSE RS SOFT START METHOD It is possible that the output stage is broken due to a wrong operation of circuits simultaneously when supply voltage was applied. This failure can be prevented by setting the error amplifier output to a low level for a certain time as shown in the right figure. In this case, the soft start time is determined by the time constant of RB and CB. OUTPUT CONFIGURATIONS Capacitor-Diode-Coupled Voltage Multiplier Output stage Single-Ended Inductor Circuit Transformer-Coupled Outputs TYPICAL APPLICATIONS Fig. 1 Capacitor-Diode Output Circuit -4- Fig. 2 Flyback Converter Circuit Fig. 3 Push-Pull Transformer-Coupled Circuit Ver.2003-07-18 NJM3524 POWER DISSIPATION VS. AMBIENT TEMPERATURE TYPICAL CHARACTERISTICS Reference Voltage vs. Operating Voltage Open Loop Voltage Gain vs. Frequency Standby Current vs. Operating Voltage RT, CT vs. Frequency [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2003-07-18 -5-