NJM3524
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Ver.2003-07-18
SWITCHING REGULATOR CONTROL CIRCUIT
■ GENERAL DESCRIPTION ■ PACKAGE OUTLINE
The NJM3524 of regulating pulse width modulators contains all of the
control circuitry necessary to implement switching regulators of either
polarity converters and voltage doublers, as well as other power control
applications. This device includes a 5V voltage regulator capable of
supplying up to 50mA to external circuitry a control amplifier, an oscillator,
a pulse width modulator, a phase splitting flip-flop, dual alternating output
switch transistors, and current limiting and shut-down circuitry. Both the
regulator output transistor and each output switch are internally current
limited and, to limit junction temperature, an internal thermal shut-down
circuit is employed.
■ FEATURES
• Operating Voltage (8V to 40V)
• Complete PWM Power Control Circuitry
• Uncommitted Outputs for Single-Ended or Pash-Pull Appli Cutions
• Low Stand by Current
• Package Outline DIP16, DMP16, SSOP16
• Bipolar Technology
■ RECOMMEND OPERATING CONDITION ■ PIN CONFIGURATION
Parameter
Symbol
Min. Typ. Max. Unit
Operating Voltage V+ 8 20 40 V
Output Reference Current IREF 0 - 50 mA
Timing Resistance RT 1.8 - 100 kΩ
Timing Capacitor CT - 0.1 µF
Operating Temperature Range Topr -20 25 75 °C
■ EQUIVALENT CIRCUIT
NJM3524V
NJM3524MNJM3524D
NJM3524
- 2 - Ver.2003-07-18
■ ABSOLUTE MAXIMUM RATINGS (Ta = 25ºC)
PARAMETER SYMBOL RATINGS UNIT
Supply Voltage V+ 40 V
Output Current IO 100 mA
Output Reference Current IREF 50 mA
Power Dissipation PD (DIP16) 700
(DMP16) 300
mW
mW
Operating Temperature Range Topr -20 to + 75 ºC
Storage Temperature Range Tstg -40 to +125 ºC
■ ELECTRICAL CHARACTERISTICS
Electrical characteristics over recommended operating free-air temperature range, V+ = 20V, f = 20kHz
(unless otherwise noted).
Reference Section
PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Output Voltage VREF V
+ = 20v 4.6 5.0 5.4 V
Line Regulation ∆VREF-V+ V
+ = 8 to 40V - 10 30 mV
Load Regulation ∆VREF-IREF V
+ = 10V, IREF = 0 to 20mA - 20 50 mV
Ripple Rejection RR V+ = 20V, f = 120Hz - 66 - dB
Temperature Coefficient T. C. Ta = -20 to +75°C - -1 - mV/°C
Short Circuit Output Current IREF S - 100 - mA
Error Amplifier Section
Input Offset Voltage VIO V
IC = 2.5V - 2 10 mV
Input Bias Current IB (1) VIC = 2.5V - 2 10 µA
Open Loop Voltage Gain AV 60 80 - dB
Input Common Mode Voltage Range VCM T
a = 25°C 1.8 - 3.4 V
Common Mode Rejection Ratio CMR - 70 - dB
Unity Gain Bandwidth - - 3 - MHz
Output Voltage Swing - 0.5 - 3.8 V
Oscillator Section
Frequency fOSC C
T = 0.01µF, RT = 2kΩ - 30 - kHz
Frequency Change with Voltage - V+ = 8 to 40V - - 1 %
Frequency Change with Temperature - Ta = -20 to +75°C - - 3 %
Output Pulse Width (Pin 3) - CT = 0.01µF - 0.5 - µS
Output Amplitude (Pin 3) - - 3.5 - V
NJM3524
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3
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Ver.2003-07-18
Comparator Section
Maximum Duty Cycle - 0 - 45 %
Input Threshold (Pin 9) VIH "0" duty cycle - 1.0 - V
Input Threshold (Pin 9) VIH "Max" duty cycle - 3.5 - V
Input Bias Current IB (2) - 1 - µA
Current Limiting Section
Input Voltage Range - -0.7 - +1.0 V
Sense Voltage - V(2) - V(1) ≥ 50mV 180 200 220 mV
Sense Voltage Temperature Coefficient - - 0.2 - mV/°C
Output Section
Collector-Emitter Breakdown Voltage VCER 40 - - V
Collector Leakage Current ICER V
CE = 40V - 0.1 50 µA
Collector-Emitter Saturation Voltage VCE(SAT) I
O = 50mA - 1 2 V
Emitter Output Voltage - V+ = 20V, IF = -250µA 17 18 - V
Turn-off Voltage Rise Time Tr R
C = 2kΩ - 0.2 - µS
Turn-on Voltage Fall Time TI R
C = 2kΩ - 0.1 - µS
Total Device
Standby Current IQ V+ = 40V, Pin(2) = 2V - 8 10 mA
1, 4, 7, 8, 9, 11, 14 = GND
All Other Inputs and Outputs Open
■ BLOCK DIAGRAM
NJM3524
- 4 - Ver.2003-07-18
■ ERROR AMPLIFIER BIAS CIRCUITS
(A) Positive Output (B) Negative Output
VO =
+⋅ 1
R
R
2
V
1
2REF V
O = -
⋅1-
R
R
2
V
1
2REF
■ CURRENT LIMIT
(a) Take the detection output from the ground line side, because the input voltage range is -0.7V to +1.0V.
(b) The sensing voltage is 200mV typical.
IO(MAX) = )V
RR
R
(V
R
1O
21
2
SENSE
S+
+
IOS =
S
SENSE
R
V
■ SOFT START METHOD
It is possible that the output stage is broken due to a wrong operation of circuits simultaneously when supply voltage
was applied. This failure can be prevented by setting the error amplifier output to a low level for a certain time as
shown in the right figure.
In this case, the soft start time is determined by the time constant of RB and CB.
■ OUTPUT CONFIGURATIONS
Capacitor-Diode-Coupled Single-Ended Inductor Circuit Transformer-Coupled Outputs
Voltage Multiplier Output stage
■ TYPICAL APPLICATIONS
Fig. 1 Capacitor-Diode Output Circuit Fig. 2 Flyback Converter Circuit Fig. 3 Push-Pull
Transformer-Coupled Circuit
NJM3524
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5
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Ver.2003-07-18
■ POWER DISSIPATION VS. AMBIENT TEMPERATURE
■ TYPICAL CHARACTERISTICS
Reference Voltage vs. Operating Voltage Standby Current vs. Operating Voltage
Open Loop Voltage Gain vs. Frequency RT, CT vs. Frequency
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
