IXD_609 9-Ampere Low-Side Ultrafast MOSFET Drivers INTEGRATED CIRCUITS DIVISION Features Description * 9A Peak Source/Sink Drive Current * Wide Operating Voltage Range: 4.5V to 35V * -40C to +125C Extended Operating Temperature Range * Logic Input Withstands Negative Swing of up to 5V * Matched Rise and Fall Times * Low Propagation Delay Time * Low, 10A Supply Current * Low Output Impedance The IXDD609/IXDI609/IXDN609 high-speed gate drivers are especially well suited for driving the latest IXYS MOSFETs and IGBTs. The IXD_609 high-current output can source and sink 9A of peak current while producing voltage rise and fall times of less than 25ns. The input is CMOS compatible, and is virtually immune to latch up. Proprietary circuitry eliminates cross-conduction and current "shoot-through." Low propagation delay and fast, matched rise and fall times make the IXD_609 family ideal for high-frequency and high-power applications. Applications * * * * * * Efficient Power MOSFET and IGBT Switching Switch Mode Power Supplies Motor Controls DC to DC Converters Class-D Switching Amplifiers Pulse Transformer Driver The IXDD609 is configured as a non-inverting driver with an enable, the IXDN609 is configured as a non-inverting driver, and the IXDI609 is configured as an inverting driver. The IXD_609 family is available in a standard 8-pin DIP (PI); an 8-pin SOIC (SIA); an 8-pin Power SOIC with an exposed metal back (SI); an 8-pin DFN (D2); a 5-pin TO-263 (YI); and a 5-pin TO-220 (CI). Ordering Information Part Number IXDD609D2TR IXDD609SI IXDD609SITR IXDD609SIA IXDD609SIATR IXDD609PI IXDD609CI IXDD609YI IXDI609SI IXDI609SITR IXDI609SIA IXDI609SIATR IXDI609PI IXDI609CI IXDI609YI IXDN609SI IXDN609SITR IXDN609SIA IXDN609SIATR IXDN609PI IXDN609CI IXDN609YI DS-IXD_609-R09 Logic Configuration IN OUT EN IN OUT IN OUT Package Type Packing Method Quantity 8-Pin DFN 8-Pin Power SOIC with Exposed Metal Back 8-Pin Power SOIC with Exposed Metal Back 8-Pin SOIC 8-Pin SOIC 8-Pin DIP 5-Pin TO-220 5-Pin TO-263 8-Pin Power SOIC with Exposed Metal Back 8-Pin Power SOIC with Exposed Metal Back 8-Pin SOIC 8-Pin SOIC 8-Pin DIP 5-Pin TO-220 5-Pin TO-263 8-Pin Power SOIC with Exposed Metal Back 8-Pin Power SOIC with Exposed Metal Back 8-Pin SOIC 8-Pin SOIC 8-Pin DIP 5-Pin TO-220 5-Pin TO-263 Tape & Reel Tube Tape & Reel Tube Tape & Reel Tube Tube Tube Tube Tape & Reel Tube Tape & Reel Tube Tube Tube Tube Tape & Reel Tube Tape & Reel Tube Tube Tube 2000 100 2000 100 2000 50 50 50 100 2000 100 2000 50 50 50 100 2000 100 2000 50 50 50 www.ixysic.com 1 INTEGRATED CIRCUITS DIVISION IXD_609 1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Electrical Characteristics: TA = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Electrical Characteristics: TA = - 40C to +125C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 3 3 4 4 5 2. IXD_609 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Characteristics Test Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3. Block Diagrams & Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 IXDD609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 IXDI609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 IXDN609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 6 6 4. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 www.ixysic.com 10 10 10 10 10 11 R09 IXD_609 INTEGRATED CIRCUITS DIVISION 1 Specifications 1.1 Pin Configurations 1.2 Pin Definitions IXDD609 D2 / PI / SI / SIA IXDD609 CI / YI Pin Name VCC 1 8 VCC IN 2 7 OUT EN 3 6 OUT GND 4 5 GND VCC 1 OUT 2 GND 3 IN 4 EN 5 IXDI609 PI / SI / SIA VCC 1 8 VCC IN 2 7 OUT NC GND 3 6 OUT 4 5 GND IN NC GND 1 2 8 7 VCC OUT 3 6 OUT 4 5 GND IN Logic Input EN Output Enable - Drive pin low to disable output, and force output to a high impedance state OUT Output - Sources or sinks current to turn-on or turn-off a discrete MOSFET or IGBT OUT Inverted Output - Sources or sinks current to turn-on or turn-off a discrete MOSFET or IGBT VCC Supply Voltage - Provides power to the device GND Ground - Common ground reference for the device IXDI609 CI / YI VCC 1 OUT 2 GND 3 IN 4 NC 5 IXDN609 PI / SI / SIA VCC Description NC IXDN609 CI / YI VCC 1 OUT 2 GND 3 IN 4 NC 5 Not connected 1.3 Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Output Current Junction Temperature Storage Temperature Symbol Minimum Maximum Units VCC -0.3 40 V VIN, VEN -5 VCC+0.3 V IOUT TJ TSTG - 9 -55 +150 A C -65 +150 C Unless stated otherwise, absolute maximum electrical ratings are at 25C Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. 1.4 Recommended Operating Conditions Parameter Supply Voltage Operating Temperature Range R09 Symbol Range Units VCC TA 4.5 to 35 V -40 to +125 C www.ixysic.com 3 IXD_609 INTEGRATED CIRCUITS DIVISION 1.5 Electrical Characteristics: TA = 25C Test Conditions: 4.5V < VCC < 35V (unless otherwise noted). Parameter Conditions Symbol Minimum Typical Maximum Input Voltage, High 4.5V < VCC < 18V VIH 3.0 - - Input Voltage, Low 4.5V < VCC < 18V VIL - - 0.8 0V < VIN < VCC IIN 10 A IXDD609 only VENH 2/3VCC - EN Input Voltage, High - EN Input Voltage, Low IXDD609 only VENL - V Output Voltage, High - VOH VCC-0.025 1/3VCC - - Output Voltage, Low - VOL - - 0.025 Output Resistance, High State VCC=18V, IOUT=-100mA ROH - 0.6 1 Output Resistance, Low State ROL - 0.4 0.8 IDC - - 2 Rise Time VCC=18V, IOUT=100mA Limited by package power dissipation VCC=18V, CLOAD=10nF tr - 22 35 Fall Time VCC=18V, CLOAD=10nF tf - 15 25 On-Time Propagation Delay VCC=18V, CLOAD=10nF tondly - 40 60 Off-Time Propagation Delay Enable to Output-High Delay Time (IXDD609 Only) Disable to High Impedance State Delay Time (IXDD609 Only) Enable Pull-Up Resistor VCC=18V, CLOAD=10nF toffdly - 42 60 tENOH - 25 60 tDOLD - 35 60 REN - 200 1 <1 <1 2 10 10 Input Current Output Current, Continuous Power Supply Current VCC=18V VCC=18V VCC=18V, VIN=3.5V VCC=18V, VIN=0V VCC=18V, VIN=VCC ICC Units V V A ns k mA A 1.6 Electrical Characteristics: TA = - 40C to +125C Test Conditions: 4.5V < VCC < 35V unless otherwise noted. Conditions Symbol Minimum Input Voltage, High Parameter 4.5V < VCC < 18V VIH Maximum 3.3 - Input Voltage, Low 4.5V < VCC < 18V VIL - 0.65 0V < VIN < VCC IIN - VOH VCC-0.025 10 Output Voltage, High Output Voltage, Low - VOL - 0.025 Output Resistance, High State VCC=18V, IOUT=-100mA ROH - 2 Output Resistance, Low State ROL - 1.5 IDC - 1 Rise Time VCC=18V, IOUT=100mA Limited by package power dissipation VCC=18V, CLOAD=10nF tr - 40 Fall Time VCC=18V, CLOAD=10nF tf - 30 On-Time Propagation Delay VCC=18V, CLOAD=10nF tondly - 75 Off-Time Propagation Delay VCC=18V, CLOAD=10nF toffdly - 75 Enable to Output-High Delay Time IXDD609 only, VCC=18V tENOH - 75 Disable to High Impedance State Delay Time IXDD609 only, VCC=18V VCC=18V, VIN=3.5V VCC=18V, VIN=0V VCC=18V, VIN=VCC tDOLD - 75 2.5 150 150 Input Current Output Current, Continuous Power Supply Current 4 www.ixysic.com ICC - Units V A V A ns mA A R09 IXD_609 INTEGRATED CIRCUITS DIVISION 1.7 Thermal Characteristics Package Parameter Symbol Rating D2 (8-Pin DFN) 35 CI (5-Pin TO-220) 36 PI (8-Pin DIP) 125 JA Thermal Impedance, Junction-to-Ambient SI (8-Pin Power SOIC) 85 SIA (8-Pin SOIC) 120 YI (5-Pin TO-263) 46 CI (5-Pin TO-220) Units C/W 3 JC Thermal Impedance, Junction-to-Case SI (8-Pin Power SOIC) 10 YI (5-Pin TO-263) C/W 2 2 IXD_609 Performance 2.1 Timing Diagrams VIH IN VIH IN VIL tondly VIL toffdly toffdly tondly 90% OUT OUT 10% 90% 10% tf tr tf tr 2.2 Characteristics Test Diagram + 0.1F 10F OUT VCC EN VIN R09 VCC IN VCC - GND CLOAD www.ixysic.com Tektronix Current Probe 6302 5 IXD_609 INTEGRATED CIRCUITS DIVISION 3 Block Diagrams & Truth Tables 3.1 IXDD609 3.3 IXDN609 VCC VCC IN OUT IN OUT GND EN GND IN EN OUT IN OUT 0 1 or open 0 0 0 1 1 or open 1 1 1 x 0 Z 3.2 IXDI609 VCC OUT IN GND 6 IN OUT 0 1 1 0 www.ixysic.com R09 IXD_609 INTEGRATED CIRCUITS DIVISION 4 Typical Performance Characteristics Rise Time vs. Supply Voltage (Input=0-5V, f=10kHz, TA=25C) 60 CL=10nF CL=5.4nF CL=1.5nF 50 40 11 50 Fall Time (ns) 30 20 CL=10nF CL=5.4nF CL=1.5nF 40 30 20 10 10 0 0 0 5 10 15 20 25 Supply Voltage (V) 30 35 5 10 15 20 25 Supply Voltage (V) 40 30 20 4000 6000 8000 Load Capacitance (pF) 180 150 toffdly tondly 50 35 -40 -20 40 30 0 20 40 60 80 Temperature (C) 100 120 140 20 0 10000 2000 4000 6000 8000 Load Capacitance (pF) Propagation Delay vs. Input Voltage (VIN=5V, VCC=12V, f=1kHz, CL=5.4nF) 160 tondly 140 120 100 80 toffdly 60 40 30 20 Input Threshold Voltage vs. Temperature (VCC=18V, CL=2.5nF) 50 toffdly 45 40 tondly 35 30 2 35 10000 Propagation Delay vs. Temperature (VCC=18V, f=1kHz, CL=5.4nF) 55 0 10 15 20 25 Supply Voltage (V) 4 3 5 6 8 7 9 Input Voltage (V) 10 11 12 -40 -20 Input Threshold vs. Supply Voltage 0 20 40 60 80 Temperature (C) 100 120 140 Enable Threshold vs. Supply Voltage 3.5 25 2.7 Input Threshold (V) Input Threshold Voltage (V) 30 Propagation Delay (ns) Propagation Delay vs. Supply Voltage (VIN=0-5V, f=1kHz, CL=5.4nF) Propagation Delay (ns) Propagation Delay (ns) 2000 0 2.6 2.5 Min VIH 2.4 2.3 2.2 2.1 Max VIL 2.0 1.9 -40 -20 R09 6 0 0 2.8 tf 7 10 0 5 8 VCC=4.5V VCC=8V VCC=12V VCC=18V VCC=25V VCC=30V VCC=35V 50 Fall Time (ns) Rise Time (ns) 50 10 0 tr 9 60 VCC=4.5V VCC=8V VCC=12V VCC=18V VCC=25V VCC=30V VCC=35V 60 100 10 Fall Time vs. Load Capacitance Rise Time vs. Load Capacitance 70 200 Rise and Fall Times vs. Temperature (VIN=0-5V, VCC=18V, f=10kHz, CL=2.5nF) 5 0 Enable Threshold (V) Rise Time (ns) 60 Rise & Fall Times (ns) 70 Fall Time vs. Supply Voltage (Input=0-5V, f=10kHz, TA=25C) 3.0 Min VIH 2.5 Max VIL 2.0 1.5 1.0 0 20 40 60 80 Temperature (C) 100 120 140 20 Min VENH 15 Max VENL 10 5 0 0 5 10 15 20 25 Supply Voltage (V) www.ixysic.com 30 35 0 5 10 15 20 25 Supply Voltage (V) 30 35 7 IXD_609 INTEGRATED CIRCUITS DIVISION 100 0 1000 Supply Current vs. Frequency (VCC=18V) Supply Current (mA) 1000 150 100 50 10 1 0.1 10 100 1000 Frequency (kHz) 10000 10 1 10 100 1000 Frequency (kHz) Supply Current (mA) Supply Current (mA) 1.0 0.8 0.6 0.4 0.2 VIN=0V & 18V 0 1000 5000 Load Capacitance (pF) 10000 Supply Current vs. Frequency (VCC=8V) CL=10nF CL=5.4nF CL=1.5nF 100 10 1 0.1 100 120 140 -20 -15 -10 -5 1 10 100 1000 Frequency (kHz) 10000 0.50 0.45 0.40 0.35 -40 -20 0 20 40 60 80 Temperature (C) 100 120 140 Output Sink Current vs. Supply Voltage (f=422Hz, CL=66nF) 30 -25 10000 0.55 Output Sink Current (A) Output Source Current (A) 20 40 60 80 Temperature (C) 25 20 15 10 5 0 0 0 8 50 0.60 Output Source Current vs. Supply Voltage (f=422Hz, CL=66nF) -30 100 Dynamic Supply Current vs. Temperature (VIN=5V, VCC=18V, f=1kHz, CL=1.5nF) 0.65 VIN=3.5V VIN=5V VIN=10V 1.2 0 f=2MHz f=1MHz f=500kHz f=100kHz f=50kHz f=10kHz f=1kHz 150 0.01 1 1.4 -20 Supply Current vs. Load Capacitance (VCC=8V) 1000 CL=10nF CL=5.4nF CL=1.5nF Quiescent Supply Current vs. Temperature 0.0 -40 200 10000 Supply Current vs. Frequency (VCC=12V) 100 0.1 1 5000 Load Capacitance (pF) 1000 CL=10nF CL=5.4nF CL=1.5nF 100 200 0 1000 10000 5000 Load Capacitance (pF) f=2MHz f=1MHz f=500kHz f=100kHz f=50kHz f=10kHz f=1kHz 250 Supply Current (mA) 200 Supply Current vs. Load Capacitance (VCC=12V) Supply Current (mA) 300 300 Supply Current (mA) f=2MHz f=1MHz f=500kHz f=100kHz f=50kHz f=10kHz f=1kHz 400 Supply Current (mA) Supply Current (mA) 500 Supply Current vs. Load Capacitance (VCC=18V) 5 10 15 20 25 Supply Voltage (V) 30 35 0 www.ixysic.com 5 10 15 20 25 Supply Voltage (V) 30 35 R09 IXD_609 INTEGRATED CIRCUITS DIVISION Output Source Current vs. Temperature (VCC=18V, f=422Hz, CL=66nF) 14.0 Output Sink Current (A) Output Source Current (A) -12.0 -11.5 -11.0 -10.5 -10.0 -9.5 -9.0 -40 -20 20 40 60 80 Temperature (C) 13.0 12.5 12.0 11.5 11.0 10.5 Output Resistance () 1.0 0.5 0 20 40 60 80 Temperature (C) 100 120 140 Low State Output Resistance vs. Supply Voltage (IOUT= +10mA ) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.0 0 R09 13.5 10.0 -40 -20 100 120 140 High State Output Resistance vs. Supply Voltage (IOUT= -10mA) 1.5 Output Resistance () 0 Output Sink Current vs. Temperature (VCC=18V, f=422Hz, CL=66nF) 5 10 15 20 25 Supply Voltage (V) 30 35 0 www.ixysic.com 5 10 15 20 25 Supply Voltage (V) 30 35 9 IXD_609 INTEGRATED CIRCUITS DIVISION 5 Manufacturing Information 5.1 Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device IXD_609 All Versions except IXD_609YI IXD_609YI Moisture Sensitivity Level (MSL) Classification MSL 1 MSL 3 5.2 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 5.3 Soldering Profile Provided in the table below is the Classification Temperature (TC) of this product and the maximum dwell time the body temperature of this device may be (TC - 5)C or greater. The classification temperature sets the Maximum Body Temperature allowed for this device during lead-free reflow processes. For through-hole devices, and any other processes, the guidelines of J-STD-020 must be observed. Device Classification Temperature (TC) Dwell Time (tp) Maximum Cycles IXD_609CI IXD_609YI IXD_609PI IXD_609SI / IXD_609SIA / IXD_609D2 245C for 30 seconds 245C for 30 seconds 250C for 30 seconds 260C for 30 seconds 30 seconds 30 seconds 30 seconds 30 seconds 1 3 3 3 5.4 Board Wash IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. Board washing to reduce or remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature and duration necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must not be exposed to flux or solvents that are Chlorine- or Fluorine-based. 10 www.ixysic.com R09 IXD_609 INTEGRATED CIRCUITS DIVISION 5.5 Mechanical Dimensions 5.5.1 SIA (8-Pin SOIC) 0.31 / 0.51 (0.012 / 0.020) 8x TOP VIEW PCB Land Pattern 1.55 (0.061) 5 5.80 / 6.20 (0.228 / 0.244) 3.75 (0.148) 3.80 / 4.00 (0.150 / 0.157) 0.10 / 0.25 (0.004 / 0.010) A PIN #1 1.25 MIN (0.049 MIN) 0.25 (0.010) 1.27 0.05 6x A 4 1.75 MAX (0.069 MAX) 0.60 (0.024) GAUGE PLANE SEATING PLANE 0.40 / 1.27 (0.016 / 0.050) 8- 0 4.80 / 5.00 (0.189 / 0.197) Dimensions MIN / MAX 0.10 (0.004) 0.10 / 0.25 (0.004 / 0.010) Notes: 1. Controlling dimension: millimeters. 2. All dimensions are in mm (inches). 3. This package conforms to JEDEC Standard MS-012, variation AA, Rev. F. 4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end. 5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 6. Lead thickness includes plating. 5.5.2 SI (8-Pin Power SOIC with Exposed Metal Back) PCB Land Pattern 0.31 / 0.51 (0.012 / 0.020) 8x TOP VIEW 5 5.80 / 6.20 (0.228 / 0.244) PIN #1 1.27 0.05 6x 2.81 / 3.30 (0.111 / 0.130) R09 2.23 (0.088) 3.055 (0.120) 4 4.80 / 5.00 (0.189 / 0.197) A 0.25 (0.010) A 0 / 0.15 (0 / 0.006) 1.55 (0.061) 3.85 (0.152) 2.05 / 2.41 (0.081 / 0.095) 3.80 / 4.00 (0.150 / 0.157) 1.25 MIN (0.049 MIN) 1.70 MAX (0.067 MAX) 0.60 (0.024) BOTTOM VIEW 0.10 (0.004) GAUGE PLANE SEATING PLANE 0.10 / 0.25 (0.004 / 0.010) 0.40 / 1.27 (0.016 / 0.050) Dimensions MIN / MAX 8- 0 Notes: 1. Controlling dimension: millimeters. 2. All dimensions are in mm (inches). 3. This package conforms to JEDEC Standard MS-012, variation BA, Rev. F. 4. Dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per end. 5. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 6. The exposed metal pad on the back of the package should be connected to GND. It is not suitable for carrying current. 7. Lead thickness includes plating. www.ixysic.com 11 IXD_609 INTEGRATED CIRCUITS DIVISION 5.5.3 Tape & Reel Information for SI and SIA Packages 330.2 DIA. (13.00 DIA.) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) W=12.00 (0.472) B0=5.30 (0.209) A0=6.50 (0.256) K0= 2.10 (0.083) P1=8.00 (0.315) Dimensions mm (inches) User Direction of Feed Embossed Carrier NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2 Embossment 5.5.4 YI (5-Pin TO-263) E (Note 2) E1 E3 SYMBOL A A1 b b1 c c1 c2 D D1 D2 E E1 E3 e H L L1 L3 R R1 L1 D2 D1 D (Note 2) H * Pin 1 Indicator C C e ~4x b ~5x * Circular feature will be present on devices with the Optional Tip Lead Form. A c2 JEDEC TO-263 Optional Tip Lead Form MM MIN MAX 4.064 4.826 0.000 0.254 0.508 0.991 0.508 0.889 0.381 0.737 0.381 0.584 1.143 1.651 8.382 9.652 6.858 7.700 1.358 1.562 9.652 10.668 6.223 8.000 5.092 6.869 1.702 BSC 14.605 15.875 1.778 2.794 1.000 1.676 0.254 BSC 0.460 TYP 0.506 TYP 8 BASE METAL R1 L3 12 L 10.75 (0.423) 2.20 (0.087) 8.40 (0.331) 3.80 (0.150) 8.05 (0.317) 1.05 (0.041) 10.50 (0.413) 1.702 (0.067) Dimensions mm (inches) c1 A1 b R1 Recommended PCB Pattern SECTION: C-C b1 PLATING (Note 3) c A1 INCH MIN MAX 0.160 0.190 0.000 0.010 0.020 0.039 0.020 0.035 0.015 0.029 0.015 0.023 0.045 0.065 0.330 0.380 0.270 0.303 0.053 0.062 0.380 0.420 0.245 0.315 0.200 0.270 0.067 BSC 0.575 0.625 0.070 0.110 0.039 0.066 0.010 BSC 0.018 TYP 0.02 TYP 8 R L R L3 www.ixysic.com NOTES: 1. Reference JEDEC TO-263 Type "BA". 2. Dimension does not include mold flash; mold flash shall not exceed 0.127mm (0.005 inch) per side. 3. Minimum plating: 1000 microinches. 4. Controlling dimension: millimeters. R09 IXD_609 INTEGRATED CIRCUITS DIVISION 5.5.5 PI (8-Pin DIP) 9.652 0.381 (0.380 0.015) 2.540 0.127 (0.100 0.005) 8-0.800 DIA. (8-0.031 DIA.) 2.540 0.127 (0.100 0.005) 9.144 0.508 (0.360 0.020) 6.350 0.127 (0.250 0.005) Pin 1 PCB Hole Pattern 7.620 0.254 (0.300 0.010) 3.302 0.051 (0.130 0.002) 0.457 0.076 (0.018 0.003) 7.620 0.127 (0.300 0.005) 7.239 TYP. (0.285) 4.064 TYP (0.160) 0.254 0.0127 (0.010 0.0005) 7.620 0.127 (0.300 0.005) Dimensions mm (inches) 0.813 0.102 (0.032 0.004) 5.5.6 CI (5-Pin TO-220) A 0.127 BSC (0.005 BSC) 9.652 - 10.668 (0.380 - 0.420) B 3.810 - 3.860 (0.150 - 0.152) 3.556 - 4.826 (0.140 - 0.190) 0.508 - 1.397 (0.020 - 0.055) 0.355 M B A M 9.652 - 10.668 (0.380 - 0.420) 2.540 - 3.048 (0.100 - 0.120) 5.842 - 6.858 (0.230 - 0.270) 4.826 - 5.334 (0.190 - 0.210) 5.842 - 6.858 (0.230 - 0.270) 7.550 - 8.100 (0.297 - 0.319) 14.224 - 16.510 (0.560 - 0.650) 12.192 - 12.878 (0.480 - 0.507) 6.300 - 6.700 (0.248 - 0.264) 8.382 - 9.017 (0.330 - 0.355) THERMAL PAD 6.858 - 8.890 (0.270 - 0.350) 2.032 - 2.921 (0.080 - 0.115) C C 0.356 - 0.610 (0.014 - 0.024) 12.700 - 14.732 (0.500 - 0.580) 1.702 4x BSC (0.067 4x BSC) 0.381 - 1.016 5x (0.015 - 0.040 5x) 0.381 M B A M SECTION C-C PLATING 0.381 - 1.016 (0.015 - 0.040) BASE METAL Dimensions mm (inches) 0.356 - 0.559 (0.014 - 0.022) 0.356 - 0.610 (0.014 - 0.024) LEAD TIP 0.381 - 0.965 (0.015 - 0.038) R09 www.ixysic.com 13 IXD_609 INTEGRATED CIRCUITS DIVISION 5.5.7 D2 (8-Pin DFN) 5.00 BSC (0.197 BSC) 0.80 / 1.00 (0.031 / 0.039) 0.20 REF (0.008 REF) Pin 1 4.00 BSC (0.157 BSC) 0.35 x 45 (0.014 x 45) 0.95 (0.037) 4.50 (0.177) 3.10 (0.122) 0.45 (0.018) 0.10 (0.004) 2.60 (0.102) 1.20 (0.047) 0.74 / 0.83 (0.029 / 0.033) Recommended PCB Land Pattern 3.03 / 3.10 (0.119 / 0.122) Dimensions mm MIN / mm MAX (inches MIN / inches MAX) 0.30 / 0.45 (0.012 / 0.018) 0.95 BSC (0.037 BSC) Pin 1 Pin 8 2.53 / 2.60 (0.100 / 0.102) 0.35 / 0.45 x 45 (0.014 / 0.018 x 45) NOTE: The exposed metal pad on the back of the D2 package should be connected to GND. Pad is not suitable for carrying current. 5.5.8 Tape & Reel Information for D2 Package 330.2 DIA. (13.00 DIA.) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) 1.55 0.05 4.00 0.10 See Note #2 2.00 0.05 R0.75 TYP 1.75 0.10 (0.05) 5 MAX 5.50 0.05 (0.05) B0=5.40 0.10 12.00 0.30 Embossed Carrier K0=1.90 0.10 P1=8.00 0.10 5 MAX A0=4.25 0.10 Embossment 0.30 0.05 1.50 (MIN) NOTES: 1. A0 & B0 measured at 0.3mm above base of pocket. 2. 10 pitches cumulative tol. 0.2mm 3. ( ) Reference dimensions only. 4. Unless otherwise specified, all dimensions in millimeters. For additional information please visit our website at: www.ixysic.com IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated Circuits Division's Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division's product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-IXD_609-R09 (c)Copyright 2017, IXYS Integrated Circuits Division All rights reserved. Printed in USA. 10/25/2017 14 www.ixysic.com R09