The CM series of thin-film capacitors has the advantage of increased performance and smaller size, when compared with its thick-film counterparts. These chips are available in sizes down to 30 mil square and in capacitances up to 330 pf. These chips are manufactured using state-of-the-art thin-film techniques, are 100% electrically tested and visually inspected to MIL-STD-8&3. * Small size, 30 to 50 mil square * Quick delivery * Capacitance range: 15 pf to 330 pf * Reduced hybrid size Dielectric: silicon dioxide Substrate: silicon with gold backing CMB CMC CMD CME CMF 30 mil sq. 35 mil sq. 40 mil sq. 45 mil sq. 50 mil sq. VALUE WVDC] VALUE WVDC] VALUE WVDC | VALUE WVDC | VALUE WVDC 15 pF 180 56pF 66 68 pF 75 68pF 102 100 pF 90 16 170 62 59 75 67 75 92 120 75 18 150 68 54 82 62 82 84 130 69 20 137 75 48 91 53 91 76 150 59 22 125 80 45 100 50 100 65 160 55 24 95 82 44 120 41 120 55 180 49 27 85 91 40 130 38 130 50 200 44 30 75 100 36 150 33 150 45 220 40 33 69 110 30 160 30 160 42 240 37 36 64 120 25 180 37 270 32 39 58 130 23 200 33 300 25 43 52 220 30 330 20 47 47 240 25 51 44 270 20 56 40 62 35 68 32 The following tolerances are available for all values: 2.5%, 5%, 10%, 20% Chip size (+0.05mm) See Capacitance Data, +3 mil Chip thickness 10 +2 mil (0.254 +0.05 mm} Chip substrate material Silicon Dielectric, MOS Silicon dioxide Bonding pad 5x5 mil min. (0.127 x 0.127 mm) 10kA aluminum Backing 3kA min. gold Hlectro-Films, Inc. reserves the right to change specifications without notice Peak voltage at +25C 1.5 x working voltage Dissipation factor, 1 KHZ, 1Vrms, +25C 0.1% MOS Qat 1 MHz, 50 Vims, +25C 1000 min. TOC, -55C to +150C +45 +25ppm/C Insulation resistance at working voltage +25C 109 min. Operating temperature range -65C to +125C Thermal shock CIC + (0.25% +0.25 pf} max. Moisture resistance, MIL-STD-202, Method 106 CIC +(1.0% + 0.25 pf) max. Short time overload, +25C, 5 seconds 1.5 x working voltage High temperature exposure 100 hr. at +150C ambient CIC (2.0% + 0.25 pf) max. Life, MIL-STD-202, Method 108 1000 hr. at working voltage Condition D, +125C ambient CIC +(2.0% + 0.2 Spf} max. The GM series of capacitor chips are designed for assembly in hybrid circuits using conventional wire-bonding techniques. They provide excellent stability and performance, and their small size gives the hybrid designer greater layout flexibility. Example: 100% visualled, 20 pf, 5%, 30 mil Capacitor P/N: Ww CMB = 000 2000 B J Multiplier Code: J Product Family B 0.01 Process Gode Tolerance Code: TAN A 0.1 Ag 0 1 H 25% 1 10 J 5% 2 100 K 10% Value: Use the first four significant digits i eee of the Capacitance N 50% Inspection/Packaging Use - W for 100% visually inspected parts in matrix tray per MIL-STD-883 X for sample, commercial visually inspected loaded in matrix trays (4% AGL} Hlectro-Films, Inc. reserves the right to change specifications without notice