1
2
34
5
6
OUT
FAULT
ILIM
EN
GND
IN
PAD
1
2
34
5
6OUT
FAULT
ILIM
EN
GND
IN
TPS2552/TPS2553
DBVPACKAGE
(TOP VIEW)
EN = ActiveLowfortheTPS2552
EN= ActiveHighfortheTPS2553
Add-1topartnumberforlach-offversion
OUT
IN
GND
FAULT ILIM
EN
RILIM
20kW
RFAULT
100kW
ControlSignal
5VUSB
Input USB
Port
USBData
TPS2552/53
0.1 Fm
120 Fm
Fault Signal
PowerPad
USBrequirementonly*
*
facingportsarebypassedwithatleast
120 Fperhub
USBrequirementthatdownstream
m
TPS2552/TPS2553
DRVPACKAGE
(TOP VIEW)
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
Check for Samples: TPS2552,TPS2553,TPS2552-1,TPS2553-1
1FEATURES DESCRIPTION
The TPS2552/53 and TPS2552-1/53-1 power-
2•Up to 1.5 A Maximum Load Current distribution switches are intended for applications
• ±6% Current-Limit Accuracy at 1.7 A (typ) where precision current limiting is required or heavy
•Meets USB Current-Limiting Requirements capacitive loads and short circuits are encountered
and provide up to 1.5 A of continuous load current.
•Backwards Compatible with TPS2550/51 These devices offer a programmable current-limit
•Adjustable Current Limit, 75 mA–1300 mA (typ) threshold between 75 mA and 1.7 A (typ) via an
•Constant-Current (TPS2552/53) and Latch-off external resistor. Current-limit accuracy as tight as
(TPS2552-1/53-1) Versions ±6% can be achieved at the higher current-limit
settings. The power-switch rise and fall times are
•Fast Overcurrent Response - 2-μs (typ) controlled to minimize current surges during turn
•85-mΩHigh-Side MOSFET (DBV Package) on/off.
•Reverse Input-Output Voltage Protection TPS2552/53 devices limit the output current to a safe
•Operating Range: 2.5 V to 6.5 V level by using a constant-current mode when the
•Built-in Soft-Start output load exceeds the current-limit threshold.
TPS2552-1/53-1 devices provide circuit breaker
•15 kV ESD Protection per IEC 61000-4-2 (with functionality by latching off the power switch during
External Capacitance) overcurrent or reverse-voltage situations. An internal
•UL Listed –File No. E169910 and NEMKO reverse- voltage comparator disables the power-
IEC60950-1-am1 ed2.0 switch when the output voltage is driven higher than
•See the TI Switch Portfolio the input to protect devices on the input side of the
switch. The FAULT output asserts low during
overcurrent and reverse-voltage conditions.
APPLICATIONS
•USB Ports/Hubs
•Digital TV
•Set-Top Boxes
•VOIP Phones
Figure 1. Typical Application as USB Power Switch
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Copyright ©2008–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
2Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DEVICE INFORMATION(1)
SON (DRV) SOT23 (DBV) RECOMMENDED
AMBIENT MAXIMUM CURRENT-LIMIT
DEVICE ENABLE
TEMPERATURE (2) CONTINUOUS LOAD PROTECTION
DEVICE MARKING DEVICE MARKING CURRENT(2)
TPS2552 Active low TPS2552DRV CHR TPS2552DBV 2552 Constant-Current
TPS2553 Active high TPS2553DRV CHT TPS2553DBV 2553
–40°C to 85°C 1.5 A
TPS2552-1 Active low TPS2552DRV-1 CHY TPS2552DBV-1 CHX Latch-Off
TPS2553-1 Active high TPS2553DRV-1 CJZ TPS2553DBV-1 CHZ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Maximum ambient temperature is a function of device junction temperature and system level considerations, such as load current,
power dissipation and board layout. See dissipation rating table and recommended operating conditions for specific information related
to these devices.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) (2)
VALUE UNIT
Voltage range on IN, OUT, EN or EN, ILIM, FAULT –0.3 to 7 V
Voltage range from IN to OUT –7 to 7 V
IOContinuous output current Internally Limited
See the Dissipation Rating
Continuous total power dissipation Table
Continuous FAULT sink current 25 mA
ILIM source current 1 mA
Human Body Model 2 kV
ESD Charged Device Model 500 V
IEC system level (contact/air)(3) 8 / 15 kV
TJMaximum junction temperature –40 to 150 °C
Tstg Storage temperature –65 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltages are referenced to GND unless otherwise noted.
(3) Surges per EN61000-4-2. 1999 applied to output terminals of EVM. These are passing test levels, not failure threshold.
DISSIPATION RATING TABLE
THERMAL THERMAL TA≤25°C DERATING TA= 70°C TA= 85°C
RESISTANCE RESISTANCE
BOARD PACKAGE POWER FACTOR ABOVE POWER POWER
θJA θJC RATING TA= 25°C RATING RATING
Low-K(1) DBV 350°C/W 55°C/W 285 mW 2.85 mW/°C 155 mW 114 mW
High-K(2) DBV 160°C/W 55°C/W 625 mW 6.25 mW/°C 340 mW 250 mW
Low-K(1) DRV 140°C/W 20°C/W 715 mW 7.1 mW/°C 395 mW 285 mW
High-K(2) DRV 75°C/W 20°C/W 1330 mW 13.3 mW/°C 730 mW 530 mW
(1) The JEDEC low-K (1s) board used to derive this data was a 3in ×3in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3in ×3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
Copyright ©2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT
VIN Input voltage, IN 2.5 6.5 V
VEN TPS2552/52-1 0 6.5
Enable voltage V
VEN TPS2553 /53-1 0 6.5
VIH High-level input voltage on EN or EN 1.1 V
VIL Low-level input voltage on EN or EN 0.66
–40 °C≤TJ≤125 °C 0 1.2
IOUT Continuous output current, OUT A
–40 °C≤TJ≤105 °C 0 1.5
RILIM Current-limit threshold resistor range (nominal 1%) from ILIM to GND 15 232 kΩ
IOContinuous FAULT sink current 0 10 mA
Input de-coupling capacitance, IN to GND 0.1 μF
IOUT ≤1.2 A –40 125
Operating virtual junction
TJ°C
temperature(1) IOUT ≤1.5 A -40 105
(1) See "Dissipation Rating Table"and "Power Dissipation and Junction Temperature"sections for details on how to calculate maximum
junction temperature for specific applications and packages.
ELECTRICAL CHARACTERISTICS
over recommended operating conditions, VEN = 0 V, or VEN = VIN, RFAULT = 10 kΩ(unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
DBV package, TJ= 25°C 85 95
DBV package, –40°C≤TJ≤125°C 135
rDS(on) Static drain-source on-state resistance DRV package, TJ= 25°C 100 115 mΩ
DRV package, –40°C≤TJ≤105°C 140
DRV package, –40°C≤TJ≤125°C 150
VIN = 6.5 V 1.1 1.5
trRise time, output VIN = 2.5 V 0.7 1
CL= 1 μF, RL= 100 Ω,ms
(see Figure 2)
VIN = 6.5 V 0.2 0.5
tfFall time, output VIN = 2.5 V 0.2 0.5
ENABLE INPUT EN OR EN
Enable pin turn on/off threshold 0.66 1.1 V
IEN Input current VEN = 0 V or 6.5 V, VEN = 0 V or 6.5 V –0.5 0.5 μA
ton Turnon time 3 ms
CL= 1 μF, RL= 100 Ω, (see Figure 2)
toff Turnoff time 3 ms
CURRENT LIMIT
RILIM = 15 kΩ –40°C≤TJ≤105°C 1610 1700 1800
TJ= 25°C 1215 1295 1375
RILIM = 20 kΩ–40°C≤TJ≤125°C 1200 1295 1375
Current-limit threshold (Maximum DC output current IOUT delivered to
IOS TJ= 25°C 490 520 550 mA
load) and Short-circuit current, OUT connected to GND RILIM = 49.9 kΩ–40°C≤TJ≤125°C 475 520 565
RILIM = 210 kΩ110 130 150
ILIM shorted to IN 50 75 100
tIOS Response time to short circuit VIN = 5 V (see Figure 3) 2 μs
REVERSE-VOLTAGE PROTECTION
Reverse-voltage comparator trip point 95 135 190 mV
(VOUT –VIN)
Time from reverse-voltage condition to VIN = 5 V 3 5 7 ms
MOSFET turn off
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
4Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating conditions, VEN = 0 V, or VEN = VIN, RFAULT = 10 kΩ(unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
SUPPLY CURRENT
IIN_off Supply current, low-level output VIN = 6.5 V, No load on OUT, VEN = 6.5 V or VEN = 0 V 0.1 1 μA
RILIM = 20 kΩ120 140 μA
IIN_on Supply current, high-level output VIN = 6.5 V, No load on OUT RILIM = 210 kΩ100 120 μA
IREV Reverse leakage current VOUT = 6.5 V, VIN = 0 V TJ= 25 °C 0.01 1 μA
UNDERVOLTAGE LOCKOUT
UVLO Low-level input voltage, IN VIN rising 2.35 2.45 V
Hysteresis, IN TJ= 25 °C 25 mV
FAULT FLAG
VOL Output low voltage, FAULT I/FAULT = 1 mA 180 mV
Off-state leakage V/FAULT = 6.5 V 1 μA
FAULT assertion or de-assertion due to overcurrent condition 5 7.5 10 ms
FAULT deglitch FAULT assertion or de-assertion due to reverse-voltage condition 2 4 6 ms
THERMAL SHUTDOWN
Thermal shutdown threshold 155 °C
Thermal shutdown threshold in 135 °C
current-limit
Hysteresis 10 °C
Copyright ©2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
Charge
Pump
Driver
UVLO
Current
Limit
Thermal
Sense
IN
GND
EN
ILIM
OUT
FAULT
CS
Reverse
Voltage
Comparator
-
+
Current
Sense
Note A: TPS255xpartsenterconstantcurrentmode
duringcurrentlimitcondition; TPS255x-1 partslatchoff
(Note A)
4-ms
Deglitch
8-msDeglitch
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
DEVICE INFORMATION
Pin Functions
PIN I/O DESCRIPTION
NAME TPS2552DBV TPS2553DBV TPS2552DRV TPS2553DRV
EN 3 –4–I Enable input, logic low turns on power switch
EN –3–4 I Enable input, logic high turns on power switch
GND 2 2 5 5 Ground connection; connect externally to
PowerPAD
Input voltage; connect a 0.1 μF or greater
IN 1 1 6 6 I ceramic capacitor from IN to GND as close to the
IC as possible.
Active-low open-drain output, asserted during
FAULT 4 4 3 3 O overcurrent, overtemperature, or reverse-voltage
conditions.
OUT 6 6 1 1 O Power-switch output
External resistor used to set current-limit
ILIM 5 5 2 2 O threshold; recommended 15 kΩ ≤ RILIM ≤232
kΩ.
Internally connected to GND; used to heat-sink
PowerPAD – – PAD PAD the part to the circuit board traces. Connect
™PowerPAD to GND pin externally.
Add -1 for Latch-Off version
FUNCTIONAL BLOCK DIAGRAM
6Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
RLCL
OUT
TESTCIRCUIT
10
90%
10
90%
VOUT
ton toff
10
90%
5050%
VEN toff
50% 50%
10%
90%
VOLTAGEWAVEFORMS
trtf
%%
%
%
VOUT
VEN
VOUT
ton toff
tIOS
IOS
IOUT
VOUT
IOUT
IOS
Decreasing
LoadResistance
Decreasing
LoadResistance
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
PARAMETER MEASUREMENT INFORMATION
Figure 2. Test Circuit and Voltage Waveforms
Figure 3. Response Time to Short Circuit Waveform
Figure 4. Output Voltage vs. Current-Limit Threshold
Copyright ©2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
OUT
IN
GND
FAULT
ILIM
EN
RILIM
ControlSignal
VIN
TPS2552
10 Fm
150 Fm
Fault Signal
PowerPad
VOUT
R
10k
FAULT
W
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
TYPICAL CHARACTERISTICS
Figure 5. Typical Characteristics Reference Schematic
Figure 6. Turnon Delay and Rise Time Figure 7. Turnoff Delay and Fall Time
Figure 8. Device Enabled into Short-Circuit Figure 9. Full-Load to Short-Circuit Transient Response
8Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
TYPICAL CHARACTERISTICS (continued)
Figure 10. Short-Circuit to Full-Load Recovery Response Figure 11. No-Load to Short-Circuit Transient Response
Figure 12. Short-Circuit to No-Load Recovery Response Figure 13. No Load to 1ΩTransient Response
Figure 14. 1Ωto No Load Transient Response Figure 15. Reverse-Voltage Protection Response
Copyright ©2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
2.30
T -JunctionTemperature-°C
J
-50 0 50 100 150
UVLO-UndervoltageLockout-V
2.40
2.31
2.32
2.33
2.34
2.35
2.36
2.37
2.38
2.39
UVLORising
R =20k
ILIM W
UVLOFalling
0
I -SupplyCurrent,OutputDisabled- A
IN m
0.40
0.04
0.08
0.12
0.16
0.20
0.24
0.28
0.32
0.36
T -JunctionTemperature-°C
J
-50 0 50 100 150
V =2.5V
IN
V =6.5V
IN
R =20k
ILIM W
0
PeakCurrent- A
0 1.5 3 4.5 6
CurrentLimitResponse- sm
20
2
4
6
8
10
12
14
16
18 V =5V,
R =20k ,
T =25°C
IN
ILIM
A
W
0
DBVPackage
r -StaticDrain-SourceOn-StateResistance-m
DS(on) W
25
50
75
100
125
150
DRVPackage
T -JunctionTemperature-°C
J
-50 0 50 100 150
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 16. Reverse-Voltage Protection Recovery Figure 17. UVLO –Undervoltage Lockout –V
Figure 18. IIN –Supply Current, Output Disabled – μA Figure 19. IIN –Supply Current, Output Enabled – μA
Figure 20. Current Limit Response – μs Figure 21. MOSFET rDS(on) Vs. Junction Temperature
10 Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
0 100 200 300 400 500 600 700 800 900 1000
IDS-StaticDrain-SourceCurrent-mA
V -V -100mV/div
IN OUT
T =125°C
A
T =25°C
A
T =-40°C
A
V =6.5V,
R =20k
IN
ILIM W
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
0 100 200 300 400 500 600 700 800 900 1000
IDS-StaticDrain-SourceCurrent-mA
V -V -100mV/div
IN OUT
T =25°C
A
T =125°C
A
V =6.5V,
R =200k
IN
ILIM W
T =-40°C
A
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
TYPICAL CHARACTERISTICS (continued)
Figure 22. Switch Current Vs. Drain-Source Voltage Figure 23. Switch Current Vs. Drain-Source Voltage
Across Switch Across Switch
Copyright ©2008–2012, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
DETAILED DESCRIPTION
OVERVIEW
The TPS2552/53 and TPS2552-1/53-1 are current-limited, power-distribution switches using N-channel
MOSFETs for applications where short circuits or heavy capacitive loads will be encountered and provide up to
1.5 A of continuous load current. These devices allow the user to program the current-limit threshold between 75
mA and 1.7 A (typ) via an external resistor. Additional device shutdown features include overtemperature
protection and reverse-voltage protection. The device incorporates an internal charge pump and gate drive
circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the driver circuit and
provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates
from input voltages as low as 2.5 V and requires little supply current. The driver controls the gate voltage of the
power switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit
large current and voltage surges and provides built-in soft-start functionality. There are two device families that
handle overcurrent situations differently. The TPS2552/53 family enters constant-current mode while the
TPS2552-1/53-1 family latches off when the load exceeds the current-limit threshold.
OVERCURRENT CONDITIONS
The TPS2552/53 and TPS2552-1/53-1 respond to overcurrent conditions by limiting their output current to the IOS
levels shown in Figure 24. When an overcurrent condition is detected, the device maintains a constant output
current and reduces the output voltage accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS2552/53 ramps the
output current to IOS. The TPS2552/53 devices will limit the current to IOS until the overload condition is removed
or the device begins to thermal cycle. The TPS2552-1/53-1 devices will limit the current to IOS until the overload
condition is removed or the internal deglitch time (7.5-ms typical) is reached and the device is turned off . The
device will remain off until power is cycled or the device enable is toggled.
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit
MOSFET. The current-sense amplifier recovers and limits the output current to IOS. Similar to the previous case,
the TPS2552/53 will limit the current to IOS until the overload condition is removed or the device begins to thermal
cycle; the TPS2552-1/53-1 will limit the current to IOS until the overload condition is removed or the internal
deglitch time is reached and the device is latched off.
The TPS2552/53 thermal cycles if an overload condition is present long enough to activate thermal limiting in any
of the above cases. The device turns off when the junction temperature exceeds 135°C (typ) while in current
limit. The device remains off until the junction temperature cools 10°C (typ) and then restarts. The TPS2552/53
cycles on/off until the overload is removed (see Figure 10 and Figure 12) .
REVERSE-VOLTAGE PROTECTION
The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds
the input voltage by 135 mV (typ) for 4-ms (typ). A reverse current of (VOUT –VIN)/rDS(on)) will be present when
this occurs. This prevents damage to devices on the input side of the TPS2552/53 and TPS2552-1/TPS2253-1
by preventing significant current from sinking into the input capacitance. The TPS2552/53 devices allow the
N-channel MOSFET to turn on once the output voltage goes below the input voltage for the same 4-ms deglitch
time. The TPS2552-1/53-1 devices keep the device turned off even if the reverse-voltage condition is removed
and do not allow the N-channel MOSFET to turn on until power is cycled or the device enable is toggled. The
reverse-voltage comparator also asserts the FAULT output (active-low) after 4-ms.
12 Submit Documentation Feedback Copyright ©2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
FAULT RESPONSE
The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature or reverse-voltage
condition. The TPS2552/53 asserts the FAULT signal until the fault condition is removed and the device resumes
normal operation. The TPS2552-1/53-1 asserts the FAULT signal during a fault condition and remains asserted
while the part is latched-off. The FAULT signal is de-asserted once device power is cycled or the enable is
toggled and the device resumes normal operation. The TPS2552/53 and TPS2552-1/53-1 are designed to
eliminate false FAULT reporting by using an internal delay "deglitch" circuit for overcurrent (7.5-ms typ) and
reverse-voltage (4-ms typ) conditions without the need for external circuitry. This ensures that FAULT is not
accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry
delays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert the
FAULT signal immediately.
UNDERVOLTAGE LOCKOUT (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO
turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large
current surges.
ENABLE (EN OR EN)
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the
supply current. The supply current is reduced to less than 1-μA when a logic high is present on EN or when a
logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits,
and power switch. The enable input is compatible with both TTL and CMOS logic levels.
THERMAL SENSE
The TPS2552/53 and TPS2552-1/53-1 have self-protection features using two independent thermal sensing
circuits that monitor the operating temperature of the power switch and disable operation if the temperature
exceeds recommended operating conditions. The TPS2552/53 device operates in constant-current mode during
an overcurrent conditions, which increases the voltage drop across power-switch. The power dissipation in the
package is proportional to the voltage drop across the power switch, which increases the junction temperature
during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature
exceeds 135°C (min) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch
turns on after the device has cooled approximately 10 °C.
The TPS2552/53 and TPS2552-1/53-1 also have a second ambient thermal sensor. The ambient thermal sensor
turns off the power-switch when the die temperature exceeds 155°C (min) regardless of whether the power
switch is in current limit and will turn on the power switch after the device has cooled approximately 10 °C. Both
the TPS2552/53 and TPS2552-1/53-1 families continue to cycle off and on until the fault is removed.
The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature
shutdown condition.
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0.94
ILIM
0.977
ILIM
1.016
ILIM
22980V
OSmax R k
23950V
OSnom R k
25230V
OSmin R k
I (mA) =
I (mA) =
I (mA) =
W
W
W
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITANCE
Input and output capacitance improves the performance of the device; the actual capacitance should be
optimized for the particular application. For all applications, a 0.1μF or greater ceramic bypass capacitor between
IN and GND is recommended as close to the device as possible for local noise de-coupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy
transient conditions. This is especially important during bench testing when long, inductive cables are used to
connect the evaluation board to the bench power-supply.
Placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are
expected on the output.
PROGRAMMING THE CURRENT-LIMIT THRESHOLD
The overcurrent threshold is user programmable via an external resistor. The TPS2552/53 and TPS2552-1/53-1
use an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is
proportional to the current sourced out of ILIM. The recommended 1% resistor range for RILIM is 15 kΩ≤RILIM ≤
232 kΩto ensure stability of the internal regulation loop. Many applications require that the minimum current limit
is above a certain current level or that the maximum current limit is below a certain current level, so it is
important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM. The following
equations and Figure 24 can be used to calculate the resulting overcurrent threshold for a given external resistor
value (RILIM). Figure 24 includes current-limit tolerance due to variations caused by temperature and process.
However, the equations do not account for tolerance due to external resistor variation, so it is important to
account for this tolerance when selecting RILIM. The traces routing the RILIM resistor to the TPS2552/53 and
TPS2552-1/53-1 should be as short as possible to reduce parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum
current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current limiting upstream power supplies causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-Limit Threshold Equations (IOS):
(1)
where 15 kΩ≤RILIM ≤232 kΩ.
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CurrentLimitThreshold-mA
R -CurrentLimitResistor-k
ILIM W
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
15 25 35 45 65 75 85 95 195 205 235165 175 185135 145 155105 115 125 215 225
IOS(min)
IOS(max)
IOS(nom)
55
1600
1700
1800
TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
While the maximum recommended value of RILIM is 232 kΩ, there is one additional configuration that allows for
a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typ) current-limit
threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration to
prevent unwanted noise from coupling into the sensitive ILIM circuitry.
Figure 24. Current-Limit Threshold vs RILIM
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1.016
ILIM
OSmin
25230V
OSmin R k
1
1.016
ILIM
OSmin
ILIM
I (mA) = 1000mA
I (mA) =
25230V
R (k ) = I mA
R (k ) = 24k
W
W
W W
æ ö
÷
ç÷
ç÷
ç÷
ç
è ø
ILIM
OSmax 0.94
ILIM
OSmax 0.94
OSmax
R (k ) = 23.7k
22980V
I (mA) = R k
22980V
I (mA) = 23.7 k
I (mA) = 1172.4mA
W W
W
W
0.94
ILIM
OSmax
22980V
OSmax R k
1
0.94
ILIM
OSmax
ILIM
I (mA) = 500mA
I (mA) =
22980V
R (k ) = I mA
R (k ) = 58.7k
W
W
W W
æ ö
÷
ç÷
ç÷
ç÷
ç
è ø
ILIM
OSmin 1.016
ILIM
OSmin 1.016
OSmin
R (k ) = 59k
25230V
I (mA) = R k
25230V
I (mA) = 59 k
I (mA) = 400.6mA
W W
W
W
TPS2552, TPS2553
TPS2552-1, TPS2553-1
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
APPLICATION 1: DESIGNING ABOVE A MINIMUM CURRENT LIMIT
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and Figure 24 to select RILIM.
(2)
Select the closest 1% resistor less than the calculated value: RILIM = 23.7 kΩ. This sets the minimum current-limit
threshold at 1 A . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
(3)
The resulting maximum current-limit threshold is 1172.4 mA with a 23.7 kΩresistor.
APPLICATION 2: DESIGNING BELOW A MAXIMUM CURRENT LIMIT
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use
the IOS equations and Figure 24 to select RILIM.
(4)
Select the closest 1% resistor greater than the calculated value: RILIM = 59 kΩ. This sets the maximum
current-limit threshold at 500 mA . Use the IOS equations, Figure 24, and the previously calculated value for RILIM
to calculate the minimum resulting current-limit threshold.
(5)
The resulting minimum current-limit threshold is 400.6 mA with a 59 kΩresistor.
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TPS2552, TPS2553
TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
ACCOUNTING FOR RESISTOR TOLERANCE
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focussed only on the TPS2552/53 and
TPS2552-1/53-1 performance and assumed an exact resistor value. However, resistors sold in quantity are not
exact and are bounded by an upper and lower tolerance centered around a nominal resistance. The additional
RILIM resistance tolerance directly affects the current-limit threshold accuracy at a system level. The following
table shows a process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one
follows the selection process outlined in the application examples above. Step two determines the upper and
lower resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%,
when precision current limiting is desired.
Table 1. Common RILIM Resistor Selections
Resistor Tolerance Actual Limits
Ideal Closest 1%
Desired Nominal Resistor Resistor IOS MIN IOS Nom IOS MAX
Current Limit (mA) 1% low (kΩ) 1% high (kΩ)
(kΩ) (kΩ)(mA) (mA) (mA)
75 SHORT ILIM to IN 50.0 75.0 100.0
120 226.1 226 223.7 228.3 101.3 120.0 142.1
200 134.0 133 131.7 134.3 173.7 201.5 233.9
300 88.5 88.7 87.8 89.6 262.1 299.4 342.3
400 65.9 66.5 65.8 67.2 351.2 396.7 448.7
500 52.5 52.3 51.8 52.8 448.3 501.6 562.4
600 43.5 43.2 42.8 43.6 544.3 604.6 673.1
700 37.2 37.4 37.0 37.8 630.2 696.0 770.8
800 32.4 32.4 32.1 32.7 729.1 800.8 882.1
900 28.7 28.7 28.4 29.0 824.7 901.5 988.7
1000 25.8 26.1 25.8 26.4 908.3 989.1 1081.0
1100 23.4 23.2 23.0 23.4 1023.7 1109.7 1207.5
1200 21.4 21.5 21.3 21.7 1106.0 1195.4 1297.1
1300 19.7 19.6 19.4 19.8 1215.1 1308.5 1414.9
1400 18.3 18.2 18.0 18.4 1310.1 1406.7 1517.0
1500 17.0 16.9 16.7 17.1 1412.5 1512.4 1626.4
1600 16.0 15.8 15.6 16.0 1512.5 1615.2 1732.7
1700 15.0 15.0 14.9 15.2 1594.5 1699.3 1819.4
CONSTANT-CURRENT VS. LATCH-OFF OPERATION AND IMPACT ON OUTPUT VOLTAGE
Both the constant-current devices (TPS2552/53 ) and latch-off devices (TPS2552-1/53-1) operate
identically during normal operation, i.e. the load current is less than the current-limit threshold and the devices
are not limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT
x rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT ≉VIN.
Both the constant-current devices (TPS2552/53 ) and latch-off devices (TPS2552-1/53-1) operate
identically during the initial onset of an overcurrent event. Both devices limit current to the programmed
current-limit threshold set by RILIM by operating the N-channel MOSFET in the linear mode. During current-limit
operation, the N-channel MOSFET is no longer fully-enhanced and the resistance of the device increases. This
allows the device to effectively regulate the current to the current-limit threshold. The effect of increasing the
resistance of the MOSFET is that the voltage drop across the device is no longer negligible (VIN ≠VOUT), and
VOUT decreases. The amount that VOUT decreases is proportional to the magnitude of the overload condition. The
expected VOUT can be calculated by IOS ×RLOAD, where IOS is the current-limit threshold and RLOAD is the
magnitude of the overload condition. For example, if IOS is programmed to 1 A and a 1 Ωoverload condition is
applied, the resulting VOUT is 1 V.
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TPS2552, TPS2553
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SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
www.ti.com
While both the constant-current devices (TPS2552/53 ) and latch-off devices (TPS2552-1/53-1)
operate identically during the initial onset of an overcurrent event, they behave differently if the overcurrent event
lasts longer than the internal delay "deglitch" circuit (7.5-ms typ). The constant-current devices
(TPS2552/53 ) assert the FAULT flag after the deglitch period and continue to regulate the current to
the current-limit threshold indefinitely. In practical circuits, the power dissipation in the package will increase the
die temperature above the overtemperature shutdown threshold (135°C min), and the device will turn off until the
die temperature decreases by the hysteresis of the thermal shutdown circuit (10°C typ). The device will turn on
and continue to thermal cycle until the overload condition is removed. The constant-current devices resume
normal operation once the overload condition is removed. The latch-off devices (TPS2552-1/53-1) assert the
FAULT flag after the deglitch period and immediately turn off the device. The device remains off regardless of
whether the overload condition is removed from the output. The latch-off devices remain off and do not resume
normal operation until the surrounding system either toggles the enable or cycles power to the device.
POWER DISSIPATION AND JUNCTION TEMPERATURE
The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It
is good design practice to estimate power dissipation and junction temperature. The below analysis gives an
approximation for calculating junction temperature based on the power dissipation in the package. However, it is
important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated by:
PD= rDS(on) ×IOUT 2
Where:
PD= Total power dissipation (W)
rDS(on) = Power switch on-resistance (Ω)
IOUT = Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
Finally, calculate the junction temperature:
TJ= PD× θJA + TA
Where:
TA= Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD= Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three
iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent
on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board
layout. The Dissipating Rating Table provides example thermal resistances for specific packages and board
layouts.
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TPS2552-1, TPS2553-1
www.ti.com
SLVS841E –NOVEMBER 2008–REVISED FEBRUARY 2012
UNIVERSAL SERIAL BUS (USB) POWER-DISTRIBUTION REQUIREMENTS
One application for this device is for current limiting in universal serial bus (USB) applications. The original USB
interface was a 12-Mb/s or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC
peripherals (e.g., keyboards, printers, scanners, and mice). As the demand for more bandwidth increased, the
USB 2.0 standard was introduced increasing the maximum data rate to 480-Mb/s. The four-wire USB interface is
conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data,
and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply. The USB specification classifies two different classes of
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as
defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the
minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of
the intended application. The latest USB standard should always be referenced when considering the
current-limit threshold
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains
multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A
function is a USB device that is able to transmit or receive data or control information over the bus. A USB
function can be embedded in a USB hub. A USB function can be one of three types included in the list below.
•Low-power, bus-powered function
•High-power, bus-powered function
•Self-powered function
SPHs and BPHs distribute data and power