ST7FDALIM3 - STMicroelectronics, Inc.

October 2001 1/7

This i s preliminary information on a new produc t now in de velopment. Details are subject to change without notice.

Rev. 1.6

ST7FLITE2

8-BIT MCU WITH SINGLE VOLTAGE F LASH MEMORY,

DATA E E PRO M, ADC, T IM ERS , S PI, DAL I

PRODUCT PREVIEW

■Memories

– 8 Kbytes single voltage extended Flash

(XFlash) Program m emory with read-out pro-

tection, In-Circuit Programming and In-Appli-

cation programming (ICP and IAP)

– 384 bytes RAM

– 256 bytes data EEPROM with read-out pro-

tection

■Cl ock, Reset and Su pp ly Manag em e n t

– Enhanced reset system

– Enhanced low voltage supervisor (LVD) for

main supply and an auxi liary volta ge detector

(AVD) with interrupt capability for imple ment-

ing safe power-down procedures

– Clock sources: Internal 1% RC oscillator,

crystal/ceramic resonator or external clock

– Internal 32-MHz input clock for Auto-reload

timer

– Optional x4 or x8 PLL for 4 or 8 MHz internal

clock

– Four Power Saving Modes: Halt, Active-Ha lt,

Wait and Slow

■I/O Ports

– Up to 15 multifunctional bidirectiona l I/O lines

–6 hi gh sink out puts

■2 Time rs

– 8-bit Lite Ti mer with prescal er, watchdog,

1 real time base and 1 input captur e

– One 12-bit Auto-reload Timer with 4 PWM

outputs, input capture and output compare

functions

■2 Communi cation Interface s

– SPI synchronous serial interface

– DALI communication interface

■Inte rr upt M a nag e m ent

– 10 inter r u pt vect or s plu s TRAP a nd RESET

– 4 external i nterrupt lines (on 4 vectors)

■A/D Converter

– 7 input channels

– Fixed gain Op-amp

– 13-bit precis i on for 0 to 430 mV (@ 5V VDD)

– 10-bit precision for 430 mV to 5V (@ 5V VDD)

■Instruction S et

– 8-bit data manipulation

– 63 basic i ns tructions

– 17 main addressing modes

– 8 x 8 unsigned m ultiply instructions

■Development Tools

– Full hardware/software dev elopment package

Device Summary

DIP20 SO20

300”

Features ST7FLITE20 ST7FLITE25 ST7FLITE29 ST7FDALI

Program memor y - bytes 8K

RAM (st ack) - by tes 384 (128)

Data EEPROM - bytes - - 256

Peripherals Lite T i m er with Watchdog,

Autoreload Time r, SPI,

10-bit ADC with Op-Amp

Lite Timer with Watchdog, Autoreload

Timer with 32-MHz input clock, SPI,

10-bit ADC with Op-Amp

Lite Timer with Watchdog, Au-

toreload Timer with 32-MHz input

clo ck, SPI, 10-bit ADC with Op-

Amp, DALI

Operating Supply 2.4V to 5.5V

CPU Frequency Up to 8Mhz

(w/ e xt OSC up to 8MHz) Up to 8M hz (w / ex t OS C up to 8MH z

and i nt 1MHz RC 1% PLLx8/4MHz) Up to 8Mhz (w/ int 1MHz RC 1%

PLLx8/4MHz)

Operating T em perature -40°C to +85°C (-40°C to +105/125°C optional )

Pac kages SO20 300”, D IP 20 SO20 300”

ST7FLITE2

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1 INTRO DU CTION

The ST7FLITE2 is a member of the ST7 microcon-

troller family. All ST7 devices are based on a com-

mon ind ustry-standard 8-bi t core, f eaturing an en-

hanced instruction set.

The ST7FLITE2 features FLASH memory with

byte-by-byte In-Circuit Programming (ICP) and In-

Application Program ming (IAP) capability.

Under software control, the ST7FLITE2 device

can be placed in WAIT, SLOW, or HALT mode, re-

ducing power consumption when the appli cation i s

in idle or standby state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact applicat ion code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication and indirect addressing

modes.

Figu re 1. Gene ral B lock D iagram

8-BI T CORE

ALU

ADDRESS AND DATA BUS

OSC1

OSC2

RESET

PORT A

Internal

CLOCK

CONTROL

RAM

(384 Bytes)

PA7:0

(8 bi ts )

VSS

VDD POWER

SUPPLY

PROGRAM

(8K Bytes)

LVD

MEMORY

PLL x 8

Ext.

1MHz

PLL

Int.

1MHz

8-Bit

LITE TIMER 2

PORT B

PORT C

SPI

PB6:0

(7 bits)

PC1:0

(2 bits)

DALI

DATA EEPROM

( 256 Byt es)

1% RC

OSC

16MHz

ADC

+ OpAmp

12-Bit

Auto-Reload

TIM E R 2

CLKIN / 2

or PLL X4

8MHz -> 32MHz

/ 2

ST7FLITE2

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2 PI N DESCRIPTI ON

Figure 2. 20-Pin SO Package Pinout (ST7FLITE2x)

Figure 3. 20-Pin DIP Package Pinout (ST 7FLITE2x)

VSS

VDD

AIN5/PB5

CLKIN/AIN4/PB4

MOSI/AIN3/PB3

MISO/AIN2/PB2

SCK/AIN1/PB1

SS/AIN0/PB0

OSC1

OSC2

PA5

(HS)/ATPWM3/ICCDATA

PA4

(HS)/ATPWM2

PA3

(HS)/ATPWM1

PA2

(HS)/ATPWM0

PA1

(HS)/ATIC

PA0

(HS)/LTIC

(HS) 20mA high sink capability

eix associated external interrupt vector

AIN6/PB6 PA7

PA6/MCO/ICCCLK/BREAK

RESET

MISO/AIN2/PB2

MOSI/AIN3/PB3

ATPWM2/PA4(HS)

ATPWM3/ICCDATA/PA5(HS)

MCO/ICCCLK/BREAK/PA6

PA7

AIN6/PB6

AIN5/PB5

SCK/AIN1/PB1

SS/AIN0/PB0

PA0(HS)/LTIC

OSC2

OSC1

VSS

VDD

RESET

(HS) 20mA high sink capability

eix associated external interrupt vector

ATPWM1/PA3(HS) PA2(HS)/ATPWM0

PA1(HS)/ATIC

CLKIN/AIN4/PB4

ST7FLITE2

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Figure 4. 20-Pin SO Package Pinout (S T7FDALI)

VSS

VDD

AIN5/PB5

CLKIN*/AIN4/PB4

MOSI/AIN3/PB3

MISO/AIN2/PB2

SCK/AIN1/PB1

SS/AIN0/PB0

PC0/CLKIN*

PC1

PA5

(HS)/ATPWM3/ICCDATA

PA4

(HS)/ATPWM2

PA3

(HS)/ATPWM1

PA2

(HS)/ATPWM0

PA1

(HS)/ATIC

PA0

(HS)/LTIC

(HS) 20mA high sink capability

eix associated external interrupt vector

DALIIN/AIN6/PB6 PA7/DALIOUT

PA6/MCO/ICCCLK/BREAK

RESET

*C LK IN on PB4 or P C0 (configurable by option byte)

ST7FLITE2

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2.1 OPERATING CONDI TIONS

2.1.1 General Ope rating Con ditions

Note:

1. Guaranteed by construction. A/D operation is not guaranteed below 1MHz.

2. Internal RC oscillator and PLL operation not guaranteed above 85 °C.

Figure 5. fOSC(EXT) Maxi mum Op erating Freq uen cy Versus VDD Supply Voltage

Symbol Parameter Conditions Min Max Unit

VDD Supply voltage fOSC(EXT) = 8 MHz. max. 2.4 5.5 V

fOSC(EXT) = 16 MHz. max. 3.3 5.5 V

fOSC(EXT) External clock frequ ency on CLKIN pin 0 1) 16 MHz

TAAmbient temperature range 2)

1 Suffix Version 0 70

°C

6 Suffix Version -40 85

7 Suffix Version2) -40 105

3 Suffix Version (VDD≥4.0V)2) -40 125

fOSC(EXT) [MHz]

SUPPLY VOLTAGE [V]

02.0 2.4

3.0 3.3 4.0 4.5 5.0

FUNCTIONALITY

GUARANTEED

IN THIS AREA

NOT GUARANTEED

IN THIS AREA

5.5

ST7FLITE2

6/7

3 PACKAGE CHARACTERISTICS

3.1 PACKAGE MECHANICAL DAT A

Figure 6. 20-Pin Plastic Small Outline Package, 300-mil Wi dth

Figure 7. 20-Pin Plasti c Dual In-Line Package, 300-mil Width

Dim. mm inches

Min Typ Max Min Typ Max

A2.35 2.65 0.093 0.104

A1 0.10 0.30 0.004 0.012

B0.33 0.51 0.013 0.020

C0.23 0.32 0.009 0.013

D12.60 13.00 0.496 0.512

E7.40 7.60 0.291 0.299

e1.27 0.050

H10.00 10.65 0.394 0.419

h0.25 0.75 0.010 0.030

α0° 8° 0° 8°

L0.40 1.27 0.016 0.050

Number of Pins

N20

h x 45×

Dim. mm inches

Min Typ Max Min Typ Max

A5.33 0.210

A1 0.38 0.015

A2 2.92 3.30 4.95 0.115 0.130 0.195

b0.36 0.46 0.56 0.014 0.018 0.022

b2 1.14 1.52 1.78 0.045 0.060 0.070

c0.20 0.25 0.36 0.008 0.010 0.014

D24.89 26.16 26.92 0.980 1.030 1.060

D1 0.13 0.005

e2.54 0.100

eB 10.92 0.430

E1 6.10 6.35 7.11 0.240 0.250 0.280

L2.92 3.30 3.81 0.115 0.130 0.150

Number of Pins

N20

D1 be

A1 L

ST7FLITE2

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Notes:

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No lic ense is granted

by i m pl i cation or oth erwise unde r any pat ent or paten t rights of STMi croelectronics. Specifications ment i oned in this p ublicat i on are subject

to change without notice. This publication supersedes and repl aces all information previously supplied. STMicroel ectronics products are not

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