HD74AC74
Dual D-Type Positive Edge-Triggered Flip-Flop
ADE-205-361 (Z)
1st. Edition
Sep. 2000
Description
The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,
Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse.
Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time
of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input
is locked out and information present will not be transferred to the outputs until the next rising edge of the
Clock Pulse input.
Features
Asynchronous Inputs:
Low input to SD (Set) sets Q to High level
Low input to CD (Clear) sets Q to Low level
Clear and Set are independent of clock
Simultaneous Low on CD and SD makes both Q and Q High
• Outputs Source/Sink 24 mA
HD74AC74
2
Pin Arrangement
1
2
3
4
5
6
7
CD1
D1
CP1
SD1
Q1
Q1
GND
VCC
CD2
D2
CP2
SD2
Q2
Q2
14
13
12
11
10
9
8
CP1
CP2
SD1
CD2 SD2
CD1
D1
D2
Q1
Q2
(Top view)
Q2
Q1
Logic Symbol
D1Q1
Q1
CP1
CD1
SD1 SD2
D2Q2
Q2
CP2
CD2
Pin Names
D1, D2Data Inputs
CP1, CP2Clock Pulse Inputs
CD1, CD2 Direct Clear Inputs
SD1, SD2 Direct Set Inputs
Q1, Q1, Q2, Q 2 Outputs
HD74AC74
3
Truth Table (Each Half)
Inputs Outputs
SDCDCP D Q Q
LH X X H L
HL X X L H
LL X X H H
HH HHL
HH LLH
HHLXQ
0Q
0
H : High Voltage Level
L : Low Voltage Level
X : Immaterial
: Low-to-High Clock Transition
Q0 (Q0) : Previous Q (Q) before Low-to-High Transition of Clock
Logic Diagram
SD
CD
DQ
Q
CP
Please note that this diagram is provised only for the understanding of logic operations and should not be
used to estimate propagation delays.
DC Characteristics (unless otherwise specified)
Item Symbol Max Unit Condition
Maximum quiescent supply current ICC 40 µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current ICC 4.0 µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
HD74AC74
4
AC Characteristics
Ta = +25°C
CL = 50 pF Ta = –40°C to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Min Typ Max Min Max Unit
Maximum clock fmax 3.3 100 125 — 95 — MHz
frequency 5.0 140 160 — 125 —
Propagation delay tPLH 3.3 1.0 8.0 12.0 1.0 13.0 ns
CDn or SDn to Qn or Qn5.0 1.0 6.0 9.0 1.0 10.0
Propagation delay tPHL 3.3 1.0 10.5 12.0 1.0 13.5 ns
CDn or SDn to Qn or Qn5.0 1.0 8.0 9.5 1.0 10.5
Propagation delay tPLH 3.3 1.0 8.0 13.5 1.0 16.0 ns
CPn to Qn or Qn5.0 1.0 6.0 10.0 1.0 10.5
Propagation delay tPHL 3.3 1.0 8.0 14.0 1.0 14.5 ns
CPn to Qn or Qn5.0 1.0 6.0 10.0 1.0 10.5
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74AC74
Ta = +25°C
CL = 50 pF
Ta = –40°C
to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Typ Guaranteed Minimum Unit
Set-up time, HIGH or LOW tsu 3.3 1.5 4.0 4.5 ns
Dn to CPn5.0 1.0 3.0 3.0
Hold time, HIGH or LOW th3.3 –2.0 0 0 ns
Dn to CPn5.0 –1.5 0 0
CPn or CDn or SDn tw3.3 3.0 5.5 7.0 ns
Pulse width 5.0 2.5 4.5 5.0
Recovery time trec 3.3 –2.5 0 0 ns
CDn or SDn to CP 5.0 –2.0 0 0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
HD74AC74
5
Capacitance
Item Symbol Typ Unit Condition
Input capacitance CIN 4.5 pF VCC = 5.5 V
Power dissipation capacitance CPD 35.0 pF VCC = 5.0 V
HD74AC74
6
Package Dimensions
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
DP-14
Conforms
Conforms
0.97 g
Unit: mm
7.62
0.25
0° – 15°
19.20
20.32 Max
1
814
7
1.30
2.54 ± 0.25 0.48 ± 0.10
6.30
7.40 Max
0.51 Min
2.54 Min 5.06 Max
+ 0.10
– 0.05
2.39 Max
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
FP-14DA
—
Conforms
0.23 g
Unit: mm
*Dimension including the plating thickness
Base material dimension
*0.22 ± 0.05
*0.42 ± 0.08
0.70 ± 0.20
0.12
0.15
0° – 8°
M
0.10 ± 0.10
2.20 Max
5.5
10.06
1.42 Max
14 8
17
10.5 Max
+ 0.20
– 0.30
7.80
1.15
1.27
0.40 ± 0.06
0.20 ± 0.04
HD74AC74
7
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
FP-14DN
Conforms
Conforms
0.13 g
Unit: mm
0° – 8°
1.27
14 8
17
0.15
0.25
M
1.75 Max 3.95
*0.20 ± 0.05
8.65
9.05 Max
*0.40 ± 0.06
0.14
+ 0.11
– 0.04
0.635 Max 6.10
+ 0.10
– 0.30
0.60
+ 0.67
– 0.20
1.08
*Pd plating
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
TTP-14D
—
—
0.05 g
Unit: mm
*Dimension including the plating thickness
Base material dimension
0.50 ± 0.10
0° – 8°
*0.17 ± 0.05
6.40 ± 0.20
0.10
1.10 Max
0.13 M
0.65
17
14 8
4.40
5.00
5.30 Max
0.83 Max
*0.22
+0.08
–0.07
0.07
+0.03
–0.04
0.20 ± 0.06
0.15 ± 0.04
1.0
HD74AC74
8
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
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