2
1
6
7
8
9
10
11
3
4
5
G0
R0
H0
V0
N.C.
SDA0
SCL0
GND
GND
VDD
B0
26
27
22
21
20
19
18
17
25
24
23
R2
R1
B1
B2
H1
H2
V1
V2
G1
G2
VDD
GND
12
13
14
15
16
SDA1
SDA2
SCL1
SCL2
VDD_5
32
31
30
29
28
VDD
GND
SEL
VDD
GND
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
7-CHANNEL, 1:2 VIDEO SWITCH WITH INTEGRATED LEVEL SHIFTERS
Check for Samples: TS3V713EL
1FEATURES RTG PACKAGE
• Supports 7-channel VGA Signals (R, G, B, (TOP VIEW)
HSYNC, VSYNC, DDC CLK, and DDC DAT)
• Operating Voltage
– VDD = 3.3 V ±10%
– VDD_5 = 5 V ±10%
• High Bandwidth of 1.3 GHz (–3 dB)
• R, G, B Switches
– RON =4Ω(Typ.)
– CON = 8 pF (Typ.)
• Integrated Level Shifting Buffers for HSYNC and
VSYNC Channels
• Voltage Clamping NMOS Switches for SCL and
SDA Channels
• ESD Performance (Pins 12–15, 17–22, 24–27)
– ±2-kV Contact Discharge (IEC61000-4-2)
– 8 kV Human Body Model (JESD22-A114E)
• ESD Performance (All Pins)
– 4 kV Human Body Model (JESD22-A114E)
• 32-Pin Quad Flat Pack No-Lead (QFN) Package The exposed center pad must be
connected to GND.
APPLICATIONS
• Notebook Computers
• Docking Stations
• KVM Switches
DESCRIPTION/ORDERING INFORMATION
The TS3V713EL is a high bandwidth, 7-channel video multiplexer/demultiplexer for switching between a single
VGA source and one of two end points. The device is designed for ensuring video signal integrity and minimizing
video signal attenuation by providing high bandwidth of 1.3 GHz.
The TS3V713EL has integrated level shifting buffers for the HSYNC and VSYNC signals which provide voltage level
translation between 3.3V and 5V logic. The SCL and SDA lines use NMOS switches which clamp the output
voltage to 1 V below VDD.
The video signals are protected against ESD with integrated diodes to VDD and GND that support levels up to ±2
kV Contact Discharge (IEC61000-4-2) and 8 kV Human Body Model (JESD22-A114E).
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
–40°C to 85°C QFN – RTG Tape and reel TS3V713ELRTGR TF713EL
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
GPU
TS3V713EL
0.1 mF0.1 mF
2.2 k
2 .2 k
R
G
B
HSYNC
VSYNC
SDA
SCL
R0
G0
B0
H0
V0
SDA0
SCL0
SCL1
SDA1
R1
G1
B1
H1
V1
SCL2
SDA2
R2
G2
B2
H2
V2
VDD VDD_5
3.3V 5V
GND
2.2 k 2.2 k
2.2 k 2.2 k
VGA
Connector
SEL
Docking
Station
Connector
GPIO
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
TYPICAL APPLICATION DIAGRAM
2Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
R2
G2
R1
G1
B1
R0
G0
B0
B2
(See Note B)
SCL2
SDA1
SCL1
SDA2
SDA0
SCL0
V2
H1
Control
Logic
V1
H2
H0
V0
SEL
VDD_5 (See Note A)
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
LOGIC DIAGRAM
A. Supply for HSYNC and VSYNC translators
B. Output clamped to VDD – 1 V
FUNCTION TABLE
FUNCTION
SEL R0, G0, B0, H0, V0, SCL0,Hi-Z
SDA0
R1, G1, B1, H1, V1, SCL1, R2, G2, B2, H2, V2, SCL2,
LSDA1SDA2
R2, G2, B2, H2, V2, SCL2, R1, G1, B1, H1, V1, SCL1,
HSDA2SDA1
Copyright © 2010, Texas Instruments Incorporated 3
Product Folder Link(s): TS3V713EL
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
VDD –0.5 4.6
Supply voltage range V
VDD_5 –0.5 6.5
VI/O Analog voltage range(2)(3) R, G, B, SCL, SDA –0.5 VDD + 0.5 V
VIN Digital input voltage range(2)(3) SEL, H, V –0.5 6.5 V
II/OK Analog port diode current VI/O < 0 V –50 mA
IIK Digital input clamp current VIN < 0 V –50 mA
II/O ON-state switch current R, G, B, SCL, SDA –128 128 mA
IDD Continuous current through VDD or GND –100 100 mA
IGND
qJA Package thermal impedance(4) RTG package(4) 39.2 °C/W
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) The package thermal impedance is calculated in accordance with JESD 51-1.
RECOMMENDED OPERATING CONDITIONS(1)
MIN MAX UNIT
VDD Supply voltage 3 3.6 V
VDD_5 Supply voltage for H and V channels 4.5 5.5 V
VIN Digital control input voltage SEL, H, V 0 5.5 V
VIH High-level control input voltage SEL, H, V 2 V
VIL Low-level control input voltage SEL, H, V 0.8 V
IOH High-level output current H, V –8 mA
IOL Low-level output current H, V 8 mA
TAOperating free-air temperature –40 85 °C
(1) All unused control inputs of the device must be held at VDD or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
ELECTRICAL CHARACTERISTICS(1)
over recommended operating free-air temperature range, VDD = 3.3 V ±0.3 V, VDD_5 = 5 V ±0.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
Digital input clamp VDD = 3.6 V,
VIK SEL, H, V IIN = –18 mA –0.8 –1.2 V
voltage VDD_5 = 5.5 V,
R, G, B 3 6
VDD = 3.6 V, 0 V ≤VI/O ≤
rON ON-state resistance II/O = –40 mA Ω
VDD_5 = 5.5 V, VDD,
SCL, SDA 4 8
rON(fl ON-state resistance VDD = 3.6 V, VI/O = 1.5 V and
R, G, B II/O = –40 mA 0.2 1 Ω
at) flatness(3) VDD_5 = 5.5 V, VDD,
ON-state resistance VDD = 3.6 V, 0 V ≤VI/O ≤
ΔrON match between R, G, B II/O = –40 mA 0.2 1 Ω
VDD_5 = 5.5 V, VDD,
channels(4)
Digital input high VDD = 3.6 V,
IIH SEL, H, V VIN = VDD ±1 mA
leakage current VDD_5 = 5.5 V,
Digital input low VDD = 3.6 V,
IIL SEL, H, V VIN = GND ±1 mA
leakage current VDD_5 = 5.5 V,
Leakage under VDD = 0 V, VI/O = 0 to 3.6
IOFF All outputs VIN = 0 to 5.5 V ±1 mA
power off conditions VDD_5 = 0 V, V,
Digital input
CIN SEL, H, V f = 10 MHz VIN = 0, 4 pF
capacitance R, G, B 2.5
Switch OFF Output Switch
COFF f = 10 MHz VI/O = 0 V, pF
capacitance open, OFF
SCL, SDA 2.3
R, G, B 8
Switch ON Output Switch
CON f = 10 MHz VI/O = 0 V, pF
capacitance open, ON
SCL, SDA 8.2
High-level output
VOH H, V VIN = VIH, IOH = –8 mA 3.8 V
voltage
Low-level output
VOL H, V VIN = VIH, IOL = 8 mA 0.5 V
voltage
VHYS Voltage hysteresis H, V 200 300 mV
TVDD = 3.6 V, VIN = VDD or II/O = 0
IDD VDD supply current 200 500 mA
VDD_5 = 5.5 V, GND, mA,
VDD = 3.6 V, VIN = VDD or II/O = 0
IDD_5 VDD_5 supply current 50 mA
VDD_5 = 5.5 V, GND, mA,
(1) VI, VO, II, and IOrefer to I/O pins. VIN refers to the control inputs.
(2) All typical values are at VDD = 3.3V, VDD_5 = 5V (unless otherwise noted), TA= 25°C.
(3) rON(flat) is the difference of rON in a given channel at specified voltages.
(4) ΔrON is the difference of rON from center port to any other ports.
Copyright © 2010, Texas Instruments Incorporated 5
Product Folder Link(s): TS3V713EL
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 3.3 V ±0.3 V, VDD_5 = 5 V ±0.5 V (unless otherwise noted)
FROM TO
PARAMETER MIN TYP MAX UNIT
(INPUT) (OUTPUT)
R0,G0, B0R1, G1, B1or R2, G2, B20.25
tpd (1) SCL0, SDA0SCL1, SDA1or SCL2, SDA20.25 ns
H0,V0 H1, V1 or H2, V2 3 7
R1, G1, B1, SCL1, SDA1
SEL or 0.5 11
tPHZ, tPLZ (2) ns
R2, G2, B2, SCL2, SDA2
SEL H1, V1or H2, V20.5 13
R1, G1, B1, SCL1, SDA1
SEL or 0.5 11
tPZH, tPZL (3) ns
R2, G2, B2, SCL2, SDA2
SEL H1, V1or H2, V20.5 13
tsk(o) (4) R, G, B 0.05 0.1 ns
tsk(p) (5) R, G, B 0.05 0.1 ns
(1) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance when driven by an ideal voltage source (zero output impedance).
(2) Line disable time: SEL to input and output; also called "SEL to Switch Turn Off Time."
(3) Line enable time: SEL to input and output; also called "SEL to Switch Turn On Time."
(4) Output skew between center channel to any other channel.
(5) Skew between opposite transitions of the same output. |tPHL – tPLH|
DYNAMIC CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 3.3 V ±0.3 V, VDD_5 = 5 V ±0.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TYP(1) UNIT
XTALK R, G, B RL= 50 Ωf = 250 MHz –50 dB
OIRR R, G, B RL= 50 Ωf = 250 MHz –40 dB
BW R, G, B RL= 50 ΩSwitch ON 1.3 GHz
(1) All typical values are at VDD = 3.3 V, VDD_5 = 5 V (unless otherwise noted)
6Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
1 10 100 1k 10k
f - Frequency - MHz
-8
-7
-6
-5
-4
-3
-2
-1
0
Gain - dB
Insertion Loss
Off Isolation
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Attenuation - dB
1 10 100 1k 10k
f - Frequency - MHz
Crosstalk
-120
-100
-80
-60
-40
-20
0
1 10 100 1k 10k
f - Frequency - MHz
Attenuation - dB
R,G,Bswitches
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
R -
ON W
-0.5 0 0.5 1 1.5 2 2.5 3 3.5 4
V -OutputVoltage-V
O
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
TYPICAL CHARACTERISTICS
Figure 1. Gain vs Frequency Figure 2. Off Isolation vs Frequency
Figure 3. Crosstalk vs Frequency Figure 4. RON vs VO
Copyright © 2010, Texas Instruments Incorporated 7
Product Folder Link(s): TS3V713EL
R,G,Bswitches
0
0.5
1
1.5
2
2.5
3
3.5
4
V -OutputVoltage-V
O
0 0.5 1 1.5 2 2.5 3 3.5 4
V -InputVoltage-V
I
SCL,SDA switches
0
5
10
15
20
25
30
35
40
-1 0 1 2 3 4
R -
ON W
V -InputVoltage-V
I
H,Vswitches
-1
0
1
2
3
4
5
6
0 0.5 1 1.5 2 2.5 3 3.5 4
V -InputVoltage-V
I
V -OutputVoltage-V
O
SCL,SDA switches
-0.5
0
0.5
1
1.5
2
2.5
0 1 2 3 4
V -InputVoltage-V
I
V -OutputVoltage-V
O
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 5. RON vs VIFigure 6. VOvs VI
Figure 7. VOvs VIFigure 8. VOvs VI
8Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
Figure 9. Test Circuit and Voltage Waveforms
Copyright © 2010, Texas Instruments Incorporated 9
Product Folder Link(s): TS3V713EL
CL
(see Note A)
TEST CIRCUIT
S1
2 × VDD
Open
GND
RL
RL
VOH
VOL
VOLTAGE WAVEFORMS
OUTPUT SKEW (tsk(o))
Data Out at
YB1or YB 2
NOTES: A. CLincludes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO= 50 Ω, tr≤2.5 ns, tf≤2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
50 Ω
VG1
VDD
DUT
50 Ω
VIN
50 Ω
VG2 50 Ω
VI
Input Generator
Input Generator VO
(VOH + VOL)/2
VOH
VOL
Data Out at
XB1or XB 2
(VOH + VOL)/2
VDD
(1)
0 V
Data In at
Ax or A y
tPLHx tPHLx
tsk(o) tsk(o)
tPLHy tPHLy
tsk(o) = tPLHy − tPLHx or tPHLy − tPHLx
VOH
VOL
VOLTAGE WAVEFORMS
PULSE SKEW [t sk(p)]
Output (VOH + VOL)/2
Input
tPLH tPHL
tsk(p) = tPHL − tPLH
VO
VI
VO
V /2
DD
VDD
(1)
0 V
V /2
DD
(1) 2 V ± 0.2 V for SCL, SDA
TEST RL
S1 CL
5 V ± 0.5 V
VDD_5 Vin
tsk(p)
tsk(o)
5 V ± 0.5 V
Open
Open
200 Ω*
or
1 kΩ
VDDor GND
VDD or GND
10 pF
10 pF
3.3 V ± 0.3 V
VDD
3.3 V ± 0.3 V
R = 200
LΩ applies to all switch outputs
R = 1 kΩ applies to all buffer outputs
L
*
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
(Propagation Delay and Skew)
Figure 10. Test Circuit and Voltage Waveforms
10 Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
Network Analyzer
(HP8753ES)
EXT TRIGGER
BIAS
P1 P2
DUT
A0
SEL
0B1
VSEL
VDD
VBIAS
CL= 10 pF
(see Note A)
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
PARAMETER MEASUREMENT INFORMATION
A. CLincludes probe and jig capacitance.
Figure 11. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 and A0is the
input, the output is measured at 0B1. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST=2s
P1 = 0 dBM
Copyright © 2010, Texas Instruments Incorporated 11
Product Folder Link(s): TS3V713EL
Network Analyzer
(HP8753ES)
EXT TRIGGER
BIAS
P1 P2
DUT
A0
SEL
0B1
VSEL
VDD
VBIAS
A1
1B2
1B1
2B1
3B1
A2
A3
RL= 50 Ω
RL= 50 Ω
0B2
3B2
2B2
TS3V713EL
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
A. CLincludes probe and jig capacitance.
B. A 50-Ωtermination resistor is needed to match the loading of the network analyzer.
Figure 12. Test Circuit for Crosstalk (XTALK)
Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VSEL = 0 and A1is the
input, the output is measured at A3. All unused analog input (A) ports are connected to GND, and the output (B)
ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST=2s
P1 = 0 dBM
12 Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TS3V713EL
Network Analyzer
(HP8753ES)
RL= 50 Ω
EXT TRIGGER
BIAS
P1 P2
DUT
A0
SEL
0B1
VSEL
VDD
VBIAS
0B2
A11B1
1B2
TS3V713EL
www.ti.com
SCDS312A –NOVEMBER 2010–REVISED NOVEMBER 2010
PARAMETER MEASUREMENT INFORMATION (continued)
A. CLincludes probe and jig capacitance.
B. A 50-Ωtermination resistor is needed to match the loading of the network analyzer.
Figure 13. Test Circuit for Off Isolation (OIRR)
Off isolation is measured at the output of the OFF channel. For example, when VSEL = GND and Asis the input,
the output is measured at 1B2. All unused analog input (A) ports are connected to GND, and the output (B) ports
are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST=2s
P1 = 0 dBM
Copyright © 2010, Texas Instruments Incorporated 13
Product Folder Link(s): TS3V713EL
PACKAGE OPTION ADDENDUM
www.ti.com 3-Dec-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TS3V713ELRTGR ACTIVE WQFN RTG 32 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TS3V713ELRTGR WQFN RTG 32 3000 330.0 16.4 3.3 6.3 1.0 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS3V713ELRTGR WQFN RTG 32 3000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated