Septe mbe r 20 03
DUAL HIGH CURRENT RELAY DRIVER
.HIGH OUTP UT CURRE NT
.HYSTERESIS INPUT COMPARATOR WITH
WIDE RANGE COMMON MODE OPERATION
AND GR OUND C OMP ATIBLE INPUTS
.INPUT COMPARATOR HYSTERESIS
.INTERNAL THERMAL PROTECTION WITH
HYSTERESIS
.INTERNAL OUTPUT OVERVOLTAGE CLAMP-
ING
.SING LE SUPPL Y VOLT AGE (3. 5V up to 18V)
DESCRIPTION
The L9305A is a mo nolithic int erfac e circ uit with d if-
ferential input comparator and open collector output
able to si nk high cu rr ent s pec if i ca lly t o dr iv e r ela ys ,
lamps , d. c . motor s .
Particular care has been taken to protect the de vice
agains t des tru ctiv e failur es - s ho rt c ir c uit of o ut puts
to V S, output ov ervoltage s, s upply ov ervoltage .
A built in ther mal shut -dow n swi tches off the de vic e
when the IC’s internal dissipation becomes too great
and the chip temperature exceeds a set security
threshold.
A hysteresis input comparator increases the interfa-
ce’s noise immunity, allowing the correct use also in
critical environments as automotive or industrial ap -
plications.
Powerdip (8 + 8)
ORDERI NG NUMBE R : L9305A
BLOCK D IAGRAM
L9305A
®
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ABSOLU TE MAX IMUM RATINGS
Symbol Parameter Value Unit
V5Supply Voltage (*) 20 V
V7Driver Supply Voltage 26 V
IZS Supply Zener Clamp Current (D C)
(PULSED) (**) 30
80 mA
mA
VIComparator Input Voltage Range – 0.2 to 24 V
VIDifferential Input Voltage 24 V
Tj, T stg Junction and Storage Temperature – 55 to 150 °C
Ptot Power Dissipation at Tamb = 85 °C928 mW
IoOutput Current Int. limited
(*) The maximum allowed supply voltage without series resistors is limited by the built-in zener protection diodes
(**) Ton ≤ 2.5 ms ; repetition time ≥ 30 ms.
PIN CONNECTION (top view)
THERMAL DATA
Symbol Parameter Value Unit
Rth j-pi ns Thermal Resistance Junction to pins Max. 15 °C/W
Rth j-amb Thermal Resistance Junction to Ambient Max. 70 °C/W
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ELECTRICAL CHARACTERISTICS (V5 = 14.4V, Tamb = 25°C ; refer to block diagram unless otherwise
specified)
Symbol Parameter Test Conditio ns Min. Typ. Max. Unit
V5Supply Voltage 3.5 18* V
IS "st.by" Supply Current VI + – VI – ≥ 70mV 58mA
I
SON Supply Current VI – – VI + > 70m V 18 30 mA
VCZ Output Clamping Voltage (for
each channel) IOUT = 1A 20 27 V
VZS Supply Voltage Clamp IZS = 10mA 20 27 V
VIH Comparator Hysteresis VI + – VI – = 200mVpp
f = 1kHz 20 70 mV
IBInput Bias Current V + = V – = 0V 0.2 1 µA
IOS Input Offset Current V + = V – = 0V ± 20 ± 200 nA
CM R Input Common Mode Range V5 = 3.5V to 18V 0 V5 – 1.6 V
ISC Output Short Circuit Current for
Each Channel VI – – VI + ≥ 70mV Vout = 16.5V
Vout = 6V 0.85 A
2.5 A
ICD Driver Transistor Current
Capability VI – – VI + ≥ 70mV DC
Pulsed (**) 300 mA
600 mA
VCSAT On Status Saturation Voltage VI – – VI + ≥ 70mV
ICD = 100mA
ICOUT = 1.2A
1V
I
OL Output Leakage Current VI + – VI – ≥ 70mV 250 µA
*TON ≤ 2.5 ms ; repetition time ≥ 30 ms.
** The maximum allowed supply voltage without limiting resistors is limited by the built-in protection zener diodes see VCZ, VZS
TEST AND APPLICATION CIRCUIT
L9305A
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APPLICATION I NFORMATIONS (ref er to appl ication circui t)
D1 and D2 diodes a re r equi re d only for r ev er se po-
larity pr ot ec tion.
If VS may be higher than VZS a re sist or RS is neces-
sary to limit the z ener current I ZS. In order to det er -
mine RS value the following equatio ns can be used :
VS M AX – VD1 – V ZS min
1) < IZS MAX
RS
2) V S min – VD1 – RS – ISON MAX > VST min
wher e f rom T amb = 25 °C :
- VS MAX and VS min a re the maxim um and minimum
values of power su pply volt a ge
- VD1 is the forwa rd diod e D1 vol t age dr op
- VZS min = 20 V
- IZS MAX = 30 mA for d.c. mode and IZS MAX = 80 mA
for puls ed m ode (see Abso lut e m ax im um r atings)
- ISOM MAX = 30 mA
- VST min = 3.5 V
If no RS value ca n satisf y t he syste m 1), 2) a more
power f ull externa l z ene r DZ = 18 V is re quired.
Then 1) becomes :
VS MAX – V D1 – 18 < IDZ MAX
RS
wher e I DZ MAX is t he m ax im um all owed DZ current.
VA voltage cannot be higher than 20 V otherwise
output overvoltage protection may be activated.
Morever VA must be less than 16 V if short circuit
protect io n is re quir ed .
DZ2 = 22 to 24 V i s a m andator y for out put 7 pr otec-
tion if VS may be hi gher than 26 V .
MOUNTIN G INSTRUCTIO N
The L9305A is assembled in a new plastic package,
the Pow er dip , in wh ic h 8 pin s ( fro m 9 to 16) are at -
tache d to the frame and re mover the heat produced
by the chip.
Figure 2 and 3 show two ways of heatsinkin g. In the
first case, a PC board copper area is used as a
heatsink I = 65 mm. While in the second case, the
device is soldered to an external heatsink. In both
examples, the thermal resistance junction-ambient
is 35 °C/W.
Figure 2 : Exam pl e of Hea tsink Using P C Bo ar d
Copper (I = 65 mm). Figure 3 : Exam p le of an E x ter nal Heats in k.
L9305A
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DIP16
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 0.050
OUTLINE AND
MECHANICAL DATA
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-
quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this
publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-
croelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicr oelectroni cs. The ST logo is a regis tered trad emark of STMi croelec tronics.
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