AdLib OCR Evaluation Microelectronics Product Note June 1996 Lucent Technologies Bell Labs Innovations AV6220A MPEG-2 System-Layer Demultiplexer Features . Compliant with ISO/IEC 13818-1 MPEG-2 System and DVB requirements (transport stream format) . Identifies and extracts up to 32 user-definable packet IDs (PIDs) from a transport stream (TS) . Filters up to eight service information (SI) or program specific information (PSI) tables . Accepts transport data from a TS interface or over the host data bus for CD-ROM applications . Recovers a 27 MHz system clock using the program clock reference or original program clock reference from the transport stream and an external VCXO " Generates audio bit clock rates of 512, 384, 256, 192, 128, and 64 kbits/s using an external VCXO . Supports bit-serial or byte-parallel transport stream input and elementary stream outputs . Supports interfacing to a variety of audio, video, and combined audio/video decoders . Supports interfacing to a variety of microprocessor devices Applications The Lucent Technologies' AV6220A design offers an open and interoperable solution for the design of systems for MPEG-2 applications such as : . Integrated receiver decoders (IRD) - Cable TV - Direct broadcast satellite (DBS) -Video-on-demand - Interactive TV . Headend uplink facilities . CD-ROM video entertainment solutions . Operates at a maximum TS input rate of 12 Mbytes/s parallel or 54 Mbits/s serial . PC multimedia solutions . Operates at a maximum video stream output rate of 27 Mbytes/s parallel or 27 Mbits/s serial Description . Six selectable video and audio data output modes with separate or combined streams Lucent Technologies' AV6220A MPEG-2 SystemLayer Demultiplexer (MSLD) provides users with effi cient, cost-effective MPEG-2 transport layer demulti plexing . This device complies with the MPEG-2 and DVB specifications and provides a comprehensive feature set . It demultiplexes TS packets into packetized elementary streams (PES), elementary streams (ES), PSI, SI, systems, and private data . . Processes dedicated transport stream header, adaptation field, and packetized elementary stream header information fields . Provides a flexible TS frame synchronization routine . Provides error code insertion capability . Performs video and audio presentation time stamp and decoding time stamp processing required for video and audio synchronization . Provides a DRAM controller for up to 1 Mbyte of external DRAM which allows host access to information contained in selected TS packets . Maintains up to 34 separate DRAM queues : 1 audio delay, 1 video buffer, and 32 PID/SI table associated buffers . Contains a scrambling interface for encryption/ decryption and conditional access The AV6220A works seamlessly with multiple MPEG-2 video, audio, and combined video/audio decoders, as well as a variety of processors . It accepts either serial or byte wide TS inputs and may also receive TS data through the host interface for CD-ROM applications . The MSLD provides clock recovery for the system 27 MHz clock and assists in the synchronization of video and audio streams. The AV6220A is available in a low-cost, 160-pin plastic metric quad flat pack (MQFP) and uses advanced 0.55 gm, 5.0 V, CMOS technology that provides low power consumption of less than 1 W. AdLib OCR Evaluation AV6220A MPEG-2 System-Layer Demultiplexer Description Product Note June 1996 (continued) DECRYPTION DEVICE CRYPTO INTERFACE TRANSPORT HEADER PROCESSOR (TPROC) TRANSPORT STREAM INTERFACE PID PID COMPARATOR (PIDCMP) TRANSPORT STREAM INTERFACE (CONTROLLER (TIF) ADAPTATION FIELD PROCESSOR (APROC) PCR TRANSPORT STREAM DATA VIDEO CLOCK RECOVERY (VCLK) CLOCK RECOVERY INTERFACE VCXO PES PROCESSOR (PESPROC) PID INDEX CRYPTO INTERFACE CONTROLLER (CIF) DRAM CONTROLLER (MEMCTRL) PTS DTS MICROPROCESSOR INTERFACE (PIF) I +I AUX DATA ' AUX DATA PROCESSOR I+ INTERFACE (AP)) ' + VIDEO FIFO _ (VF) PERIPHERAL INTERFACE SI LTER (SIIPROC) AUDIO CLOCK RECOVERY (ACLK) - AUDIO INTERFACE GLOBAL RESET DRAM INTERFACE HOST PROCESSOR INTERFACE DRAM VCXO 5-4505(F) Figure 1 . AV6220A MILD Block Diagram Lucent Technologies Inc. AdLib OCR Evaluation AV6220A M P EG-2 System-Layer Demultiplexer Product Note June 1996 Description (continued) INPUT SIGNAL REMOTE CONTROL TUNER CONSOLE CONTROL DEMODULATOR HUMAN INTERFACE FORWARD ERROR CORRECTION CD-ROM, VIDEO DISK HOST INTERFACE MICROCONTROLLER DRAM INTERFACE E I L L I I --====_ I AV6220A MPEG-2 SYSTEM-LAYER DEMUX(MSLD) CRYPTO INTERFACE CLOCK INTERFACE DRAM -----------DRAM TRANSPORT STREAM INTERFACE VIDEO AUDIO ----------------INTERFACE INTERFACE MPEG-2 DIGITAL-VIDEO DECODER AUDIO DECODER COMBINED VIDEO/AUDIO DECODER VIDEO RECONSTRUCTOR DECRYPTION, CONDITIONAL ACCESS CLOCK RECOVERY SYSTEM CLOCKS I I I I I AUDIO DAC RF MODULATOR VIDEO OUTPUT RF OUTPUT AUDIO OUTPUT Figure 2. AV6220A MILD Typical Set-Top Box Application Diagram Lucent Technologies Inc. 5-4506(F) AdLib OCR Evaluation AV6220A MPEG-2 System-Layer Demultiplexer Product Note June 1996 Interface Information TDATAP[7 :0] TSCLKP TPCLKP TDVLDP TPSTARTP TPERRN VDATAP[7 :0] VSDATAP TRANSPORT STREAM INTERFACE VIDEO INTERFACE VPDCS1 N VPDCS2N VWAITN VPDWRN MDQP[15 :0] M RAS2N MCAS1 N DRAM INTERFACE AUDIO INTERFACE MCAS2N UCSN UDTACKN UBR ADREQN ADVLDP XDATAP[7 :0] AUXILIARY DATA INTERFACE UIRQP URDN ADATAP ACLKP MWEN UWRN VERRP VCLKP VDREQN MADDRP[8 :0] M RAS1 N VDVLDP HOST BUS INTERFACE UBG UMXBP XDVLDP XADRP[4:0] XPSTARTP XERRP RVPHDIFFP CLOCK RECOVERY INTERFACE UALE RAPHDIFFP RCLK27M P RCLK12MP RCLK90KP RCLK24M P CDATAOP[7:0] GRSTN GOEP GLOBAL INTERFACE CDATAI P[7 :0] CRYPTO INTERFACE CDVLDP CDREQP CSCRAMOP[1 :0] CSCRAMIP[1 :0] CPSTARTP CPIDP[4:0] 5-4507(F) Figure 3. AV6220A MILD Interface Diagram 4 Lucent Technologies Inc. AdLib OCR Evaluati -oul seibolouyoal jueonj uaei6eia uid alsw VOZZgAV 'b aqn6id (j)805b-S 3333 3333 p pp p pp p p 3333 3333 3333 3333 DDDD DDDD D y p pQQ QQQQ 07JD7JD C)DC)D3 D 0000 0 000 < O < mmmm n n n n< mmmm n n n n< mm n n~~<~~~~7J7J7J7J7J7J7J7J<7J < mmmm m(~(~<(~(~~m< mmmm I I O~Z Zu, Z ZZVO SSA [9]dov1V00 [9]dov1V00 [b]doV1V00 00A [E]dov1V00 [Z]dov1V00 l L]dov1V00 [0]dov1V00 SSA [L]d IV1V00 [9]div1V00 [9]dlv1V00 [b]d IV1V00 00A [E]div1V00 [Z]div1V00 1L]div1V00 [0]div1V00 SSA [E]d01d0 [Z]d01d0 1L]d01d0 [0]d01d0 IN03HOV LL]diWVuoSO LO]d I WVuoSO LL]doWVuoSO [O]do WVuoSO SSA dA-lOdl d03u00 d0-lA00 d1HV1Sd0 00A IO]duuOVX IL]duuOVX IZ]duu(lVX IE]duuOVX SSA SSA san a9n Numn 3nvn 00A NSOn NNOViOn douI n Noun SSA d9XWn d30S NISHCJ bd01d0 NESOOdA bdH00VX 00A N LSOOdA N03H0A HH3A d0-lAGA SSA dA-10A NHMOdA dV1VOSA NlIVMA [L]dV1V0A l9]dV1V0A l9]dV1V0A lb]dV1V0A SSA IE]dVIV0A 1Z]dVTV0A lL]dV1V0A 10]dV1V0A 00A dWLZN-lOu ddd1OHdAH SSA <DDDJJ<JJJJJJ<~~~~<~~~~<~<~~<~xxx<XXXX<XXXX< pppOp(~DOO~ppppppppp(~(~ppm(~mmmpppppp(~ppppp pD<rr(nmrr(nDDDDpDDDD(nOp<m(n(n7](n<pDDDD(nDDDDp p m o m n~ A mmm T~~ I : -T '," ~o m p ~7 mZ D m D p m mm _~ Jim "? _ ." 'o UOIIEUIJOIUI Uld aaxalditinuaaa aai(e-l-uaawg Z-!D3dW VOZZ9Ad 9661 aunt OION janPOad AdLib OCR Evaluation AV6220A MPEG-2 System-Layer Demultiplexer Pin Information Product Note June 1996 (continued) Table 1 . AV6220A Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 Name Vss XADDRP[3] XADDRP[2] XADDRP[1 ] XADDRP[0] VDD CPSTARTP CDVLDP CDREQP TPCLKP I/O O O O O O O O I/O 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I Vss CSCRAMOP[0] CSCRAMOP[1] CSCRAMIP[0] CSCRAMIP[1] ADREQN CPIDP[0] CPIDP[1 ] CPIDP[2] CPIDP[3] Vss CDATAIP[0] CDATAIP[1] CDATAIP[2] CDATAIP[3] VDD CDATAIP[4] CDATAIP[5] CDATAIP[6] CDATAIP[7] Vss CDATAOP[0] CDATAOP[1 ] CDATAOP[2] CDATAOP[3] VDD CDATAOP[4] CDATAOP[5] CDATAOP[6] Vss I O O I I I O O O O I I I I I I I I O O O O O O O - I Description GND. Auxiliary Address. Auxiliary Address. Auxiliary Address. Auxiliary Address. Power Supply +5 V. Crypto Packet Start. Crypto Data Valid. Crypto Data Request. Transport Stream Parallel Clock. GND. Crypto Scrambling Bits Out . Crypto Scrambling Bits Out. Crypto Scrambling Bits In . Crypto Scrambling Bits In . Audio Data Request. Crypto PID. Crypto PID. Crypto PID. Crypto PID. GND. Crypto Data In . Crypto Data In . Crypto Data In . Crypto Data In . Power Supply +5 V. Crypto Data In . Crypto Data In . Crypto Data In . Crypto Data In . GND. Crypto Data Out. Crypto Data Out. Crypto Data Out. Crypto Data Out . Power Supply +5 V. Crypto Data Out. Crypto Data Out. Crypto Data Out. GND. II Pin 41 42 43 44 45 46 47 48 49 50 Name VDD CDATAOP[7] MWEN MCAS2N MCAS1 N Vss MCAS2N MCAS1 N MADDRP[8] VDD I/O O O O O O O I/O - 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 I MADDRP[7] MADDRP[6] MADDRP[5] MADDRP[4] Vss MADDRP[3] MADDRP[2] MADDRP[1 ] MADDRP[0] VDD MDQP[15] MDQP[14] MDQP[13] MDQP[12] Vss MDQP[11 ] MDQP[10] MDQP[9] MDQP[8] VDD MDQP[7] MDQP[6] MDQP[5] MDQP[4] Vss MDQP[3] MDQP[2] MDQP[1] MDQP[0] I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I -I VDD Description Power Supply +5 V. Crypto Data Out. DRAM Write Enable . DRAM Col. Addr. Strobe 2. DRAM Col. Addr. Strobe 1 . GND. DRAM Col. Addr. Strobe 2 . DRAM Col. Addr. Strobe 1 . DRAM Memory Address. Power Supply +5 V. DRAM Memory Address. DRAM Memory Address. DRAM Memory Address. DRAM Memory Address. GND. DRAM Memory Address. DRAM Memory Address. DRAM Memory Address. DRAM Memory Address. Power Supply +5 V. DRAM Data . DRAM Data . DRAM Data . DRAM Data . GND. DRAM Data . DRAM Data . DRAM Data . DRAM Data . Power Supply +5 V. DRAM Data . DRAM Data . DRAM Data . DRAM Data . GND. DRAM Data . DRAM Data . DRAM Data . DRAM Data . Power Supply +5 V. Lucent Technologies Inc. AdLib OCR Evaluation AV6220A M P EG-2 System-Layer Demultiplexer Product Note June 1996 Pin Information (continued) Table 1 . AV6220A Pin Descriptions (continued) Pin 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 Name Vss UBG UBR UWRN UALE VDD UCSN UDTACKN UIRQP URDN Vss UMXBP GOEP GRSTN CPIDP4 VPDCS2N 97 98 99 XADDRP4 VDD VPDCS1 N Pin 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 100 VDREQN 101 VERR Description GND. gP Bus Grant. gP Bus Request . gP Write Enable . gP Address Latch Enable . Power Supply. +5 V. gP Chip Select . gP Data Acknowledge. gP Interrupt. gP Read Enable . GND. gP Multiplex Enable . Global Output Enable . Global Reset. Crypto PID Bit 4. Peripheral Device Chip Select 2. O Auxiliary Address Bit 4. - Power Supply. +5 V. O Peripheral Device Chip Select 1 . I Video Data Request. O Video Data Error. 102 VDVLDP 103 Vss O Video Data Valid. - GND. 142 VDD 143 TDVLDP 104 VCLKP I/O Video Clock. 144 TPERRN 105 VPDWRN 106 VSDATAP O O 145 Vss 146 TPSTARTP 107 108 109 110 111 112 113 114 115 116 117 118 119 1201 VWAITN VDATAP[7] VDATAP[6] VDATAP[5] VDATAP[4] Vss VDATAP[3] VDATAP[2] VDATAP[1] VDATAP[0] VDD RCLK27MP RVPHDIFFP Vss I/O I O I I I O O I I I I O O I I/O I/O I/O I/O I/O I/O I/O I/O I O I - Lucent Technologies Inc. Video Proc . Data Write. Serial Video Data . Video Decoder Wait . Video Data. Video Data. Video Data. Video Data. GND. Video Data. Video Data. Video Data. Video Data. Power Supply. +5 V. 27 MHz Video Sys.Clock . Video Clock Phase Diff . I GND. Name VDD ADATAP ADVLDP ACLKP RCLK90KP Vss RAPHDIFFP RCLK12MP RCLK24MP Vss TDATAP[7] TDATAP[6] TDATAP[5] TDATAP[4] VDD TDATAP[3] 137 TDATAP[2] 138 TDATAP[1 ] 139 TDATAP[0] 140 Vss 141 TSCLKP 147 148 149 150 151 152 153 154 155 156 157 158 159 II 160 XERRP XPSTARTP XDVLDP VDD XDATAP[7] XDATAP[6] XDATAP[5] XDATAP[4] Vss XDATAP[3] XDATAP[2] XDATAP[1 ] XDATAP[0] I VDD I/O O O O O O O I I I I I I Description Power Supply +5 V. Audio Data . Audio Data Valid . Audio Clock. 90 kHz Clock. GND. Audio Clock Phase Diff. 12 .288 MHz Clock. 24 .576 MHz Clock. GND. Transport Stream Data . Transport Stream Data . Transport Stream Data . Transport Stream Data . Power Supply +5 V. Transport Stream Data . I I I Transport Stream Data . Transport Stream Data . Transport Stream Data . - GND. I Transport Stream Serial Clock. - Power Supply +5 V. I Transport Stream Data Valid. I Transport Stream Packet Error. - GND. I Transport Stream Packet Start. O Auxiliary Error. O Auxiliary Packet Start. O Auxiliary Data Valid. - Power Supply +5 V. O Auxiliary Data. O Auxiliary Data. O Auxiliary Data. O Auxiliary Data. - GND. O Auxiliary Data. O Auxiliary Data . O Auxiliary Data. O Auxiliary Data. I - I Power Supply +5 V. AdLib OCR Evaluation AV6220A MPEG-2 System-Layer Demultiplexer Product Note June 1996 Ordering Information Description Package Device Code MPEG-2 System-Layer Demultiplexer I 160-pin, plastic MQFP I AV6220A27J-DB Comcode I 107530289 For additional information, contact your Lucent Technologies Account Manager or the following : U.S .A . : Microelectronics, Lucent Technologies Inc., 555 Union Boulevard, Room 30Q-050BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA : 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Asia/Pacific, Lucent Technologies Inc., 14 Science Park Drive, #03-02A/04 The Maxwell, Singapore 0511 Tel. (65) 778-8833, FAX (65) 777-7495 JAPAN: Microelectronics, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3-5421-1600, FAX (81) 3-5421-1700 For data requests in Europe : LUCENT TECHNOLOGIES DATALINE :Tel . (44) 1734 324 299, FAX (44) 1734 328 148 For technical inquiries in Europe : CENTRAL EUROPE : (49) 89 95086 0 (Munich), NORTHERN EUROPE : (44) 1344 865 900 (Bracknell UK), FRANCE : (33) 1 47 67 47 67 (Paris), SOUTHERN EUROPE : (39) 2 6601 1800 (Milan) or (34) 1 807 1700 (Madrid) Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application . No rights under any patent accompany the sale of any such product(s) or information. Copyright m 1996 Lucent Technologies Inc. All Rights Reserved Printed in U.S.A . June 1996 PN96-042VES (Replaces PN95-076VES) _. Lucent Technologies Bell Labs Innovations