02097-DSH-001-C Mindspeed Technologies®November 2006
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Preliminary Information
M02097-11/-21
3.3/5V LED Driver / Limiting Amplifier
for Operation to 500 Mbps
Preliminary Information
This document contains information on a new product. The parametric information, although not
fully characterized, is the result of testing initial devices.
Applications
155Mbps LAN ATM Transceivers
ESCON Receivers
Fast Ethernet/FDDI
Multimode LED Transmitters
SFP Transceivers
IEEE 1394 S100, S200 and S400 Transceivers
Features
High speed operation; suitable for applications to 500 Mbps. 200 ps
typical rise/fall time into 5.
Programmable modulation current to 120 mA
Integrated power supply switch for redundant shutdown under a
fault condition
The M02097 is an integrated LED driver and limiting amplifier for applications to 500 Mbps. The LED driver
modulation output can be AC or DC coupled to an LED. The device can operate from a 3.3V or 5V supply.
The M02097 includes monitors for bias and modulation current. Integrated safety circuitry provides latched bias
and modulation current shutdown if a fault condition is detected and provides an internal VCC switch.
The limiting amplifier also includes a programmable signal-level detector, allowing the user to set thresholds at
which the logic outputs are enabled. The M02097-11 features a PECL LOS-ST output while the M02097-21
features a CMOS (external pull-up required) LOS-ST output. PECL outputs are available on the limiting amplifier.
Configuration logic provides flexibility in setting data path polarity, safety logic configuration, and LOS behavior.
M02097 Block Diagram
V
CC
3T
SV
CC
OUT+
OUT-
GND
0
PB
OUT
Input
Buffer
D
IN
-
D
IN
+
TX
Disable
FAIL
DIS
RESET
V
CC
T
GND
3.3V Regulator
with Bypass
To Safety
Logic
To Safety
Logic
V
CC
V
CC3
Laser
Driver
MODSET
PBSET
LED Pre-Bias Control
Threshold
Setting
Circuit
Biasing
RxOUTp
RxOUTm
RSSI
LOS-ST
RxINm
Iref
RxINp
V
CC
RSTSET
Offset Cancel
DCR_Disable
Limiting
Amplifier
SCB
Safety
Circuitry with
Latched Fault
Output
Buffer
Tx_Polarity
Rx_Polarity
CONFIG_2
Tx_Polarity
Rx_Polarity
CONFIG_3
CONFIG_1
DCR_Disable
C
PB
TC
SLOPE
TC
START
LOS-to-JAM
CONFIG_4
LOS-to-JAM
LOS-ST_sel
LOS-ST_sel
LOS
Level
Detect
Comparator
V
CC
3R
Configuration
Logic
Modulation
Control
Vttx
4k
4k
Vttr
2k
2k
Output
Buffer
Regulator
with Bypass
CMOS/TTL
(-21 )
PECL (- 11)
PECL
Features (con’t)
Temperature compensation for modulation current
Pre-bias adjustment to improve LED edge speed
SFP compliant safety circuitry (configurable)
6mV input limiting amp sensitivity at 500 Mbps.
PECL limiting amplifier outputs
Limiting amplifier includes integrated DC offset cancellation circuit
Polarity Control for both the driver and limiting amplifier data paths
Operates with 3.3V or 5V supply with an internal auto-sensing
regulator that enables with 5V supplies and is bypassed with 3.3V
supplies
Powers 3.3V ROSAs from its Receiver Regulator output enabling true
3.3/5V designs using all 3.3V Mindspeed TIAs
02097-DSH-001-C Mindspeed Technologies®ii
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Preliminary Information
M02097 622 Mbps LED Driver Eye Diagram M02097 Pin Configuration
Ordering Information
Part Number Package Operating Temperature
M02097G-11* QFN32 –40°C to 95°C
M02097G-21* QFN32 –40°C to 95°C
* The letter “G” designator after the part number indicates that the device is RoHS-compliant. Refer to www.mindspeed.com for additional
information.
Revision History
Revision Level Date ASIC
Revision Description
C Preliminary November 2006 -11/-21 Reflect current device pinout.
B Advance August 2006 -11/-21 Update several specifications based on initial device evaluation.
A Advance June 2006 NA Initial Release.
GND
RxINp
RxINm
Config1
Config2
Config3
Config4
LOS-ST
I
REF
C
PB
V
CC
3T
PB
SET
NC
NC
MOD
SE T
DIS
FAIL
RxOUTm
RxOUTp
V
CC
R
V
CC
T
TC
SLOPE
TC
START
DINp
DINm
V
CC
3R
ST
SET
SV
CC
OUTN
GNDO
PB
OUT
NC
1
2
3
4
5
7
6
8
12
1110
916151413
20
19
18
17
24
23
22
21
28 27 26 2532 31 30 29
OUT P
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1.0 Product Specification
1.1 Absolute Maximum Ratings
These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged.
Reliable operation at these extremes for any length of time is not implied.
1.2 Recommended Operating Conditions
Table 1-1. Absolute Maximum Ratings
Symbol Parameter Rating Units
VCC Power supply voltage -0.4 to +6.5 V
VCC3 3.3V power supply voltage (when VCC3 is connected to VCC) -0.4 to +4.0 V
TAAmbient operating temperature -40 to +95 °C
TSTG Storage temperature -65 to +150 °C
IPBOUT_MAX Maximum pre-bias output current at PBOUT 20 mA
IMOD_MAX Maximum modulation current 140 mA
Table 1-2. Recommended Operating Conditions
Parameter Rating Units
Power supply: (VCC-GND) (apply no potential to VCC3) or
(VCC3-GND) (connect VCC to same potential as VCC3)
+5V ± 7.5% or
+3.3V ± 7.5%
V
Junction temperature -40 to +125 °C
Operating ambient -40 to +95 °C
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1.3 DC Characteristics
1.3.1 DC Electrical Characteristics - LED Driver
VCC = 3.05 to 3.55V or 4.7 to 5.5V, TA = -40°C to +95°C, unless otherwise noted.
Typical values are VCC = 3.3V, IPBOUT = 4mA, IMOD = 50mA.
Table 1-3. DC Electrical Characteristics - LED Driver
Symbol Parameter Conditions Minimum Typical Maximum Units
ICC VCCT supply current Using external 3.3V supply VCC = 3.3V (1)
Additional current when operating from 5V
supply
34
1.5
43
mA
VCC3THL 3.3V supply detection (low
voltage) threshold (3)
2.6 2.8 3.0 V
VCC3HH 3.3V supply detection (high
voltage) threshold (3)
3.65 3.8 4.1 V
VCC5THL 5V supply detection (low
voltage) threshold
4.3 4.45 4.65 V
VCC5THH 5V supply detection (high
voltage) threshold
5.6 6.0 6.2 V
VMODSET Modulation current ref. Voltage reference for MODSET 1.1 1.25 1.4 V
VPBSET Pre-bias current setting output
voltage reference
Voltage at PBSET 1.1 1.25 1.4 V
VFAULTL Low fault voltage detection
threshold (IBOUT, OUTP, CPB,
MODSET, PBSET)
Fault condition occurs when voltage drops
below this level
100 200 mV
VSELFL Self-biased voltage for PBOUT
and OUTP
During disable condition 0.5 1.6 1.8 V
IPRE-BIAS Pre-bias current adjust range At PBOUT. VPBOUT > 0.7V 1 10 mA
IPBIAS(OFF) Pre-bias current with output
disabled
DIS = high
VPBOUT = VCC3
150 µA
Ratio of pre-bias output current
to PBSET current
= IPRE-BIAS / IPBSET –60–A/A
VIH_DIS TTL/CMOS input high voltage
(DIS)
2.0 5.5 V
VIL_DIS TTL/CMOS input low voltage
(DIS)
––0.8V
VIH_CFG Configuration logic input high
voltage (Config1 - 4) (4)
VCC3T-0.5 V
VIL_CFG Configuration logic input low
voltage (Config1 - 4) (4)
––0.5V
VOH_FAIL Logic output high voltage (FAIL) With external 10 k pull-up to VCC VCC - 0.6 V
VOL_FAIL Logic output low voltage (FAIL) IOL = 0.8 mA 0.4 V
RIN Differential input resistance Transmitter Data inputs 6 k
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1.3.2 DC Electrical Characteristics - Limiting Amplifier
VCCR = 3.05 to 3.55V or 4.7 to 5.5V, TA = -40°C to +95°C, unless otherwise noted.
Typical values are VCC = 3.3V, 25°C.
VCMSELF Self-biased common mode input
voltage
Data inputs floating VCC3 - 1.3 V
VINCM Common-mode input
compliance voltage
Transmitter Data inputs VCC3 - 1.5 VCC3
- VIN(Diff)/4
V
VIN(Diff) Differential input voltage = 2*(DINpHIGH – DINpLOW) 300 2400 mV
NOTES:
1. Excludes pre-bias and modulation currents delivered to the LED. Maximum supply current based on IMOD = 90 mA, IPBOUT = 10 mA.
2. Pre-bias and modulation currents add directly to power supply current in 5V applications; additional supply current noted excludes these
currents.
3. VCC3 supply okay circuitry monitors internally regulated voltage when only the +5V supply is used (VCC = 5V).
4. Input is 3.3V tolerant logic.
Table 1-4. DC Electrical Characteristics - Limiting Amplifier
Symbol Parameter Conditions Minimum Typical Maximum Units
ICC VCCR supply current Includes PECL load
Additional current when operating
from 5V supply
54
1.5
65
mA
VOUTLPECL(1) PECL Output Low Voltage
(RxOUTm, RxOUTp)
Single ended; 50 load to VCC - 2V
VCC - 1.86 VCC - 1.71 VCC - 1.62
V
VOUTHPECL(1) PECL Output High Voltage
(RxOUTm, RxOUTp)
Single ended; 50 load to VCC - 2V
VCC - 1.06 VCC - 0.95 VCC - 0.88
V
RIN_DIFF Differential Input Resistance 4 k
VOUTLLOSPECL(1) LOS Output High Voltage (2) Open collector, 4.7 - 10 k pull up to
VCC
2.4 VCC V
VOUTHLOSPECL(1) LOS Output Low Voltage (2) IOL = 0.8 mA 0.4 V
VOUTLLOSCMOS LOS-ST Output Low Voltage (1, 2, 3) Single ended; 50 load to VCC - 2V VCC - 1.9 VCC - 1.78 VCC - 1.66 V
VOUTHLOSCMOS LOS-ST Output High Voltage (1, 2, 3) Single ended; 50 load to VCC - 2V VCC - 1.13 VCC -
1.042
VCC - 0.95 V
NOTES:
1. PECL level requirements apply from 0°C to 95°C.
2. M02091-11 has PECL LOS-ST output, M02097-21 has CMOS LOS-ST output.
3. When LOS-ST is terminated with a 510 resistor to ground, PECL output high and low levels are approximately the same as for VOUTHPECL and
VOUTLPECL.
Table 1-3. DC Electrical Characteristics - LED Driver
Symbol Parameter Conditions Minimum Typical Maximum Units
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1.4 AC Characteristics
1.4.1 AC Electrical Characteristics - LED Driver
VCCT = 3.05 to 3.55V or 4.7 to 5.5V, TA = -40°C to +95°C, unless otherwise noted.
Typical values are VCC = 3.3V, IPBOUT = 4mA, IMOD = 50mA.
Table 1-5. AC Electrical Characteristics - LED Driver
Symbol Parameter Conditions Minimum Typical Maximum Units
IMOD Modulation current adjust range To meet AC specifications 30 120 mAPP
IMOD(OFF) Modulation current with output
disabled
DIS = high 150 µA
Ratio of modulation current to
MODSET current
140 A/A
IMOD-TC
Programmable range for
modulation current temperature
coefficient
Adjustable using TCSLOPE 0–10
4ppm/°C
TTCSTRT
Programmable temperature at
which modulation current TC
compensation enables
Based on value set for TCSTART -40(2) –95°C
tR / tFModulation output rise / fall
times
20% to 80%. Measured using alternating 1111-
0000 pattern at 500 Mbps; 5 load with 12pF/
35 between OUTP and OUTN
200 500 ps
OS Overshoot of modulation output Into 5 load with 12pF/35 between OUTP and
OUTN
–10%
RJ Random jitter 0.8 psRMS
DJ Modulation output deterministic
jitter
into 5 load (includes pulse width distortion)
223 - 1 PRBS at 500 Mbps
–3060ps
PP
NOTES:
1. Minimum voltage at OUTP > 0.7 V; LED forward voltage and total series resistance must be considered if output is DC coupled to LED.
2. Default if TCSTART is floating.
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1.4.2 AC Electrical Characteristics - Limiting Amplifier
VCCR = 3.05 to 3.55V or 4.7 to 5.5V, TA = -40°C to +95°C, unless otherwise noted.
Table 1-6. AC Electrical Characteristics - Limiting Amplifier
Symbol Parameter Conditions Minimum Typical Maximum Units
VIN(MIN) Differential Input Sensitivity BER < 10-12 at 1.25 Gbps with K28.5 pattern 2 mV
VI(MAX) Input Overload
BER < 10-12, differential input 1200
mV
BER < 10-12, single-ended input 600
VNRMS Input Referred Noise 285 µVRMS
VLOS LOS Programmable Range Differential inputs, 6.0 k RSTSET 8.4 k5–55mV
HYS Signal Detect Hysteresis (electrical); signal detect level set to 20 mVPP 246dB
RSSIpp Peak-to-peak received signal
strength indicator range
4–100mV
BWLF Small-Signal -3dB Low
Frequency Cutoff.
Excluding AC coupling capacitors 4 kHz
DJ Deterministic Jitter K28.5 pattern at 500 Mbps 50 ps
RJ Random Jitter 10 mVPP input 3 psRMS
tr / tfData Output Rise and Fall Times 20% to 80%; outputs terminated into 50Ω;
10mVPP input
––250ps
TLOS_ON Time from LOS state until LOS
output is asserted
LOS assert time after 1 VPP input signal is turned
off; signal detect level set to 10 mV
2.3 80 µs
TLOS_OFF Time from non-LOS state until
LOS is deasserted
LOS deassert time after input crosses signal
detect level; signal detect set to 10 mV with
applied input signal of 20 mVPP
2.3 80 µs
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1.5 Safety Logic Timing
VCC = 3.05 to 3.55V or 4.7 to 5.5V, TA = -40°C to +95°C, unless otherwise noted.
Typical values are VCC = 3.3V, IPBOUT = 4mA, IMOD = 50mA.
Table 1-7. Safety Logic Timing
Symbol Parameter Conditions Minimum Typical Maximum Units
t_off DIS assert time Rising edge of DIS to fall of output signal below
10% of nominal (1)
–110µs
t_on DIS negate time Falling edge of DIS to rise of output signal above
90% of nominal (1)
–0.41ms
t_init Time to initialize Includes reset of FAIL; from power on after
Supply_OK or from negation of DIS during reset
of FAIL condition
–4300ms
t_wc Window comparator hold-off
time
Time during which the status of the fault detect
comparators is ignored.
23–ms
t_fault LED fault time -- from fault
condition to assertion of FAIL
From occurrence of fault condition or when
Supply_OK is beyond specified range
–16100µs
t_reset DIS time to start reset DIS pulse width required to initialize safety
circuitry or reset a latched fault
––10µs
tVCC_OK Supply okay delay time Delay between supply_OK condition and when
outputs are enabled
900 µs
NOTE:
1. With CPB = 47 nF.
Figure 1-1. Safety Logic Simplified Block Diagram
DIS
Fault _OK
V
cc
3_OK
V
cc
_OK
3 .3V _ON LY
Q
Q
SET
CL R
S
R
~900
µ
s typical
FAIL
Output _Enable
* Fault_OK indicates that no fault is detected at any of the fault sense nodes
~3 ms typical
Activ ate _ Confi g _Setti ngs
TC
SL O PE
Fault _OK
Normal
SCB
+
-
~2V
Configuration settings are not updated while TCSLOPE
is
pulled high, but are updated when TC
SLOPE is at normal level
Normal
SCB
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Table 1-8. Circuit Response to Single-Point Fault Conditions on Driver Pins
Pin Name Circuit Response to Over-voltage Condition or Short to
VCC
Circuit Response to Under-Voltage Condition or Short
to Ground
Config1-4 Does not affect output power (some conditions can selectively
enable/disable driver output).
Does not affect output power (some conditions can selectively
enable/disable driver output).
VCC Outputs are disabled if VCC exceeds the VCC_okay (high level)
threshold. If so, FAIL will be asserted. (1)
Outputs are disabled if VCC voltage is below the VCC_okay (low
level) threshold. If so, FAIL will be asserted. (1)
VCC3T Outputs are disabled if VCC3 exceeds the VCC3_okay (high level)
threshold. If so, FAIL will be asserted. (1)
Outputs are disabled if VCC3 voltage is below the VCC3_okay
(low level) threshold. If so, FAIL will be asserted. (1)
DINp, DINm LED would remain in an optical one or zero condition. LED would remain in an optical one or zero condition.
CPB Pre-bias current is turned off. Does not affect LED operation. A fault state occurs.(2)
FAIL Does not affect LED operation. Does not affect LED operation.
DIS Bias and modulation outputs are disabled and SVCC is opened. Does not affect LED operation (normal condition for circuit
operation).
MODSET No modulation current. A fault state occurs. (2)
PBSET Pre-bias current is turned off. Does not affect LED power. A fault state occurs. (2)
TCSTART Modulation current may increase depending on operating
temperature and TCSLOPE setting.
Modulation current may decrease depending on operating
temperature and TCSLOPE setting.
TCSLOPE Modulation current may decrease depending on operating
temperature and TCSTART setting.
Modulation current may increase depending on operating
temperature and TCSTART setting.
PBOUT The LED is turned off if connected to the LED cathode. A fault state occurs. (2)
OUTP LED modulation is prevented and a fault state occurs. (2) A fault state occurs. (2)
OUTN Does not affect LED operation. Does not affect LED operation.
GNDO LED modulation is prevented and a fault state may occur. (2) Does not affect LED operation.
SVCC Does not affect LED operation. The LED is turned off and a fault state occurs. (2)
NOTES:
1. In this case a fault state will assert the FAIL output, but it is not latched. While the fault condition remains, the bias and modulation outputs are
disabled and the switch at SVCC is open. No fault occurs if in Safety Circuit Bypass (SCB).
2. In this case a fault state will assert and latch the FAIL output, disable bias and modulation outputs and open the switch at SVCC. No fault occurs
if in Safety Circuit Bypass (SCB).
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Figure 1-2. M02097 Safety Logic Timing Characteristics
Low
“OK
Low
HOT PLUG (DIS Low)
t_init < 5 ms
(3 ms typ.)
Supply
(1)
FAIL
DIS
LED
Output
Low
3.3V
Low
SLOW RAMPING 3.3V Operation (DIS Low)
3.3V
t_init < 5 ms
(3 ms typ.)
V
CC
FAIL
DIS
LED
Output
V
CC
3
Low
5V
Low
SLOW RAMPING 5V Operation (DIS Low)
3.3V
t_init < 5 ms
(3 ms typ.)
V
CC
FAIL
DIS
LED
Output
V
CC
3
Low
“OK
FAIL
DIS Low
LED
Output
High
TRANSMITTER ENABLE
t_on < 1 ms
(300 µs typ.)
Supply
(1)
Low
“OK
Low
High
TRANSMITTER DISABLE
FAIL
DIS
LED
Output
t_off < 10 µs
(1 µs typ.)
Supply (1)
Low
Low
RESPONSE TO FAULT
LowNormal
Fault Occurs
High
t_fault < 100 µs
(4 µs typ.)
FAIL
DIS
LED
Output
Fault sense
node such
as PB
OUT
1. Supply “OK” means both VCC and VCC3 are within their defined operating windows.
NOTE: “LED Output” is equivalent to pre-bias current plus modulation current.
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Figure 1-3. M02097 Safety Logic Timing Characteristics (Continued)
Low
High
FAULT RECOVERY BEHAVIOR
Low Normal
t_reset
10 µs
Fault Removed
t_on < 1 ms
(300 µs typ.)
FAIL
DIS
LED
Output
Fault sense
node such
as PB
OUT
FAULT RESET ATTEMPT
Low
(Does not turn on)
FAIL
DIS
LED
Output
10 µs
10 - 20 µs
Fault sense
node such
as PB
OUT
FAIL
DIS
LED
Output
FAULT RESET ATTEMPT
Low
t_init < 5 ms
(3 ms typ.)
10 µs
Fault sense
node such
as PB
OUT
1. Supply “OK” means both VCC and VCC3 are within their defined operating windows.
NOTE: “LED Output” is equivalent to bias current plus modulation current.
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1.6 M02097 Configuration Logic
Table 1-9. M02097 Configuration Logic
Config1 Config2 Config3 Config4 DIS/EN LOS=JAM/
NO_JAM LOS/ST SCB RxPOL TxPOL Special
Config.
0 0 0 0 0 0 0 0 0 0 none
0 0 0 M 0 0 0 0 0 1 none
0 0 M 0 0 0 0 0 1 0 none
0 0 M M 0 0 0 0 1 1 none
0 0 1 1 0 0 0 1 0 0 none
0 0 0 1 0 0 0 1 0 1 none
0 0 1 0 0 0 0 1 1 0 none
0 0 M 1 0 0 0 1 1 1 none
001M0 00000SC1
0 M 0 0 0 0 1 0 0 0 none
0 M 0 M 0 0 1 0 0 1 none
0 M M 0 0 0 1 0 1 0 none
0 M M M 0 0 1 0 1 1 none
0 M 1 1 0 0 1 1 0 0 none
0 M 0 1 0 0 1 1 0 1 none
0 M 1 0 0 0 1 1 1 0 none
0 M M 1 0 0 1 1 1 1 none
0M1M0 01000SC2
M 0 0 0 0 1 0 0 0 0 none
M 0 0 M 0 1 0 0 0 1 none
M 0 M 0 0 1 0 0 1 0 none
M 0 M M 0 1 0 0 1 1 none
M 0 1 1 0 1 0 1 0 0 none
M 0 0 1 0 1 0 1 0 1 none
M 0 1 0 0 1 0 1 1 0 none
M 0 M 1 0 1 0 1 1 1 none
M0 1M0 10000SC3
M M 0 0 0 1 1 0 0 0 none
M M 0 M 0 1 1 0 0 1 none
M M M 0 0 1 1 0 1 0 none
MMMM 0 1101 1none
M M 1 1 0 1 1 1 0 0 none
M M 0 1 0 1 1 1 0 1 none
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M M 1 0 0 1 1 1 1 0 none
M M M 1 0 1 1 1 1 1 none
MM 1 M 0 1100 0SC4
1 1 0 0 1 0 0 0 0 0 none
1 1 0 M 1 0 0 0 0 1 none
1 1 M 0 1 0 0 0 1 0 none
1 1 M M 1 0 0 0 1 1 none
1 1 1 1 1 0 0 1 0 0 none
1 1 0 1 1 0 0 1 0 1 none
1 1 1 0 1 0 0 1 1 0 none
1 1 M 1 1 0 0 1 1 1 none
111M1 00000SC5
0 1 0 0 1 0 1 0 0 0 none
0 1 0 M 1 0 1 0 0 1 none
0 1 M 0 1 0 1 0 1 0 none
0 1 M M 1 0 1 0 1 1 none
0 1 1 1 1 0 1 1 0 0 none
0 1 0 1 1 0 1 1 0 1 none
0 1 1 0 1 0 1 1 1 0 none
0 1 M 1 1 0 1 1 1 1 none
011M1 01000SC5
1 0 0 0 1 1 0 0 0 0 none
1 0 0 M 1 1 0 0 0 1 none
1 0 M 0 1 1 0 0 1 0 none
1 0 M M 1 1 0 0 1 1 none
1 0 1 1 1 1 0 1 0 0 none
1 0 0 1 1 1 0 1 0 1 none
1 0 1 0 1 1 0 1 1 0 none
1 0 M 1 1 1 0 1 1 1 none
101M1 10000SC6
M 1 0 0 1 1 1 0 0 0 none
1M0 0 1 11000SC7
M 1 0 M 1 1 1 0 0 1 none
1M0M1 11001SC8
M 1 M 0 1 1 1 0 1 0 none
Table 1-9. M02097 Configuration Logic
Config1 Config2 Config3 Config4 DIS/EN LOS=JAM/
NO_JAM LOS/ST SCB RxPOL TxPOL Special
Config.
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1MM0 1 11010SC9
M 1 M M 1 1 1 0 1 1 none
1 MMM 1 1101 1SC10
M 1 1 1 1 1 1 1 0 0 none
1M1 1 1 11100SC5
M 1 0 1 1 1 1 1 0 1 none
1M0 1 1 11101SC3
M 1 1 0 1 1 1 1 1 0 none
1 M 1 0 1 1 1 1 1 0 SC11
M 1 M 1 1 1 1 1 1 1 none
M 1 1 M 1 1 1 0 0 0 SC12
1 M M 1 1 1 1 1 1 1 SC13
1 M 1 M 1 1 1 0 0 0 SC14
KEY:
0, 1, M:0 = Logic low; 1 = Logic high; M = pin floating (pin goes to intermediate “mid-range” self-biased voltage
DIS/EN:0 = DIS pin acts as Tx_Disable; 1 = DIS pin becomes Tx_Enable
LOS=JAM / NO_JAM:0 = Jam outputs upon LOS; 1 = Do not jam outputs upon LOS
LOS/ST:0 = LOS-ST pin is ST (goes high with signal detect); 1 = LOS-ST pin is high with LOS
SCB:0=latched fault; 1=safety circuit bypass mode
TxPOL and RxPOL:0 = default polarity; 1 = inverted polarity
Special Config.:Refer to Special Configurations table for definition of special configuration modes
Table 1-10. M02097 Special Configurations
Special
Config. #
Special Config.
Name Definition
SC1 - SC11 Test Modes Internal Use Only; do not use
SC12 DCRDIS Disables the DC restore in the limiting amplifier. Can pass DC signal through limiting amp, but offset at
limiting amplifier input passes through to outputs.
SC13-14 Test Modes Internal Use Only; do not use
Table 1-9. M02097 Configuration Logic
Config1 Config2 Config3 Config4 DIS/EN LOS=JAM/
NO_JAM LOS/ST SCB RxPOL TxPOL Special
Config.
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Preliminary Information
2.0 Pin Definitions
Table 2-1. M02097 Pad / Pin Descriptions (1 of 2)
QFN Pin
Number Pin Name Function
1 RxOUTm Limiting amplifier inverting data output (PECL). Output is referenced to the Rx supply input (VCCR).
2 RxOUTp Limiting amplifier non-inverting data output (PECL). Output is referenced to the Rx supply input (VCCR).
3V
CCR Power supply for limiting amplifier circuitry (3.3V or 5V).
4V
CCT Power supply for LED driver circuitry (3.3V or 5V).
5TC
SLOPE Modulation temperature compensation slope. A resistor to ground sets the level of temperature compensation for
the modulation current. Forcing this pin high (to 3.3V) causes the configuration logic to ignore configuration logic
settings until this pin is released to its normal level (~1.25V). Temperature compensation is disabled if this pin is
floating.
6TC
START A resistor to ground at this pin sets the temperature at which the modulation temperature compensation slope
becomes active. Letting this pin float results in a start temperature of ~-40°C. Grounding this pin disables
temperature compensation.
7 DINp Transmitter positive Data Input. Internally terminated with 4 k to self-bias voltage of approximately
VCC3T - 0.65V. Can be AC coupled.
8 DINm Transmitter negative Data Input. Internally terminated with 4 k to self-bias voltage of approximately
VCC3T - 0.65V. Can be AC coupled.
9 FAIL Safety circuit fault indicator. Goes high when a safety logic fault is detected. The FAIL output is low when DIS is
high. Open collector; 4.7 k to 10 k external pull-up required. 5V compatible when using a 5V supply.
10 DIS Disable control (TTL compatible). When high or left floating, the bias and modulation outputs are disabled. Set
low for normal operation. 7 k internal pull-up to VCCT.
11 MODSET Modulation Current Adjust. Connect a resistor between this pin and ground to set LED modulation current.
12 NC No connect, leave floating. Do not connect to ground or VCC.
13 NC No connect, leave floating. Do not connect to ground or VCC.
14 PBSET A resistor connected from this pin to ground sets the LED pre-bias current. Leave floating if pre-bias is not used.
15 NC Not connected in package.
16 PBOUT LED pre-bias current output. Connect to LED cathode with a 100 resistor between the LED anode and cathode.
17 GNDO Ground for modulation output stage. Connect directly to ground or can connect to ground through an inductor.
18 OUTP Transmitter positive modulation output. Draws current when DINp is high. Referenced to the SVCC (transmitter
regulator output) voltage.
19 OUTN Transmitter negative modulation output. Draws current when DINp is low. Referenced to the SVCC (transmitter
regulator output) voltage.
20 SVCC Internal power supply switch for LED. Provides redundant shutdown during a disable or fault condition.
Pin Definitions
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21 VCC3T Internally regulated voltage for LED driver circuitry in 5V applications. Connect directly to supply to allow wider
power supply tolerance in 3.3V-only applications (internal regulator not in use). Do not connect to power supply if
VCC = 5V.
22 CPB A capacitor at this pin sets the compensation for the pre-bias control. Connect a capacitor between this pin and
VCC3 if pre-bias control is used. Can leave floating if not using pre-bias.
23 STSET Loss of signal threshold setting input. Connect a resistor between this pin and VCC3 to set loss of signal threshold.
24 VCC3R Internally regulated voltage for limiting amplifier circuitry in 5V applications. Connect directly to supply to allow
wider power supply tolerance in 3.3V-only applications (internal regulator not in use). Do not connect to power
supply if VCC = 5V.
25 RxINp Non-inverting limiting amplifier data input. Internally terminated with 2 k to self-bias voltage of approximately
VCC3R - 0.5V.
26 RxINm Inverting limiting amplifier data input. Internally terminated with 2 k to self-bias voltage of approximately
VCC3R - 0.5V.
27 Config1
Configuration logic input. These pins select LED driver and limiting amplifier configurations and test modes. Refer
to Configuration Logic table (Table 1-9) for more information. Three level logic where nominal level is mid-range
(VCC3T / 2) when floating.
28 Config2
29 Config3
30 Config4
31 LOS-ST Limiting amplifier LOS or ST (signal detect) output (M02097-11 PECL, M02097-21 CMOS). Configuration logic
selects whether output is to be LOS or ST. 5V compatible when using a 5V supply.
32 IREF Internal reference current. Must be connected to ground through a 12.4 k 1% resistor.
Table 2-1. M02097 Pad / Pin Descriptions (2 of 2)
QFN Pin
Number Pin Name Function
Pin Definitions
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Figure 2-1. M02097 Package Pin-out (5x5mm MLF)
GND
RxINp
RxINm
Config1
Config2
Config3
Config4
LOS-ST
I
REF
C
PB
V
CC
3T
PB
SET
NC
NC
MOD
SE T
DIS
FAIL
RxOUTm
RxOUTp
V
CC
R
V
CC
T
TC
SLOPE
TC
START
DINp
DINm
V
CC
3R
ST
SET
SV
CC
OUTN
GNDO
PB
OUT
NC
1
2
3
4
5
7
6
8
12
1110
916151413
20
19
18
17
24
23
22
21
28 27 26 2532 31 30 29
OUTP
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3.0 Functional Description
3.1 Overview
The M02097 device is a highly integrated combined LED driver and limiting amplifier intended for applications to
500 Mbps. The part can be operated from a single 3.3V or 5V supply.
Many features are user-adjustable, including the pre-bias current, modulation current, temperature compensation
control of modulation current, loss of signal threshold, using jam or not on the Rx path and the Rx and Tx polarity.
Safety circuitry is also included to provide a latched shut-down of LED bias and modulation current if a fault
condition occurs. An internal VCC switch provides redundant shutdown of the LED current under a fault condition.
Figure 3-1. M02097 Block Diagram
V
CC
3T
SV
CC
OUT+
OUT-
GND
0
PB
OUT
Input
Buffer
D
IN
-
D
IN
+
TX
Disable
FAIL
DIS
RESET
V
CC
T
GND
3.3V Regulator
with Bypass
To Safety
Logic
To Safety
Logic
V
CC
V
CC3
Laser
Driver
MODSET
PBSET
LED Pre-Bias Control
Threshold
Setting
Circuit
Biasing
RxOUTp
RxOUTm
RSSI
LOS-ST
RxINm
Iref
RxINp
V
CC
RSTSET
Offset Cancel
DCR_Disable
Limiting
Amplifier
SCB
Safety
Circuitry with
Latched Fault
Output
Buffer
Tx_Polarity
Rx_Polarity
CONFIG_2
Tx_Polarity
Rx_Polarity
CONFIG_3
CONFIG_1
DCR_Disable
C
PB
TC
SLOPE
TC
START
LOS-to-JAM
CONFIG_4
LOS-to-JAM
LOS-ST_sel
LOS-ST_sel
LOS
Level
Detect
Comparator
V
CC
3R
Configuration
Logic
Modulation
Control
Vttx
4k
4k
Vttr
2k
2k
Output
Buffer
Regulator
with Bypass
CMOS/TTL
(- 21 )
PECL ( - 11 )
PECL
Functional Description
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3.2 Internal Regulator
When operating from a 5V supply (VCC connected to +5V), an internal regulator provides a voltage of
approximately 3.3V to the majority of the on-chip circuitry. The on-chip regulator is internally compensated,
requiring no external components. When a 3.3V supply is used (VCC connected to 3.3V, or both VCC and VCC3
connected to 3.3V), internal logic configures the device for 3.3V operation and the regulator is switched to a low-
resistance mode. The device decides whether or not the internal regulator is enabled using internal sensing logic,
the sensing logic also determines whether the device safety circuitry needs to monitor for proper +5V supply
voltage.
3.3 Driver Inputs
The inputs to the data buffer are self-biased through resistors to an internal reference of approximately VCC - 1.3V.
Both CML and PECL input signals can be AC coupled to the M02097. AC coupling is recommended when using
the internal regulator (VCC = 5V), though external level-shifting may be used if DC coupling is desired with 5V
supply.
3.4 Driver Output Stage
The output stage incorporates feedback to maintain performance over the range of LED modulation current. The
output stage is nominally configured to drive an output load of ~5 with shunt RC compensation for LEDs. OUTP
should be connected directly to the LED cathode. This will result in the optimum pulse response while allowing the
maximum modulation current to be achieved when the output is DC coupled to the load. The LED driver output
stage is separately grounded from the rest of the circuitry (through GNDO) for optimum performance and control of
output characteristics.
The output can also be AC coupled to the LED. LED modulation current is controlled by adjusting current at
MODSET
. The modulation current can be temperature compensated by setting slope through the TCSLOPE pin and
TCSTART sets the temperature at which the temperature compensation begins to operate.
3.5 Safety Circuitry
Comparators at PBSET
, MODSET
, PBOUT OUTP, and CPB will assert the FAIL output, indicating that a fault condition
has occurred. This condition is latched and requires DIS to be toggled or power cycling before reset occurs. SVCC
is opened during a fault or disable condition.
By setting DIS high, the bias and modulation output currents are disabled. DIS will disable LED bias and
modulation current if left floating. DIS must be forced to a low state to enable the outputs. When safety circuit
bypass (SCB) mode is enabled, FAIL will indicate a fault condition, but the outputs will not be disabled under a fault
condition. Only the DIS pin will shutdown the outputs when in SCB mode.
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Preliminary Information
4.0 Package Specification
Figure 4-1. QFN32 Package Information
Note: View is for a 28 pin package. All dimensions in the
tables apply for the 32 pin package
3.30
3.30
3.45
3.45
3.15
3.15
0.70
0.90
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