ee FAIRCHILD ee SEMICONDUCTOR m www. fairchildsemi.com R296XX/R297XX Standard PROMs and Power-Switched SPROMs Features Devices are available in military (-55C to +125C) temperature range Standard PROMs are offered in power-switched SPROM versions Typically, 75% power savings achieved by deselected SPROMs Reliable nichrome fuses Three-state outputs Devices programmed on standard PROM programmers High immunity or resistance to space levels of radiation Device pinouts comply with JEDEC standards e Available in surface mount and through-hole packaging PROMs and SPROMs are offered in 24-pin, 0.3" wide DIPs Applications Microprogram control store Microprocessor program store Programmable logic Custom look-up tables Security encoding/decoding Code converter Character generator Use in redundant systems Description Fairchild Semiconductor Electronics Semiconductor Divi- sions Bipolar Field Programmable Read-Only Memories include both standard and power-switched versions. CS/PS inputs provide logic flexibility and ease of memory expan- sion decoding. SPROM power-switch circuitry is activated by the PS input. Fairchild Semiconductor PROMs and SPROMs are manu- factured with nichrome fuses and low power Schottky tech- nology. The devices are shipped with all bits in the HIGH (logical ONE) state. To achieve a LOW state in a given bit location the nichrome link is fused open by passing a short, high current pulse through the link. All devices are pro- grammed using the same programming technique. Standard PROMs are enabled by a single active LOW CS or by both active LOW CS and HIGH CS inputs. Power- switched PROMs (SPROMs) are enabled by a single active LOW PS or by both active LOW PS and HIGH PS inputs. See the individual block diagrams for the enable scheme. Rev. 1.0.1R296XX/R297XX PRODUCT SPECIFICATION Absolute Maximum Ratings (above which the useful life may be impaired) Supply Voltage to Ground Potential (continuous), Vec 0.5V to +7.0V DC Input Current -30 mA to +5.0 mA DC Input Voltage (address inputs) 0.5V to +5.5V DC Input Voltage (chip/power select input pin) R296XX 0.5V to +33V R297XX 0.5V to +28V DC Voltage Applied to Outputs (except during programming) 0.5V to +Vec max. Output Current into Outputs During Programming 240 mA DC Voltage Applied to Outputs During Programming R296XX 26V R297XX 24v Junction Temperature +175C Storage Temperature 65C to +150C Programming Temperature 25 +5C Lead Temperature (soldering, 10 seconds) 300C Current Density (metallization) <5 x 10A/em? Thermal Resistance, Junction-to-Case 0 jc Dual-In-Line s11C/W Leadless Chip Carrier =<10C/W Flat Pack =10C/W Operating Conditions Military Parameter | Description Min. Max. Unit Vec Supply Voltage 4.5 5.5 Vv To Case Operating Temperature 55 +125 C Vii? DC Low Level Input Voltage 0.8 Vv Vin! DC High Level Input Voltage 2.0 Vv ViL AC/Functional Low Level Input Voltage 0 Vv Vin AC/Functional High Level Input Voltage 3.0 Vv Note: 1. Tests shall be conducted at input test conditions as follows: Vjy = Viy(min) +20%, O%; Vi, = Vy (max) +0%, 50%. Devices may be tested using any input voltage within this input voltage range but shall be guaranteed to Vj4(min) and Vy (max). CAUTION: To avoid test correlation problems, the test system noise (e.g., testers, handlers, etc.) should be verified to assure that Vj4(min) and Vj (max) requirements are not violated at the device terminals. 2. Vi_ =0.6V for Chip Select Pins on all 29600 series devices.PRODUCT SPECIFICATION R296XX/R297XX Electrical Characteristics (Over Operating Range) Devices conform to MIL-STD-883, Group A, Subgroups 1, 2 and 3. Parameter Description Conditions Min. Max. Units Vou Output High Voltage | Veco = Min, Ioy = -1.6 mA 2.4 Vv Vin = Vin OF Vit VoL Output Low Voltage Voc = Min, lop = 8 mA 0.4 Vv Vin = Vin or Vit lo. = 16 mA 0.5 lit Input Low Current Voc = Max, Vin =0.4V | R296XX -250 pA R297XX -100 ra Input High Current Voc = Max, Vin = 2.7V 10 vA Voc = Max, Vin = 5.5V 40 log Output Short Circuit | Veg = Max, Vout = 0.2V? 15 -85 mA Current Vic Input Clamp Voltage | Veco = Min, ly = -18 MA -1.2 Vv IcEx Output Leakage Voc = Max, Vout = 5.5V +40 pA Current Chip Disabled Vout = 0.4V -40 Notes: 1. This characteristic cannot be tested prior to programming; it is guaranteed by factory testing. 2. Not more than one output should be shorted at a time. Duration of the short circuit should not exceed 1 second. 3. Voyt = 0.0V for R29791/R29793. Pin Definitions Symbol Description AgAn Address Inputs cs Chip Select Active Low (PROM) cS Chip Select Active High (PROM) PS Chip Select Active Low (SPROM) PS Chip Select Active High (SPROM) O;O, Data OutputsR296XX/R297XX PRODUCT SPECIFICATION 512 x 8 PROMR29621/R29621A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29621AM | R29621M | Units loc Power Supply Current Voc = Max 155 155 mA All Inputs GND trae Address Access Time C, = 30 pF! 75 95 ns tea Enable Access Time R1 = 3002 to Veco 50 50 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 40 40 ns Pp Power Dissipation 853 853 mw Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating Temperature Ap 4 Part Type Package Range A 4 bored 64x64 R29621DM D -55C to +125C A, 17| Decoder memory R29621DM/883B D -55C to+125C Ay 8 3 9 R29621DMS D -55C to +125C R29621 ADM D -55C to +125C 3 Ag _ 1 of 8 R29621 ADM/883B D -55C to +125C Ag _4J Multiplexers R29621ADMS D -55C to +125C 4 (8) Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 20 Lead Ceramic DIP aS 15 > Output Drivers (8) Pin Assignments ; t ; MHI 66066660 Voc Ag Circ 20 Lead Ceramic DIP Az Cr Ag pas As pas Og O7 pas Og Os Po) 20 19 18 17 4 LJ 16 14 5 6 7 13 8 12 11 9 10 Co Ae Ag a a a Ag Oz Co Oz LJ UJ QO, Gnd Pin 15 is also the programming pin (pp)PRODUCT SPECIFICATION R296XX/R297XX 512 x 8 SPROMR29623/R29623A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29623AM | R29623M | Units loeb Power Down, Supply Voc = Max 45 45 mA Current (disabled) PS = Vjy, All other inputs = GND loc Supply Current Voc = Max 155 155 mA (enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 75 100 ns tea Enable Access Time R1 = 3002 to Veco 80 100 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 40 40 ns Pp Power Dissipation 248 248 mw (Disabled) Pp Power Dissipation 853 853 mw (Enabled) Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating Temperature no s Part Type Package Range A is tof64 KN re x oy R29623DM D -55C to +125C Ae ray monn V/] Matrx R29623DM/883B D -55C to +125C A, 19 R29623DMS D -55C to +125C R29623ADM D -55C to +125C Ap tots R29623ADM/883B D -55C to +125C n we R29623ADMS D -55C to +125C Notes: Jt /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing Output D = 20 Lead Ceramic DIP PS {> Drivers (8) . . 6 7 8 911121314 Pin Assignments PPT TT TTI 66660600 Voc As circ 20 Lead Ceramic DIP Az ae As As PS mr Og J O7 pues Os 1 20 19 18 17 16 14 13 2. 3 4 5 6 7 8 11 9 10 LJ Ud Ay Ao a a a Log CI Ao Ag Ag O1 On Og _ | QO, Gnd Pin 15 is also the programming pin (pp)R296XX/R297XX PRODUCT SPECIFICATION 1024 x 8 PROMR29631/R29631A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29631AM | R29631M | Units loc Power Supply Current Voc = Max 170 170 mA All Inputs GND trae Address Access Time C, = 30 pF! 75 105 ns tea Enable Access Time R1 = 3002 to Veco 50 50 ns ter Enable Recovery Time R2 = 600Q to GND, 16 mA Load 40 40 ns Pp Power Dissipation 935 935 mw Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating Temperature Part Type Package Range R29631DM D -55C to +125C R29631DM/883B D -55C to +125C R29631DMS D -55C to +125C R29631FM F -55C to +125C R29631FM/883B F -55C to +125C R29631FMS F -55C to +125C R29631 ADM D -55C to +125C R29631ADM/883B D -55C to +125C R29631AFMS D -55C to +125C R29631 ADM F -55C to +125C R29631 AFM/883B F -55C to +125C R29631AFMS F -55C to +125C Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width F = 24 Lead CERPACK Pin Assignments 24 Lead Ceramic DIP/24 Lead CERPACK Voc Ag Ag CS; CS2CS3CS,4 Og O7 CoC oP) od dd) Os Os Ou CoC 1 of 64 Decoder 64 x 128 Memory Matrix 1 of 16 Multiplexers (8) Output Drivers (8) rN oO t+ 1 OM 0 O0000000 24 23 22 21 1 2 3 4 20 19 18 17 16 5 6 7 8 9 15 14 13 10 11 #12 LIbCIboI eI bbe be bLI CI Ag Ag Az Ay Ag O01 A; Ag As Pin 20 is also the programming pin (pp) a a a Os Oz GndPRODUCT SPECIFICATION R296XX/R297XX 1024 x 8 SPROMR29633/R29633A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29633AM | R29633M | Units loeb Power Down, Supply Voc = Max, PS = Vin, 45 45 mA Current (disabled) All other inputs = GND loc Supply Current Voc = Max 170 170 mA (Enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 85 105 ns tea Enable Access Time R1 = 3002 to Veco 85 130 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 40 40 ns Pp Power Dissipation 248 248 mw (Disabled) Pp Power Dissipation 935 935 mw (Enabled) Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Pin Assignments D = 24 Lead Ceramic DIP .600" Body Width F = 24 Lead CERPACK Operating Temperature 24 Lead Ceramic DIP/24 Lead CERPACK Part Type Package Range oe R29633DM D 55C to +125C 24 23 22 21 20 19 18 17 16 15 14 13 R29633DM/883B D -55C to +125C 12 3 45678 9 0 41 12 R29633DMS D -55C to +125C en on R29633FM F -55C to +125C Pin 20 is also the programming pin (pp) R29633FM/883B F -55C to +125C R29633FMS F -55C to +125C Block Diagram R29633ADM D -55C to +125C 4 R29633ADM/883B D -55C to +125C nN 64 x 128 R29633ADMS D 55C to +125C Nil Decoder Memory R29633AFM F -55C to +125C x R29633AFM/883B F -55C to +125C R29633AFMS F -55C to +125C 3 Notes: x Multiplexers /883B suffix denotes MIL-STD-883, Level B processing Ao (8) S suffix denotes Level S processing As 72 Output PS2 i PS, Drivers (8) PS4 NO st 1 Oo MN 0 O0000000R296XX/R297XX PRODUCT SPECIFICATION 2048 x 4 PROMR29651/R29651A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29651AM | R29651M | Units loc Power Supply Current Voc = Max 170 170 mA All Inputs GND trae Address Access Time C, = 30 pF! 85 105 ns tea Enable Access Time R1 = 3002 to Veco 50 55 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 45 45 ns Pp Power Dissipation 935 935 mw Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating Temperature As 2 Part Type Package Range ne 64 x 128 7 Memory R29651DM D -55C to +125C ne Matrix R29651DM/883B D -55C to +125C Ay R29651DMS D -55C to +125C R29651ADM D -55C to +125C or 32 R29651 ADM/883B D -55C to +125C ne Muttiploxers R29651ADMS D -55C to +125C Avo Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing O D = 18 Lead Ceramic DIP oS Drivers (4) Pin Assignments 18 Lead Ceramic DIP Voc Ay Ag Ag ; Oo Os Oy CS Co Ce a) 18 17 16 15 14 13 12 11 10 1 2 3 4 5 6 7 8 9 TOT ooo oo oo Ag As Ag A3 Ao Ay Ao Aio Gnd Pin 10 is also the programming pin (pp) 6006PRODUCT SPECIFICATION R296XX/R297XX 2048 x 4 SPROMR29653/R29653A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29653AM | R29653M | Units loeb Power Down, Supply Voc = Max, PS = Vip, 45 45 mA Current (disabled) All other inputs = GND loc Supply Current Voc = Max 170 170 mA (Enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 90 105 ns tea Enable Access Time R1 = 3002 to Veco 95 110 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 45 45 ns Pp Power Dissipation 248 248 mw (Disabled) Pp Power Dissipation 935 935 mw (Enabled) Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating Temperature ne Part Type Package Range A; R29653DM D -55C to +125C x R29653DM/883B D -55C to +125C Aa R29653DMS D -55C to +125C R29653ADM D -55C to +125C ne R29653ADM/883B D -55C to +125C ne R29653ADMS D -55C to +125C Ato Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 18 Lead Ceramic DIP Pin Assignments 2 18 Lead Ceramic DIP Voc Az Ag Ag O; Oc fe Oe ee OQ; O, PS Co Ed a) 18 17 16 15 14 13 2. 3 4 5 6 12 11 10 7 8 9 bLIbCIboI bebe LI Ag As Ag Ag Ag Aj a a a Ao Aio Gnd Pin 10 is also the programming pin (pp) - N (4 Oo 0 0 64 x 128 Memory Matrix 1 of 32 Multiplexers 4 Output Drivers (4) x OoR296XX/R297XX PRODUCT SPECIFICATION 2048 x 8 PROMR29681/R29681A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29681AM | R29681M | Units loc Power Supply Current Voc = Max 180 180 mA All Inputs GND trae Address Access Time C, = 30 pF! 85 120 ns tea Enable Access Time R1 = 3002 to Veco 50 55 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 35 45 ns Pp Power Dissipation 990 990 mw Notes: Pin Assignments 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being 28 Terminal Leadless Chip Carrier programmed. As Ag Az NC Voc Ag Ag 3. TeRis guaranteed by design but not performed. PTAA Ag 5 25 Ais i i Ag 6 24 CS Ordering Information AF 33 CS, 7 Ay 8 22 CS; Operating Ao 9 21 NC Part Type Package | Temperature Range n , 9 9 R29681DM D -55C to +125C , R29681DM/883B D -55C to +125C 1219 1415161718 Op O3 Gnd NC Oy O5 Og R29681DMS D -55C to +125C Pin 24 is also the programming pin (pp) R29681LM L -55C to +125C 24 Lead Ceramic DIP/24 Lead Sidebrazed R29681LM/883B L -55C to +125C Voc As Ag Aig GS; CS2CS3 Og O7 Og O5 Oy R29681LMS L -55C to +125C 24 23 22 21 20 19 18 17 16 15 14 13 R29681SM S -55C to +125C R29681SM/883B s -55C to +125C eee Be A; As As Ag Ag Ap Ay Ap O14 Op Og Gnd R29681SMS Ss -55C to +125C Pin 20 is also the programming pin (pp) R29681 ADM D -55C to +125C R29681 ADM/883B D -55C to +125C Block Diagram R29681ADMS D -55C to +125C A,4 R29681 ALM L -55C to +125C As 128 x 128 Ag 1 of 128 Memory R29681 ALM/883B L -55C to +125C Az Decoder Matrix A R29681 ALMS L -55C to +125C As R29681 ASM S -55C to +125C Ato R29681 ASM/883B S -55C to +125C Ao 1 of 16 Ay Multiplexers R29681ASMS S -55C to +125C ne (8) 3 Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width L = 28 Terminal Leadless Chip Carrier S = 24 Lead Sidebrazed .300" Body Width Contact factory regarding flat pack package Output Drivers (8) TNO st 1 oO OM 0 O0000000 10PRODUCT SPECIFICATION R296XX/R297XX 2048 x 8 SPROMR29683/R29683A Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions 29683AM | R29683M | Units loeb Power Down, Supply Voc = Max, PS = Vin, 50 50 mA Current (Disabled) All other inputs = GND loc Supply Current Voc = Max 180 180 mA (Enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 85 120 ns tea Enable Access Time R1 = 3002 to Veco 100 125 ns ter Enable Recovery Time R2 = 600Q to GND, 16 mA Load 45 50 ns Pp Power Dissipation 275 275 mw (Disabled) Pp Power Dissipation 990 990 mw (Enabled) Notes: Pin Assignments 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Operating Part Type Package | Temperature Range R29683DM D -55C to +125C R29683DM/883B D -55C to +125C R29683DMS D -55C to +125C R29683LM L -55C to +125C R29683LM/883B L -55C to +125C R29683LMS L -55C to +125C R29683SM S$ -55C to +125C R29683SM/883B S$ -55C to +125C R29683SMS S$ -55C to +125C R29683ADM D -55C to +125C R29683ADM/883B D -55C to +125C R29683ADMS D -55C to +125C R29683ALM L -55C to +125C R29683ALM/883B L -55C to +125C R29683ALMS L -55C to +125C R29683ASM S$ -55C to +125C R29683ASM/883B S$ -55C to +125C R29683ASMS S) -55C to +125C Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width L = 28 Terminal Leadless Chip Carrier S = 24 Lead Sidebrazed .300" Body Width Contact factory regarding flat pack package 28 Terminal Leadless Chip Carrier As Ag Az NC Vgc AgAg 4 3 2 1 282726 Ay 5 25 As Ag 6 24 PS, An 7 23 PS, Ay 8 22 PSs Ay 9 21 NC NC 10 20 Og O; 11 19 O; 1213 1415161718 OQ, Og Gnd NC Oy O5 Og Pin 24 is also the programming pin (pp) 24 Lead Ceramic DIP/24 Lead Sidebrazed Voc As Ag Ato PS; PS2PS3 Og O7 Os Os ie lee elle mefeedia malo 24 23 22 21 20 19 18 17 16 15 14 13 1.82. 3 4 5 6 7 8 9 1011 12 Lg gS gg a Az Ag As Aq Ag Ap Ay Ap O; Op Og Gnd Pin 20 is also the programming pin (pp) Block Diagram 4 Aa As 128 x 128 As 1 of 128 Memory Az Decoder Matrix As Ag Ato 8 Ag 1 of 16 Ay Multiplexers Ag (8) Output Drivers (8) - NO Tt 1 oO FE oO OO0000000 11R296XX/R297XX PRODUCT SPECIFICATION 4096 x 8 PROMR29/771 Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions R29771M Units loc Power Supply Current Voc = Max 190 mA All Inputs GND tan Address Access Time C, = 30 pF! 85 ns tea Enable Access Time R1 = 3002 to Veco 50 ns ter Enable Recovery Time R2 = 600Q to GND, 16 mA Load 35 ns Pp Power Dissipation 1.05 mw Notes: Pin Assignments 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on aminimum of 50% of the array being 28 Terminal Leadless Chip Carrier As Ag Az NC Yop AgAg programmed. 4.3 2 1 282726 3. TeRis guaranteed by design but not performed. Ag 5 25 Ais . . As 6 24 CS Ordering Information A 7 23 Ay Ay 8 22 CS. Operating ee = Part Type Package | Temperature Range 0, 44 t9 O, R29771DM D -55C to +125C 12131415 161718 R29771DM/883B D -55C to +125C Op 03 Gnd NC O4 O5 Og R29771DMS D -55C to +125C Pin 24 is also the programming pin (pp) R29771FM F 55C to +125C 24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/24 Lead Sidebrazed R29771FM/883B F -55C to +125C Voc As Ag Ato CS; Aii CS2 Og O7 Og Os Og Co 1 dd od od od) R29771FMS F -55C to +125C 24 23 22 21 20 19 18 17 16 15 14 13 R29771LM L -55C to +125C 1 2 3 4 5 6 7 8 9 1011 12 -55 2 oo oo oor or oo ooo et R29771LM/883B L 55C to +125C hy Ae As Aa Bo Ap Ay Ay Oy Op Oy Gnd R29771LMS L -55C to +125C Pin 20 is also the programming pin (pp) R29771SM S -55C to +125C . R29771SM/883B S -55C to +125C Block Diagram R29771SMS iS -55C to +125C As : A Notes: AH 101122, N Memory i i 23] Decoder i / at /883B suffix denotes MIL-STD-883, Level B processing Ag 59 Matrix S suffix denotes Level S processing is 21 D = 24 Lead Ceramic DIP .600" Body Width Ay _19| F = 24 Lead Leadless Chip Carrier Ag 8 L = 28 Terminal Leadless Chip Carrier Ai Z 1 of 32 S = 24 Lead Sidebrazed .300" Body Width ne 5} MUMeayters As 4 cs, __ 204 Output CS, 18 Drivers (8) 9101113141516 17 MPT TE TT] 60060000 12PRODUCT SPECIFICATION R296XX/R297XX 4096 x 8 SPROMR29773 Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions R29773M Units loeb Power Down, Supply Voc = Max, PS = Vin, 55 mA Current (disabled) All other inputs = GND loc Supply Current Voc = Max 190 mA (Enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 85 ns tea Enable Access Time R1 = 3002 to Veco 135 ns ter Enable Recovery Time R2 = 600 to GND, 16 mA Load 35 ns Pp Power Dissipation 303 mw (Disabled) Pp Power Dissipation 1.05 WwW (Enabled) Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Operating Part Type Package | Temperature Range R29773DM D -55C to +125C R29773DM/883B D -55C to +125C R29773DMS D -55C to +125C R29773FM F -55C to +125C R29773FM/883B F -55C to +125C R29773FMS F -55C to +125C R29773LM L -55C to +125C R29773LM/883B L -55C to +125C R29773LMS L -55C to +125C R29773SM S$ -55C to +125C R29773SM/883B S$ -55C to +125C R29773SMS S$ -55C to +125C Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width F = 24 Lead Leaded Chip Carrier L = 28 Terminal Leadless Chip Carrier S = 24 Lead Sidebrazed .300" Body Width Pin Assignments 28 Terminal Leadless Chip Carrier As Ag Az NC Vog Ag Ag 4 3 2 1 282726 Ay, 5 25 Ais Ag 6 24 PS; Ao 7 23 An Ai 8 22 PSp Ay 9 21 NG NG 10 20 Og Oo, 11 19 O; 1213 1415 161718 Op Og Gnd NC Oy O5 Og Pin 24 is also the programming pin (pp) 24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/ 24 Lead Sidebrazed Voc As Ag Ato PSi Aii PS Og O7 Og Os Oy Daal eeeel melecleealoemelemalomemme femal 24 23 22 21 20 19 18 17 16 15 14 13 1 82 3 4 5 6 7 8 9 1011 12 ooo es oe ee Az Ag As Ag Ag Ap Ay Ap OQ; Op Og Gnd Pin 20 is also the programming pin (pp) Block Diagram 3 As A Ay 1 of 128 omonr As Decoder Matrix Ag Ato An Ao Ai 1 of 32 Ao Multiplexers As (8) pa Output PS Drivers (8) x NO xt 1 OO 0 O0000000 13R296XX/R297XX PRODUCT SPECIFICATION 8192 x 8 PROMR29791 Power and AC Characteristics Over Operating Range loc conforms to MIL-STD-883, Grou AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. p A, Subgroups 1, 2 and 3. Maximum Limits Parameter Description Test Conditions R29791M Units loc Power Supply Current Voc = Max, All Inputs GND 190 mA trae Address Access Time C, = 30 pF! 95 ns tea Enable Access Time R1 = 3002 to Veco 50 ns ter Enable Recovery Time R2 = 600Q to GND, 16 mA Load 30 ns Pp Power Dissipation 1.05 WwW Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 3. TeRis guaranteed by design but not Ordering Information 50% of the array being programmed. performed. Block Diagram Operating As Part Type Package | Temperature Range n R29791DM D -55C to +125C As R29791DM/883B D -55C to +125C AS R29791DMS D -55C to +125C ni R29791FM F -55C to +125C R29791FM/883B F -55C to +125C x R29791FMS F -55C to +125C n R29791SM S -55C to +125C Ag R29791SM/883B S -55C to +125C R29791SMS S -55C to +125C Notes: /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width F = 24 Lead Leaded Chip Carrier S = 24 Lead Sidebrazed .300" Body Width Pin Assignments 24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/ 24 Lead Sidebrazed Voc As Ag Aio CS Ait Ata Os De) OQ; Og Os Oy CUCL Cd 24 23 22 21 20 19 18 17 16 15 14 13 10 11 12 5 6 7 8 LIU UI ULI Ag As Ay Ag 1 2 3 a 4 LJ A; Ag As Aa Pin 20 is also the programming pin (pp) 9 | | oO}; a a a Os O3 Gnd 1 of 256 Decoder 256 x 256 Memory Matrix 1 of 32 Multiplexers (8) Output Drivers (8) - NO t+ oO Mm ~O O0O000000 14PRODUCT SPECIFICATION R296XX/R297XX 8192 x 8 SPROMR29793 Power and AC Characteristics Over Operating Range lec conforms to MIL-STD-883, Group A, Subgroups 1, 2 and 3. AC parameters conform to MIL-STD-883, Group A, Subgroups 9, 10 and 11. Maximum Limits Parameter Description Test Conditions R29793M Units loeb Power Down, Supply Voc = Max, PS = Vin, 50 mA Current (disabled) All other inputs = GND loc Supply Current Voc = Max 190 mA (Enabled) All Inputs = GND trae Address Access Time C, = 30 pF! 95 ns tea Enable Access Time R1 = 3002 to Voc 145 ns ter Enable Recovery Time R2 = 600Q to GND, 16 mA Load 30 ns Pp Power Dissipation (Disabled) 275 mw Pp Power Dissipation (Enabled) 1.05 W Notes: 1. See AC Test Load Circuit and Switching Waveforms. 2. Speeds are based on a minimum of 50% of the array being programmed. 3. TeRis guaranteed by design but not performed. Ordering Information Block Diagram Operating As 2 Part Type Package | Temperature Range As R29793DM D 55C to +125C N 23l Decoder a6 x 255 R29793DM/883B D -55C to +125C AS Matrix R29793DMS D -55C to +125C An R29793FM F -55C to +125C R29793FM/883B F -55C to +125C Ao R29793FMS F -55C to +125C ni Multiplexers R29793SM s 55C to 125C x R29793SM/883B S -55C to +125C R29793SMS S -55C to +125C Notes: _ Output PS Drivers (8) /883B suffix denotes MIL-STD-883, Level B processing S suffix denotes Level S processing D = 24 Lead Ceramic DIP .600" Body Width F = 24 Lead Leaded Chip Carrier S = 24 Lead Sidebrazed .300" Body Width Pin Assignments 24 Lead Ceramic DIP/24 Lead Leaded Chip Carrier/ 24 Lead Sidebrazed Voc As Ag Aio PS Ay Aiz Og Doe O7 Os O5 Oy Cod 24 23 22 21 20 19 18 17 16 15 14 13 9 10 11 #12 CCCI CI O; Os O3 Gnd Pin 20 is also the programming pin (pp) TNO st 1 oO OM 0 O0O000000 15R296XX/R297XX PRODUCT SPECIFICATION AC Test Load Circuit Voc O R1 3002 Output Notes: 1. tag is tested with switch S, closed and C, = 30 pF. I. I R2 6002 2. tea is tested with C, = 30 pF; S, is open for high impedance to 1 test and closed for high impedance to O test. 3. tgp, is tested with C, = 5 pF; S, is open for 1 to high impedance test and measured at Voy,-0.5V output level and is closed for O to high impedance test and measured at Vo, +0.5V output level. Switching Waveforms 3.0V 1.5V ov 3.0V 1.5V ov Vou 1.5V Voi Ao-An Cs-Ps 0,-0, Keys to Timing Diagram Waveforms | Inputs Outputs __ Must be Will be Steady Steady Dont Care. | Changing State YOOX Any Change | Unknown Permitted K Does Not Center Line is Apply High Impedance Off State 16PRODUCT SPECIFICATION R296XX/R297XX Dynamic Life Test/Burn-In Circuits In accordance with MIL-STD-883, Methods 1005/1015, Condition D: Ta = 1250 C minimum Vec = 5.25 +0.25V Square Wave Pulses on Fo to F, are: 50% +10% duty cycle Frequency of each address is to be 1/2 of each preceding input, with Fp beginning at 100 kHz (e.g., Fo = 100 kHz +10%, F, = 50 kHz +10%, F, = 25 kHz +10%, Fn = 1/2 Fn-1 #10%, etc.) Resistors are optional on input pins (R = 300 +10%) Dynamic Burn-in F]1 ~~ 2 Fs L2 23[-}- Fe Fs s 22 }- Fs F. ]4 21} Fro Fs ]s 20} Fis Fo {]6 19[ -- Fir F, -(]7 18[_} Fis Fo _(]8 17 9 16 VesB s Veco 10 15 11 14 r 12 13 = R29631/631A ~ R29633/633A R29681/681A R29683/683A R29771 R29773 R29791 R29793 Voc a Ves s Voc Ves = Voc Dynamic Burn-In Voc Fo Lli ~ 20 F, T]e 19[ -} Fg Fr WA-L]3 ig-}- F, Fs; ~WA-L_]4 17| }+ Fe Fy ~WA-L_]5 16 | PeW Fs 6 15, bP Fo 7 14 8 13 Vee = Voc 9 12 rt 10 11 1 R29621/621A - R29623/623A Dynamic Burn-in Voc Fo (t) ~ 18 Fs W-L_]2 7P}- Fr Fy WWA-L13 16] } Fe Fs; ~AA-L_]4 15|[-W- Fs Fo ~WA-L]5 14 Fy, -W/-[_]6 13 Vee s Voc Fo AA-L]7 12 Fip ~W-L]8 11 r 9 10 [YW Fis = R29651/651A R29653/653A 17R296XX/R297XX PRODUCT SPECIFICATION Static Life Test/Burn-In Circuits In accordance with MIL-STD-883, Methods 1005/1015, Condition C: Ta = 1250 C minimum Vec = 5.25 +0.25V Resistors are optional on input pins (R = 300Q +10%) Static Burn-In 1 ~ 2 23 22 21 20 19 18 17 9 16 10 15 11 14 Voc aN Oo fF WO DY 12 13 R29631/631A R29633/633A R29681/681A R29683/683A R29771 R29773 R29791 R29793 Static Burn-In Voc \/ 1s|_ + 171 bY 16, Ae 15, bY 140} 13. AA 12, bY 11 [-}WWe 10, PAW R29651/651A R29653/653A | EEEEEEEE Caontoaarkoan Static Burn-In Voc 20[]-+ 197 YAY 18, bh 17 [ }h@WW 16 PY 15 AWW 140 }~AWW 138 T]/YV- 127 YA ) Wen R29621/621A R29623/623A | EEEEEEE ES = OMOTORaAR ODM 18PRODUCT SPECIFICATION R296XX/R297XX Programming Characteristics TTL High Address x TTL Low ee 90% Tpp T Vv Vep 10%, re TTL Low 90% _*i*Te Vout , JR TTLLow 0% Toi 6.0V Voc \ 5.5V 4.2V TTL High __, TTL Low Check Ao Strobe R296XX Series R297XX Series Tr = 0.34V/uS Min. 1.25V/uS Max. Tr=0.34V/uS Min. 1.25V/uS Max. Tpp = 80 wS Min. 110 pS Max. Tpp = 70 wS Min. 120 pS Max. Tp=1 pS Min. 40 uS Max. Tp= 20 pS Min. 40 wS Max. Tp1 = 70 wS Min. 90 wS Max. Tp1 = 60 wS Min. 100 wS Max. Tpz = 100 nS Min. Tpz2= 100 nS Min. Vpp = 27V Min. 33V Max. Vpp = 26V Min. 28V Max. Vout = 20V Min. 26V Max. Vout = 22V Min. 24V Max. Notes: Output Load = 0.2 mA During 6.0V Check Output Load = 12 mA During 4.2V Check Programming Timing Device Programming Inputs If you would like to have Fairchild Semiconductor program your devices, please submit one of the following: Two masters and truth table Two masters and checksum In either case, we require customer approval prior to pro- gramming the devices. If you need blank devices in order to supply programming masters, please do not hesitate to contact Fairchild Semicon- ductor Electronics Semiconductor Division for unpro- grammed samples. Commercial Programmers (subject to change) Equipment must be calibrated at regular intervals. Each time a new board or a new programming module is inserted, the whole system should be checked. Both timing and voltages must meet published specifications for the device. Please contact the following manufacturers for equipment information: Data I/O Corp. 10525 Willows Road, N.E. P.O. Box 97046 Redmond, WA 98073-9746 (800) 247-5700 Stag Microsystems Inc. (R296XX Series) 1600 Wyatt Drive, Suite 3 Santa Clara, CA 95054 (408) 988-1118 Commercial Surface Mount Socket Adapter Manufacturer (subject to change) Please contact the following manufacturer for equipment information: Emulation Technology, Inc. 2344 Walsh Avenue, Bldg. F Santa Clara, CA 95051 (408) 982-0660 The companies listed above are not intended to be a complete guide of manufacturers of programmers or adapters, nor does Fairchild Semiconductor endorse any specific company. 19R296XX/R297XX PRODUCT SPECIFICATION Mechanical Dimensions 24 Lead CERPACK Inches Millimeters Symbol Notes Min. Max. Min. Max. A 045 .090 1.14 2.29 b1 015 .019 38 .48 4 cl 004 .006 10 15 4 D _ .640 _ 16.26 3 E 300 420 7.62 10.67 E1 _ .440 _ 11.18 3 e .050 BSC 1.27 BSC L .250 .370 6.35 9.40 Q 026 .045 .66 1.14 2 s1 005 _ 13 _ 5 Notes: 1. Index area: a notch or pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as a pin one identification mark. 2. Dimension Q shall be measured at the point of exit of the lead from the body. 3. This dimension allows for off-center lid, meniscus and glass overrun. 4. All leads - Increase maximum limit by .003 (.08mm) measured at the cenier of the flat, when lead finish is applied. 5. Dimension s1 may be .000 (.00mm) minimum if leads number 1, 12, 13 and 24 bend toward the cavity of the package within one lead's width from the point of entry of the lead into the body. 20PRODUCT SPECIFICATION R296XX/R297XX Mechanical Dimensions (continued) 24 Lead Leaded Chip Carrier Inches Millimeters Symbol Notes Min. Max. Min. Max. A .045 115 1.14 2.92 b1 -015 -019 .38 -48 4 ci -004 -006 10 15 4 D -640 16.26 2 E .350 -420 8.89 10.67 E1 _ -450 _ 11.43 2 E2 -180 _ 4.57 _ E3 .030 _ 76 _ e -050 BSC 1.27 BSC 3,5 L .250 .370 6.35 9.40 Q .026 .045 .66 1.14 si .000 _ .00 _ 6 Tod 2PL E3 + tb i Notes: 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification mark shall not be used as a pin one identification mark. Alternatively, a tab (dim. K) may be used to identify pin one. . This dimension allows for off-center lid, meniscus and glass overrun. . The basic pin spacing is .050 (1.27mm) between centerlines. Each pin centerline shall be located within +.005 (.13mm) of its exact longitudinal position relative to pins 1 and 24. . All leads - Increase maximum limit by .003 (0.08mm) measured at the center of the flat, when finish "A" is applied. . Twenty-two spaces. . Applies to all four corners (leads number 1, 12, 13, and 24). 21R296XX/R297XX PRODUCT SPECIFICATION Mechanical Dimensions (continued) 28 Terminal Leadless Chip Carrier Inches Millimeters Notes: Symbol - - Notes 1. The index feature for terminal 1 identification, optical orientation or Min. Max. Min. Max. handling purposes, shall be within the shaded index areas shown on A .060 100 1.52 2.54 3,6 planes 1 and 2. Plane 1, terminal 1 identification may be an extension At (050 088 1.27 2.24 3,6 of the length of the metalized terminal which shall not be wider than the B1 dimension. B1 .022 .028 56 71 2 B3 .006 022 15 56 2,5 2. Unless otherwise specified, a minimum clearance of .015 inch D/E 442 460 11.23 11.68 (0.38mm) shall be maintained between all metallized features (e.g., DI/E1 300 BSG 7.62 BSC lid, castellations, terminals, thermal pads, etc.). b2/E2 150 BSC 3.81 BSC 3. Dimension A controls the overall package thickness. The maximum D3/E3 = 460 = 11.68 A dimension is the package height before being solder dipped. e .050 BSG 1.27 BSG _ h 040 REF 1.02 REF 4 The corner shape (square, notch, radius, etc.) may vary at the j 020 REF 51 REF 4 manufacturer's option, from that shown on the drawing. The index corner shall be clearly unique. L1 045 055 1.14 1.40 L2 .075 095 1.91 2.41 5. Dimension B3 minimum and L3 minimum and the appropriately L3 003 015 08 38 5 derived castellation length define an unobstructed three dimensional ND/NE 7 7 7 space traversing all of the ceramic layers in which a castellation was designed. Dimensions B3 and L3 maximum define the maximum N 28 28 7 width and depth of the castellation at any point on its surface. Measurement of these dimensions may be made prior to solder dripping. 6. Chip carriers shall be constructed of a minimum of two ceramic layers. 7. Symbol N is the maximum number of terminals. Symbol ND and NE are the number of terminals along the sides of Length D and E respectively. PLANE 2 PLANE 1 y" Oo S IE DETAILA (h) X 45 3 PLCS ges oy fA h Bi L3 2 h- B3 DETAILA 22PRODUCT SPECIFICATION R296XX/R297XX Mechanical Dimensions (continued) 24 Lead Sidebrazed .300" Body Width Inches Millimeters Symbol Notes Min. Max. Min. Max. A _ .200 _ 5.08 b1 .014 .023 36 58 7 b2 .045 .065 1.14 1.65 2 cl .008 .015 .20 38 7 D _ 1.280 _ 32.51 .220 .310 5.59 7.87 e .100 BSG 2.54 BSC 4,8 eA .300 BSC 7.62 BSC 6 L 125 .200 3.18 5.08 Q .015 .060 38 1.52 3 $1 .005 _ 13 _ 5 $2 .005 _ 13 _ D Note 1 a a a a ee T E ee si] , S2 ry ae Ln? Notes: 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as pin one identification mark. 2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 12, 13, and 24 only. 3. Dimension "Q" shall be measured from the seating plane to the base plane. 4. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within +.010 (.25mm) of its exact longitudinal position relative to pins 1 and 24. 5. Applies to all four corners (leads number 1, 12, 13, and 24). "eA" shall be measured at the centerline of the leads. 7. All leads - Increase maximum limit by .003 (.08mm) measured at the center of the flat when lead finish is applied. 8. Twenty-two spaces. abe 23R296XX/R297XX PRODUCT SPECIFICATION Mechanical Dimensions (continued) 18 Lead Ceramic Dual Inline Package (CerDIP) Inches Millimeters Notes: Symbol Min Max Min Max Notes 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin - - one. The manufacturer's identification shall not be used as pin one identification mark. A -200 5.08 2. The minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 8, 9 b1 .014 .023 .36 58 8 and 18 only. b2 .045 .065 1.14 1.65 2,8 3. Dimension "Q" shall be measured from the seating plane to the base plane. cl .008 .015 .20 38 8 4. This dimension allows for off-center lid, meniscus and glass overrun. D _ -960 _ 24.38 4 5. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within +.010 (25mm) of its exact longitudinal position relative to E .220 310 5.59 7.87 4 pins 1 and 18. e 100 BSC 2.54 BSC 59 6. Applies to all four corner's (leads number 1, 8, 9, and 18). eA 300 BSC 7.62 BSC f 7. eA" shall be measured at the center of the lead bends or at the centerline of the leads L 125 .200 3.18 5.08 when "a" is 90. Q 015 070 38 1.78 3 8. All leads - Increase maximum limit by .003(.08mm) measured at the center of the flat, si 005 _ 13 _ 6 when lead finish is applied. a 90 105 90 105 9. Sixteen spaces. <_______ [) Note 1 ooo ooo oot cl 24PRODUCT SPECIFICATION R296XX/R297XX Mechanical Dimensions (continued) 20 Lead Ceramic Dual Inline Package (CerDIP) Inches Millimeters Symbol Notes Min. Max. Min. Max. A _ .200 _ 5.08 b1 014 .023 36 58 8 b2 .045 .065 1.14 1.65 2,8 cl .008 .015 .20 38 8 D _ 1.060 _ 25.92 4 E .220 .310 5.59 7.87 4 e -100 BSC 2.54 BSC. 5,9 eA -300 BSC 7.62 BSC. 7 L 125 .200 3.18 5.08 Q .015 .060 38 1.52 3 SI .005 _ 13 _ 6 a 90 105 90 105 Note 1 TE Tt Tt TP TP TP TP Te TP meant st tiit it Ct ii fi it ft ot fe Notes: 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as pin one identification mark. . The minimum limit for dimension "b2" may be .023(.58mm) for leads number 1, 10, 11 and 20 only. . Dimension "Q" shall be measured from the seating plane to the base plane. . This dimension allows for off-center lid, meniscus and glass overrun. . The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within +.010 (25mm) of its exact longitudinal position relative to pins 1 and 20. . Applies to all four corner's (leads number 1, 10, 11, and 20). . "eA" shall be measured at the center of the lead bends or at the centerline of the leads when "a" is 90. . All leads - Increase maximum limit by .003(.08mm) measured at the center of the flat, when lead finish is applied. . Eighteen spaces. 25R296XX/R297XX PRODUCT SPECIFICATION Mechanical Dimensions (continued) 24 Lead Ceramic Dual Inline Package (CerDIP) .600" Body Width Inches Millimeters Symbol Notes Min. Max. Min. Max. A _ 225 _ 5.72 b1 014 023 36 58 8 b2 .045 .065 1.14 1.65 2,8 cl .008 .015 .20 38 8 D _ 1.290 _ 32.77 4 .500 .610 12.70 15.49 4 e .100 BSC 2.54 BSC 5,9 eA .600 BSC 15.24 BSC 7 L 120 .200 3.05 5.08 Q .015 .075 38 1.91 3 s1 .005 _ 13 _ 6 a 90 105 90 105 D cere re re re re Pe ce Te Te E Ct of Ct fF ot Ch Ch Ch E &t ot ot si FE bale Notes: 1. Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as pin one identification mark. 2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 12, 13 and 24 only. 3. Dimension "Q shall be measured from the seating plane to the base plane. 4. This dimension allows for off-center lid, meniscus and glass overrun. 5. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within +.010 (.25mm) of its exact longitudinal position relative to pins 1 and 24. 6. Applies to all four corners (leads number 1, 12, 13, and 24). 7. "eA" shall be measured at the center of the lead bends or at the centerline of the leads when "a" is 90. 8. All leads Increase maximum limit by .003 (.08mm) measured at the cenier of the flat, when lead finish applied. 9. Twenty-two spaces. NOTE 1 26PRODUCT SPECIFICATION R296XX/R297XX Mechanical Dimensions (continued) 24 Lead Ceramic Dual Inline Package (CerDIP) .300" Body Width Inches Millimeters Notes: Symbol - - Notes 1. Index area: a notch or a pin one identification mark shall be located Min. Max. Min. Max. adjacent to pin one. The manufacturer's identification shall not be A _ .200 _ 5.08 used as pin one identification mark. b1 .014 023 36 58 8 2. The minimum limit for dimension "b2" may be .023 (.58mm) for leads b2 045 065 1.14 1.65 2,8 number 1, 12, 13 and 24 only. cl 008 015 20 38 8 3. Dimension "Q" shall be measured from the seating plane to the base D | 1280 | | 3251 4 plane. 220 310 5.59 787 4 4. This dimension allows for off-center lid, meniscus and glass overrun. 100 BSC 254BSC 59 5. The basic pin spacing is .100 (2.54mm) between centerlines. Each oA 300 BSC 7 62 BSC 7 pin centerline shall be located within +.010 (.25mm) of its exact 7 a 200 3 18 508 longitudinal position relative to pins 1 and 24. - - - - 6. Applies to all four corners (leads number 1, 12, 13, and 24). Q 015 .060 38 1.52 3 1 005 _ 13 _ 6 7. "eA" shall be measured at the center of the lead bends or at the S centerline of the leads when "a" is 90. 2 20 108 20 108 8. All leads Increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish applied. 9. Twenty-two spaces. D | Cee Pe oe oe oe Te Pe TP NOTE 1 mm dt Lt Lt LE LE Ct Lt Lt Lt t t Ct ole | (Ell - HH E TE b2 bt >|l- 27R296XX/R297XX PRODUCT SPECIFICATION LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www fairchildsemi.com 2. Accritical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 5/20/98 0.0m 001 Stock#DS3000296XX 1998 Fairchild Semiconductor Corporation