Preliminary Datasheet Specifications in this document are tentative and subject to change. RL78/L1C R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 RENESAS MCU Integrated LCD controller/driver, 12-bit resolution A/D Converter, USB 2.0 controller (function), True Low Power Platform (as low as 112.5 A/MHz, and 0.61 A for RTC + LVD), 1.6 V to 3.6 V operation, 256 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications 1. OUTLINE 1.1 Features Ultra-Low Power Technology * 1.6 V to 3.6 V operation from a single supply * Stop (RAM retained): 0.25 A <T.B.D.>, (LVD enabled): 0.33 A <T.B.D.> * Halt (RTC + LVD): 0.61 A <T.B.D.> * Supports snooze * Operating: 112.5 A/MHz <T.B.D.> 16-bit RL78 CPU Core * Delivers 33 DMIPS at maximum operating frequency of 24 MHz * Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles * CISC Architecture (Harvard) with 3-stage pipeline * Multiply Signed & Unsigned: 16 16 to 32-bit result in 1 clock cycle * MAC: 16 16 to 32-bit result in 2 clock cycles * 16-bit barrel shifter for shift & rotate in 1 clock cycle * 1-wire on-chip debug function Code Flash Memory * Density: 64 to 256 KB * Block size: 1 KB * On-chip single voltage flash memory with protection from block erase/writing * Self-programming with secure boot swap function and flash shield window function Data Flash Memory * Data Flash with background operation * Data flash size: 8 KB * Erase Cycles: 1 Million (typ.) * Erase/programming voltage: 1.8 V to 3.6 V RAM * 8 KB to 16 KB size options * Supports operands or instructions * Back-up retention in all modes High-speed On-chip Oscillator * 24 MHz with +/- 1% accuracy over voltage (1.8 V to 3.6 V) and temperature (-20C to +85C) * Pre-configured settings: 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 4 MHz, 1 MHz (TYP.) * 48 MHz for USB, 48 MHz for timer KB2 Reset and Supply Management * Power-on reset (POR) monitor/generator * Low voltage detection (LVD) with 12 setting options (Interrupt and/or reset function) LCD Controller/Driver * Up to 56 seg 4 com or 52 seg 8 com * Supports capacitor split method, internal voltage boost method and resistance division method * Supports waveform types A and B * Supports LCD contrast adjustment (18 steps) * Supports LCD blinking Data Transfer Controller (DTC) * 33 sources & 24 different settings * Transfer data: 8 bits/16 bits * Normal mode and repeat mode Event Link Controller (ELC) * Reduce interrupt intervention * Link 31 events to specified peripheral function Multiple Communication Interfaces * Up to 4 I2C master * Up to 1 I2C multi-master * Up to 4 CSI (7-, 8-bit) * Up to 4 UART (7-, 8-, 9-bit) * Up to 1 LIN Extended-Function Timers * Multi-function 16-bit timer TAU: Up to 8 channels (remote control output available) * Multi-function 16-bit timer KB2: 3 channels * High accuracy real-time clock (RTC): 1 channel (full calendar and alarm function with watch correction function) * 12-bit interval timer: 1 channel * 15 kHz watchdog timer: 1 channel (window function) Rich Analog * ADC: Up to 13 channels, 8/12-bit resolution, 3.375 s minimum conversion time * Supports 1.6 V * D/A converter: 2 channels, 8-bit resolution * 2 window comparators, with ELC connection * Internal voltage reference (1.45 V) * On-chip temperature sensor Safety Features (IEC or UL 60730 compliance) * Flash memory CRC calculation * RAM parity error check * RAM write protection * SFR write protection * Illegal memory access detection * Clock stop/ frequency detection * ADC self-test * I/O port read back function (echo) General Purpose I/O * High-current (up to 20 mA per pin) * Open-Drain, Internal Pull-up support Operating Ambient Temperature * Standard: -40C to +85C Package Type and Pin Count * 80-pin plastic LQFP (fine pitch)(12 12) * 100-pin plastic LQFP (fine pitch)(14 14) USB * Complying with USB 2.0 * Corresponding to full-speed transfer (12Mbps) and low-speed (1.5Mbps) * Complying with Battery Charging Specification Revision 1.2 * Supports USB function controller R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 1 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.OUTLINE ROM, RAM capacities Products with the USB RL78/L1C Flash ROM Data flash RAM 80 pins 100 pins 256 KB 8 KB 16 KB Note R5F110MJ R5F110PJ 192 KB 8 KB 16 KB Note R5F110MH R5F110PH 128 KB 8 KB 12 KB R5F110MG R5F110PG 96 KB 8 KB 10 KB R5F110MF R5F110PF 64 KB 8 KB 8 KB R5F110ME R5F110PE Data flash RAM Products without the USB RL78/L1C Flash ROM Note 80 pins 100 pins Note R5F111MJ R5F111PJ 256 KB 8 KB 16 KB 192 KB 8 KB 16 KB Note R5F111MH R5F111PH 128 KB 8 KB 12 KB R5F111MG R5F111PG 96 KB 8 KB 10 KB R5F111MF R5F111PF 64 KB 8 KB 8 KB R5F111ME R5F111PE This is about 15 KB when the self-programming function and data flash function are used. R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 2 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.2 1.OUTLINE Ordering Information Products with the USB Pin count 80 pins 100 pins Package 80-pin plastic LQFP Part Number R5F110MEAFB, R5F110MFAFB, R5F110MGAFB, R5F110MHAFB, R5F110MJAFB (fine pitch) (12 12) 100-pin plastic LQFP R5F110PEAFB, R5F110PFAFB, R5F110PGAFB, R5F110PHAFB, R5F110PJAFB (fine pitch) (14 14) Products without the USB Pin count 80 pins 100 pins Package 80-pin plastic LQFP Part Number R5F111MEAFB, R5F111MFAFB, R5F111MGAFB, R5F111MHAFB, R5F111MJAFB (fine pitch) (12 12) 100-pin plastic LQFP R5F111PEAFB, R5F111PFAFB, R5F111PGAFB, R5F111PHAFB, R5F111PJAFB (fine pitch) (14 14) Figure 1 - 1 Part Number, Memory Size, and Package of RL78/L1C Part No. R 5 F 1 1 0 P E A x x x F B Package type: FB: LQFP, 0.50 mm pitch ROM number (Omitted with blank products) Classification: A: Consumer applications, operating ambient temperature: -40C to +85C ROM capacity: E: 64 KB F: 96 KB G: 128 KB H: 192 KB J: 256 KB Pin count: M: 80-pin P: 100-pin RL78/L1C 110: Products with the USB 111: Products without the USB Memory type: F: Flash memory Renesas MCU Renesas semiconductor product R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 3 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.3 1.OUTLINE Pin Configuration (Top View) 1.3.1 80-pin products (with the USB) COM4/COMEXP/SEG0 COM5/SEG1 COM6/SEG2 COM7/SEG3 P50/SEG4/INTP6 P51/SEG5 P52/SEG6 P12/TxD2/SO20/SEG42 P00/SCK10/SCL10/SEG48 P01/SI10/RxD1/SDA10/SEG49 P02/SO10/TxD1/(PCLBUZ0)/SEG50 P03/TI00/TO00/INTP1/SEG51 P04/INTP2/SEG52 P05/TI02/TO02/SEG53 P06/INTP5/SEG54 P07/TI06/TO06/SEG55 COM0 COM1 COM2 COM3 * 80-pin plastic LQFP (fine pitch) (12 12) 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 P11/RxD2/SI20/SDA20/SEG41/VCOUT0 P10/INTP7/PCLBUZ0/SCK20/SCL20/SEG40 P27/TI05/TO05/(INTP5)/PCLBUZ1/SEG39 P26/SO00/TxD0/TOOLTxD/SEG38 P25/SI00/RxD0/TOOLRxD/SDA00/SEG37 P24/SCK00/SCL00/SEG36 P23/TI07/TO07/SEG35 P22/TI04/TO04/SEG34 P21/ANI21/SEG33 P20/ANI20/SEG32 P143/ANI19/SEG31 P142/ANI18/SEG30 P141/ANI17/SEG29 P140/ANI16/SEG28 UREGC UVBUS UDM UDP AVDD AVSS 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 P70/KR7/SEG12 P71/KR6/SEG13 P72/KR5/TKBO20/SEG14 P73/KR4/TKBO21/SEG15 P74/KR3/TKBO10/SEG16 P75/KR2/TKBO11/SEG17 P76/KR1/TKBO00/SEG18 P77/KR0/TKBO01/SEG19 P30/TI03/TO03/REMOOUT/SEG20 P31/INTP3/RTC1HZ/SEG21 P32/TI01/TO01/SEG22 P33/INTP4/SCK30/SCL30/SEG23 P34/SI30/RxD3/SDA30/SEG24 P35/SO30/TxD3/SEG25 P125/VL3/(TI06)/(TO06) VL4 VL2 VL1 P126/CAPL/(TI04)/(TO04) P127/CAPH/(TI03)/(TO03)/(REMOOUT) P152/ANI2 P151/ANI1/AVREFM P150/ANI0/AVREFP P130 P46/ANO1 P45/ANO0 P44/IVREF0 P43/(INTP7)/IVCMP0 P40/TOOL0/(TI00)/(TO00) RESET P124/XT2/EXCLKS P123/XT1 P137/INTP0 P122/X2/EXCLK P121/X1 REGC VSS0 VDD0 P60/SCLA0/(TI01)/(TO01) P61/SDAA0/(TI02)/(TO02) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Caution 1. Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 F). Caution 2. Connect the UREGC pin to VSS pin via a capacitor (0.33 F). Remark 1. For pin identification, see 1.4 Pin Identification. Remark 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 4 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.3.2 1.OUTLINE 80-pin products (without the USB) COM4/COMEXP/SEG0 COM5/SEG1 COM6/SEG2 COM7/SEG3 P50/SEG4/INTP6 P51/SEG5 P52/SEG6 P12/TxD2/SO20/SEG42 P00/SCK10/SCL10/SEG48 P01/SI10/RxD1/SDA10/SEG49 P02/SO10/TxD1/(PCLBUZ0)/SEG50 P03/TI00/TO00/INTP1/SEG51 P04/INTP2/SEG52 P05/TI02/TO02/SEG53 P06/INTP5/SEG54 P07/TI06/TO06/SEG55 COM0 COM1 COM2 COM3 * 80-pin plastic LQFP (fine pitch) (12 12) 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 P11/RxD2/SI20/SDA20/SEG41/VCOUT0 P10/INTP7/PCLBUZ0/SCK20/SCL20/SEG40 P27/TI05/TO05/(INTP5)/PCLBUZ1/SEG39 P26/SO00/TxD0/TOOLTxD/SEG38 P25/SI00/RxD0/TOOLRxD/SDA00/SEG37 P24/SCK00/SCL00/SEG36 P23/TI07/TO07/SEG35 P22/TI04/TO04/SEG34 P21/ANI21/SEG33 P20/ANI20/SEG32 P143/ANI19/SEG31 P142/ANI18/SEG30 P141/ANI17/SEG29 P140/ANI16/SEG28 P82 P83 P156/ANI6 P155/ANI5 AVDD AVSS 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 P70/KR7/SEG12 P71/KR6/SEG13 P72/KR5/TKBO20/SEG14 P73/KR4/TKBO21/SEG15 P74/KR3/TKBO10/SEG16 P75/KR2/TKBO11/SEG17 P76/KR1/TKBO00/SEG18 P77/KR0/TKBO01/SEG19 P30/TI03/TO03/REMOOUT/SEG20 P31/INTP3/RTC1HZ/SEG21 P32/TI01/TO01/SEG22 P33/INTP4/SCK30/SCL30/SEG23 P34/SI30/RxD3/SDA30/SEG24 P35/SO30/TxD3/SEG25 P125/VL3/(TI06)/(TO06) VL4 VL2 VL1 P126/CAPL/(TI04)/(TO04) P127/CAPH/(TI03)/(TO03)/(REMOOUT) P152/ANI2 P151/ANI1/AVREFM P150/ANI0/AVREFP P130 P46/ANO1 P45/ANO0 P44/IVREF0 P43/(INTP7)/IVCMP0 P40/TOOL0/(TI00)/(TO00) RESET P124/XT2/EXCLKS P123/XT1 P137/INTP0 P122/X2/EXCLK P121/X1 REGC VSS0 VDD0 P60/SCLA0/(TI01)/(TO01) P61/SDAA0/(TI02)/(TO02) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Caution Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 F). Remark 1. For pin identification, see 1.4 Pin Identification. Remark 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 5 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.3.3 1.OUTLINE 100-pin products (with the USB) P12/TxD2/SO20/SEG42/VCOUT1 P13/SEG43 P14/SEG44 P15/SEG45 P16/SEG46 P17/SEG47 P00/SCK10/SCL10/SEG48 P01/SI10/RxD1/SDA10/SEG49 P02/SO10/TxD1/(PCLBUZ0)/SEG50 P03/TI00/TO00/INTP1/SEG51 P04/INTP2/SEG52 P05/TI02/TO02/SEG53 P06/INTP5/SEG54 P07/TI06/TO06/SEG55 COM0 COM1 COM2 COM3 COM4/COMEXP/SEG0 COM5/SEG1 COM6/SEG2 COM7/SEG3 P50/SEG4/INTP6 P51/SEG5 P52/SEG6 * 100-pin plastic LQFP (fine pitch) (14 14) 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 P53/SEG7 P54/SEG8 P55/SEG9 P56/SEG10 P57/SEG11 P70/KR7/SEG12 P71/KR6/SEG13 P72/KR5/TKBO20/SEG14 P73/KR4/TKBO21/SEG15 P74/KR3/TKBO10/SEG16 P75/KR2/TKBO11/SEG17 P76/KR1/TKBO00/SEG18 P77/KR0/TKBO01/SEG19 P30/TI03/TO03/REMOOUT/SEG20 P31/INTP3/RTC1HZ/SEG21 P32/TI01/TO01/SEG22 P33/INTP4/SCK30/SCL30/SEG23 P34/SI30/RxD3/SDA30/SEG24 P35/SO30/TxD3/SEG25 P36/SEG26 P37/SEG27 P125/VL3/(TI06)/(TO06) VL4 VL2 VL1 P153/ANI3 P152/ANI2 P151/ANI1/AVREFM P150/ANI0/AVREFP P130 P46/ANO1 P45/ANO0 P44/(SCK10)/(SCL10)/IVREF0 P43/(INTP7)/(SI10)/(RxD1)/(SDA10)/IVCMP0 P42/TI05/TO05/(SO10)/(TxD1)/IVCMP1 P41/(TI07)/(TO07)/IVREF1 P40/TOOL0/(TI00)/(TO00) RESET P124/XT2/EXCLKS P123/XT1 P137/INTP0 P122/X2/EXCLK P121/X1 REGC VSS0 VDD0 P60/SCLA0/(TI01)/(TO01) P61/SDAA0/(TI02)/(TO02) P127/CAPH/(TI03)/(TO03)/(REMOOUT) P126/CAPL/(TI04)/(TO04) P11/RxD2/SI20/SDA20/SEG41/VCOUT0 P10/INTP7/PCLBUZ0/SCK20/SCL20/SEG40 P27/(TI05)/(TO05)/(INTP5)/PCLBUZ1/SEG39 P26/SO00/TxD0/TOOLTxD/SEG38 P25/SI00/RxD0/TOOLRxD/SDA00/SEG37 P24/SCK00/SCL00/SEG36 P23/TI07/TO07/SEG35 P22/TI04/TO04/SEG34 P21/ANI21/SEG33 P20/ANI20/SEG32 P143/ANI19/SEG31 P142/ANI18/SEG30 P141/ANI17/SEG29 P140/ANI16/SEG28 VDD1 VSS1 UREGC UVBUS UDM UDP P156/ANI6 P155/ANI5 AVDD AVSS P154/ANI4 Caution 1. Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 F). Caution 2. Connect the UREGC pin to VSS pin via a capacitor (0.33 F). Remark 1. For pin identification, see 1.4 Pin Identification. Remark 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 6 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.3.4 1.OUTLINE 100-pin products (without the USB) P12/TxD2/SO20/SEG42/VCOUT1 P13/SEG43 P14/SEG44 P15/SEG45 P16/SEG46 P17/SEG47 P00/SCK10/SCL10/SEG48 P01/SI10/RxD1/SDA10/SEG49 P02/SO10/TxD1/(PCLBUZ0)/SEG50 P03/TI00/TO00/INTP1/SEG51 P04/INTP2/SEG52 P05/TI02/TO02/SEG53 P06/INTP5/SEG54 P07/TI06/TO06/SEG55 COM0 COM1 COM2 COM3 COM4/COMEXP/SEG0 COM5/SEG1 COM6/SEG2 COM7/SEG3 P50/SEG4/INTP6 P51/SEG5 P52/SEG6 * 100-pin plastic LQFP (fine pitch) (14 14) 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 P53/SEG7 P54/SEG8 P55/SEG9 P56/SEG10 P57/SEG11 P70/KR7/SEG12 P71/KR6/SEG13 P72/KR5/TKBO20/SEG14 P73/KR4/TKBO21/SEG15 P74/KR3/TKBO10/SEG16 P75/KR2/TKBO11/SEG17 P76/KR1/TKBO00/SEG18 P77/KR0/TKBO01/SEG19 P30/TI03/TO03/REMOOUT/SEG20 P31/INTP3/RTC1HZ/SEG21 P32/TI01/TO01/SEG22 P33/INTP4/SCK30/SCL30/SEG23 P34/SI30/RxD3/SDA30/SEG24 P35/SO30/TxD3/SEG25 P36/SEG26 P37/SEG27 P125/VL3/(TI06)/(TO06) VL4 VL2 VL1 P153/ANI3 P152/ANI2 P151/ANI1/AVREFM P150/ANI0/AVREFP P130 P46/ANO1 P45/ANO0 P44/(SCK10)/(SCL10)/IVREF0 P43/(INTP7)/(SI10)/(RxD1)/(SDA10)/IVCMP0 P42/TI05/TO05/(SO10)/(TxD1)/IVCMP1 P41/(TI07)/(TO07)/IVREF1 P40/TOOL0/(TI00)/(TO00) RESET P124/XT2/EXCLKS P123/XT1 P137/INTP0 P122/X2/EXCLK P121/X1 REGC VSS0 VDD0 P60/SCLA0/(TI01)/(TO01) P61/SDAA0/(TI02)/(TO02) P127/CAPH/(TI03)/(TO03)/(REMOOUT) P126/CAPL/(TI04)/(TO04) P11/RxD2/SI20/SDA20/SEG41/VCOUT0 P10/INTP7/PCLBUZ0/SCK20/SCL20/SEG40 P27/(TI05)/(TO05)/(INTP5)/PCLBUZ1/SEG39 P26/SO00/TxD0/TOOLTxD/SEG38 P25/SI00/RxD0/TOOLRxD/SDA00/SEG37 P24/SCK00/SCL00/SEG36 P23/TI07/TO07/SEG35 P22/TI04/TO04/SEG34 P21/ANI21/SEG33 P20/ANI20/SEG32 P143/ANI19/SEG31 P142/ANI18/SEG30 P141/ANI17/SEG29 P140/ANI16/SEG28 VDD1 VSS1 P80 P81 P82 P83 P156/ANI6 P155/ANI5 AVDD AVSS P154/ANI4 Caution Connect the REGC pin to VSS pin via a capacitor (0.47 to 1 F). Remark 1. For pin identification, see 1.4 Pin Identification. Remark 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 7 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.4 1.OUTLINE Pin Identification ANI0 to ANI6, : Analog Input ANI16 to ANI21 SCL00, SCL10, SCL20, SCL30 : Serial Clock Output SDAA0, SDA00, SDA10, : Serial Data Input/Output ANO0, ANO1 : Analog Output SDA20, SDA30 AVDD : Analog Power Supply SEG0 to SEG55 : LCD Segment Output AVREFM : Analog Reference Voltage SI00, SI10, SI20, SI30 : Serial Data Input SO00, SO10, SO20, SO30 : Serial Data Output TI00 to TI07 : Timer Input TO00 to TO07 : Timer Output Minus AVREFP : Analog Reference Voltage Plus AVSS : Analog Ground TKBO00, TKBO01, TKBO10, CAPH, CAPL : Capacitor for LCD TKBO11, TKBO20, TKBO21 COM0 to COM7, : LCD Common Output COMEXP EXCLK : Data Input/Output for Tool : Data Input/Output for : External Clock Input (Main System Clock) EXCLKS TOOL0 TOOLRxD, TOOLTxD External Device UDM, UDP : USB Input/Output : External Clock Input UREGC : USB Regulator Capacitance (Subsystem Clock) UVBUS : USB Input/USB Power Supply INTP0 to INTP7 : External Interrupt Input TxD0 to TxD3 : Transmit Data IVCMP0, IVCMP1 : Comparator Input VCOUT0, VCOUT1 : Comparator Output IVREF0, IVREF1 : Comparator Reference Input VDD0, VDD1 : Power Supply KR0 to KR7 : Key Return VL1 to VL4 : LCD Power Supply P00 to P07 : Port 0 VSS0, VSS1 : Ground P10 to P17 : Port 1 X1, X2 : Crystal Oscillator XT1, XT2 : Crystal Oscillator P20 to P27 : Port 2 P30 to P37 : Port 3 P40 to P46 : Port 4 P50 to P57 : Port 5 P60 to P62 : Port 6 P70 to P77 : Port 7 P80 to P83 : Port 8 P121 to P127 : Port 12 P130, P137 : Port 13 P140 to P143 : Port 14 P150 to P156 : Port 15 PCLBUZ0, PCLBUZ1 : Programmable Clock Output/ (Main System Clock) (Subsystem Clock) Buzzer Output REGC : Regulator Capacitance REMOOUT : Remote Control Output RESET : Reset RTC1HZ : Real-time Clock Correction Clock (1 Hz) Output RxD0 to RxD3 : Receive Data SCK00, SCK10, : Serial Clock Input/Output SCK20, SCK30 SCLA0 : Serial Clock Input/Output R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 8 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.5 1.5.1 1.OUTLINE Block Diagram 80-pin products (with the USB) TIMER ARRAY UNIT0 (8 ch) TI00/TO00 ch 0 TI01/TO01 ch 1 TI02/TO02 ch 2 TI03/TO03 ch 3 TI04/TO04 ch 4 TI05/TO05 ch 5 TI06/TO06 ch 6 TI07/TO07 ch 7 ANI2 A/D CONVERTER REMOOUT REMOTE CARRIER TKBO00 TKBO01 TIMER KB2_0 TKBO10 TKBO11 TIMER KB2_1 TKBO20 TKBO21 TIMER KB2_2 WINDOW WATCHDOG TIMER LOW-SPEED ON-CHIP OSCILLATOR 8 P00 to P07 PORT 1 3 P10 to P12 PORT 2 8 P20 to P27 PORT 3 6 P30 to P35 PORT 4 5 P40, P43 to P46 PORT 5 3 P50 to P52 PORT 6 2 P60, P61 PORT 7 8 P70 to P77 AVREFP/ANI0 AVREFM/ANI1 RL78 CPU CORE CODE FLASH MEMORY MULTIPLIER & DIVIDER, MULITIPLYACCUMULATOR PORT 12 4 P140 to P143 PORT 15 3 P150 to P152 KEY RETURN 8 KR0 to KR7 AVDD, AVSS, TOOLRxD, VDD0 VSS0 TOOLTxD SYSTEM CONTROL SDAA0 SERIAL INTERFACE IICA0 IIC10 SERIAL ARRAY UNIT1 (4 ch) RxD2 TxD2 UART2 RxD3 TxD3 UART3 SCK20 SI20 SO20 SCK30 SI30 SO30 SCL20 SDA20 RESET X1 X2/EXCLK HIGH-SPEED ON-CHIP OSCILLATOR XT1 XT2/EXCLKS PLL BUZZER OUTPUT SCL10 SDA10 TOOL0 SCLA0 CSI00 IIC00 POR/LVD CONTROL RESET CONTROL UART0 CSI10 P130 P137 POWER ON RESET/ VOLTAGE DETECTOR LINSEL SCK10 SI10 SO10 SCL00 SDA00 P121 to P124 PORT 14 ON-CHIP DEBUG UART1 P125 to P127 4 PORT 13 SERIAL ARRAY UNIT0 (4 ch) RxD1 TxD1 SCK00 SI00 SO00 3 DATA FLASH MEMORY RAM REAL-TIME CLOCK RxD0 TxD0 2 CLOCK OUTPUT CONTROL PCLBUZ0, PCLBUZ1 VOLTAGE REGULATOR INTERRUPT CONTROL DATA TRANSFER CONTROL D/A CONVERTER EVENT LINK CONTROLLER REGC 8 INTP0 to INTP7 ANO0 ANO1 COMPARATOR (1 ch) BCD ADJUSTMENT COMPARATOR0 VCOUT0 IVCMP0 IVREF0 USB VOLTAGE REGULATOR CRC CSI20 UREGC CSI30 UDP USB IIC20 SCL30 SDA30 VL1 to VL4 CAPH CAPL ANI16 to ANI21 12- BIT INTERVAL TIMER RTC1HZ SEG0 to SEG6, SEG12 to SEG25, SEG27 to SEG42, SEG48 to SEG55 COM0 to COM7, COMEXP 6 PORT 0 UDM UVBUS IIC30 44 9 LCD CONTROLLER/ DRIVER RAM SPACE FOR LCD DATA R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 9 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.5.2 1.OUTLINE 80-pin products (without the USB) TIMER ARRAY UNIT0 (8 ch) TI00/TO00 ch 0 TI01/TO01 ch 1 TI02/TO02 ch 2 TI03/TO03 ch 3 TI04/TO04 ch 4 TI05/TO05 ch 5 TI06/TO06 ch 6 TI07/TO07 ch 7 REMOOUT REMOTE CARRIER A/D CONVERTER TKBO00 TKBO01 TIMER KB2_0 TKBO10 TKBO11 TIMER KB2_1 TKBO20 TKBO21 TIMER KB2_2 3 ANI2, ANI5, ANI6 6 ANI16 to ANI21 PORT 0 8 P00 to P07 PORT 1 3 P10 to P12 PORT 2 8 P20 to P27 PORT 3 6 P30 to P35 PORT 4 5 P40, P43 to P46 PORT 5 3 P50 to P52 PORT 6 2 P60, P61 PORT 7 8 P70 to P77 PORT 8 2 P82, P83 AVREFP/ANI0 AVREFM/ANI1 RL78 CPU CORE CODE FLASH MEMORY MULTIPLIER & DIVIDER, MULITIPLYACCUMULATOR PORT 12 DATA FLASH MEMORY 3 P125 to P127 4 P121 to P124 P130 PORT 13 WINDOW WATCHDOG TIMER LOW-SPEED ON-CHIP OSCILLATOR RTC1HZ P140 to P143 PORT 15 5 P150 to P152, P155, P156 KEY RETURN 8 KR0 to KR7 POWER ON RESET/ VOLTAGE DETECTOR POR/LVD CONTROL AVDD, AVSS, TOOLRxD, VDD0 VSS0 TOOLTxD RESET CONTROL UART0 ON-CHIP DEBUG TOOL0 LINSEL RxD1 TxD1 SCK00 SI00 SO00 UART1 SDAA0 SERIAL INTERFACE IICA0 SCLA0 CSI00 SYSTEM CONTROL RESET X1 X2/EXCLK HIGH-SPEED ON-CHIP OSCILLATOR XT1 XT2/EXCLKS BUZZER OUTPUT SCK10 SI10 SO10 SCL00 SDA00 CSI10 IIC00 SCL10 SDA10 IIC10 SERIAL ARRAY UNIT1 (4 ch) RxD2 TxD2 UART2 RxD3 TxD3 UART3 2 CLOCK OUTPUT CONTROL PCLBUZ0, PCLBUZ1 VOLTAGE REGULATOR DATA TRANSFER CONTROL INTERRUPT CONTROL EVENT LINK CONTROLLER D/A CONVERTER CSI20 REGC 8 INTP0 to INTP7 ANO0 ANO1 COMPARATOR (1 ch) BCD ADJUSTMENT COMPARATOR0 SCK20 SI20 SO20 SCK30 SI30 SO30 SCL20 SDA20 VCOUT0 IVCMP0 IVREF0 CRC CSI30 IIC20 SCL30 SDA30 VL1 to VL4 CAPH CAPL 4 SERIAL ARRAY UNIT0 (4 ch) RxD0 TxD0 SEG0 to SEG6, SEG12 to SEG25, SEG27 to SEG42, SEG48 to SEG55 COM0 to COM7, COMEXP PORT 14 RAM 12- BIT INTERVAL TIMER REAL-TIME CLOCK P137 IIC30 44 9 LCD CONTROLLER/ DRIVER RAM SPACE FOR LCD DATA R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 10 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.5.3 1.OUTLINE 100-pin products (with the USB) TIMER ARRAY UNIT0 (8 ch) TI00/TO00 ch 0 TI01/TO01 ch 1 TI02/TO02 ch 2 TI03/TO03 ch 3 TI04/TO04 ch 4 TI05/TO05 ch 5 TI06/TO06 ch 6 TI07/TO07 ch 7 REMOOUT REMOTE CARRIER A/D CONVERTER TKBO00 TKBO01 TIMER KB2_0 TKBO10 TKBO11 TIMER KB2_1 TKBO20 TKBO21 TIMER KB2_2 WINDOW WATCHDOG TIMER LOW-SPEED ON-CHIP OSCILLATOR ANI2 to ANI6 6 ANI16 to ANI21 AVREFM/ANI1 RL78 CPU CORE CODE FLASH MEMORY MULTIPLIER & DIVIDER, MULITIPLYACCUMULATOR P10 to P17 PORT 2 8 P20 to P27 PORT 3 8 P30 to P37 PORT 4 7 P40 to P46 PORT 5 8 P50 to P57 PORT 6 2 P60, P61 PORT 7 8 P70 to P77 PORT 12 P140 to P143 PORT 15 7 P150 to P156 KEY RETURN 8 KR0 to KR7 AVDD, AVSS, TOOLRxD, VDD0, VSS0, TOOLTxD VDD1 VSS1 SDAA0 SERIAL INTERFACE IICA0 SERIAL ARRAY UNIT1 (4 ch) RxD2 TxD2 UART2 RxD3 TxD3 UART3 TOOL0 RESET X1 X2/EXCLK HIGH-SPEED ON-CHIP OSCILLATOR XT1 XT2/EXCLKS SCLA0 PLL BUZZER OUTPUT IIC10 POR/LVD CONTROL RESET CONTROL SYSTEM CONTROL SCL10 SDA10 P130 P137 4 UART0 IIC00 P125 to P127 P121 to P124 PORT 14 ON-CHIP DEBUG CSI10 3 4 POWER ON RESET/ VOLTAGE DETECTOR CSI00 SCK20 SI20 SO20 SCK30 SI30 SO30 SCL20 SDA20 8 SERIAL ARRAY UNIT0 (4 ch) UART1 SCK10 SI10 SO10 SCL00 SDA00 PORT 1 DATA FLASH MEMORY LINSEL RxD1 TxD1 SCK00 SI00 SO00 P00 to P07 PORT 13 RAM REAL-TIME CLOCK RxD0 TxD0 8 AVREFP/ANI0 12- BIT INTERVAL TIMER RTC1HZ 2 CLOCK OUTPUT CONTROL PCLBUZ0, PCLBUZ1 VOLTAGE REGULATOR INTERRUPT CONTROL DATA TRANSFER CONTROL D/A CONVERTER EVENT LINK CONTROLLER REGC 8 INTP0 to INTP7 ANO0 ANO1 COMPARATOR (2 ch) BCD ADJUSTMENT USB VOLTAGE REGULATOR CRC CSI20 COMPARATOR0 VCOUT0 IVCMP0 IVREF0 COMPARATOR1 VCOUT1 IVCMP1 IVREF1 UREGC CSI30 UDP USB IIC20 SCL30 SDA30 UDM UVBUS IIC30 SEG0 to SEG55 56 COM0 to COM7, COMEXP 9 VL1 to VL4 CAPH CAPL 5 PORT 0 LCD CONTROLLER/ DRIVER RAM SPACE FOR LCD DATA R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 11 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.5.4 1.OUTLINE 100-pin products (without the USB) TIMER ARRAY UNIT0 (8 ch) TI00/TO00 ch 0 TI01/TO01 ch 1 TI02/TO02 ch 2 TI03/TO03 ch 3 TI04/TO04 ch 4 TI05/TO05 ch 5 TI06/TO06 ch 6 TI07/TO07 ch 7 REMOOUT REMOTE CARRIER A/D CONVERTER TKBO00 TKBO01 TIMER KB2_0 TKBO10 TKBO11 TIMER KB2_1 TKBO20 TKBO21 TIMER KB2_2 5 ANI2 to ANI6 6 ANI16 to ANI21 PORT 0 8 P00 to P07 PORT 1 8 P10 to P17 PORT 2 8 P20 to P27 PORT 3 8 P30 to P37 PORT 4 7 P40 to P46 PORT 5 8 P50 to P57 PORT 6 2 P60, P61 PORT 7 8 P70 to P77 PORT 8 4 P80 to P83 AVREFP/ANI0 AVREFM/ANI1 RL78 CPU CORE CODE FLASH MEMORY MULTIPLIER & DIVIDER, MULITIPLYACCUMULATOR PORT 12 DATA FLASH MEMORY 3 P125 to P127 4 P121 to P124 P130 PORT 13 WINDOW WATCHDOG TIMER LOW-SPEED ON-CHIP OSCILLATOR RTC1HZ RxD0 TxD0 4 P140 to P143 PORT 15 7 P150 to P156 KEY RETURN 8 KR0 to KR7 POWER ON RESET/ VOLTAGE DETECTOR POR/LVD CONTROL AVDD, AVSS, TOOLRxD, VDD0, VSS0, TOOLTxD VDD1 VSS1 SERIAL ARRAY UNIT0 (4 ch) RESET CONTROL UART0 ON-CHIP DEBUG TOOL0 LINSEL RxD1 TxD1 SCK00 SI00 SO00 UART1 SDAA0 SERIAL INTERFACE IICA0 SCLA0 CSI00 SYSTEM CONTROL RESET X1 X2/EXCLK HIGH-SPEED ON-CHIP OSCILLATOR XT1 XT2/EXCLKS BUZZER OUTPUT SCK10 SI10 SO10 SCL00 SDA00 CSI10 IIC00 SCL10 SDA10 IIC10 SERIAL ARRAY UNIT1 (4 ch) RxD2 TxD2 UART2 RxD3 TxD3 UART3 SCK20 SI20 SO20 SCK30 SI30 SO30 SCL20 SDA20 CSI20 2 CLOCK OUTPUT CONTROL PCLBUZ0, PCLBUZ1 VOLTAGE REGULATOR DATA TRANSFER CONTROL INTERRUPT CONTROL EVENT LINK CONTROLLER D/A CONVERTER REGC 8 INTP0 to INTP7 ANO0 ANO1 COMPARATOR (2 ch) BCD ADJUSTMENT CRC COMPARATOR0 VCOUT0 IVCMP0 IVREF0 COMPARATOR1 VCOUT1 IVCMP1 IVREF1 CSI30 IIC20 SCL30 SDA30 IIC30 SEG0 to SEG55 56 COM0 to COM7, COMEXP 9 VL1 to VL4 CAPH CAPL PORT 14 RAM 12- BIT INTERVAL TIMER REAL-TIME CLOCK P137 LCD CONTROLLER/ DRIVER RAM SPACE FOR LCD DATA R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 12 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.6 1.OUTLINE Outline of Functions [80-pin, 100-pin products (with the USB)] (1/2) 80-pin 100-pin R5F110Mx (x = E to H, J) R5F110Px (x = E to H, J) Code flash memory (KB) 64 to 256 64 to 256 Data flash memory (KB) 8 8 8 to 16 Note 1 8 to 16 Note 1 Item RAM (KB) Memory space Main system clock 1 MB High-speed system clock X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK) High-speed on-chip HS (high-speed main) operation mode: 1 to 24 MHz (VDD = 2.7 to 3.6 V), oscillator clock HS (high-speed main) operation mode: 1 to 16 MHz (VDD = 2.4 to 3.6 V, 1 to 20 MHz: VDD = 2.7 to 3.6 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V LS (low-speed main) operation mode: 1 to 8 MHz (VDD = 1.8 to 3.6 V), LV (low-voltage main) operation mode: 1 to 4 MHz (VDD = 1.6 to 3.6 V) PLL clock 6, 12, 24 MHz Note 2: VDD = 2.4 to 3.6 V Subsystem clock XT1 (crystal) oscillation, external subsystem clock input (EXCLKS) Low-speed on-chip oscillator clock 15 kHz (TYP.): VDD = 1.6 to 3.6 V General-purpose register 8 bits 32 registers (8 bits 8 registers 4 banks) Minimum instruction execution time 0.04167 s (High-speed on-chip oscillator clock: fHOCO = fIH = 24 MHz operation) 32.768 kHz (TYP.): VDD = 1.6 to 3.6 V 0.04167 s (PLL clock: fPLL = 48 MHz/fIH = 24 MHz Note 2 operation) 0.05 s (High-speed system clock: fMX = 20 MHz operation) 30.5 s (Subsystem clock: fSUB = 32.768 kHz operation) Instruction set I/O port * * * * * Data transfer (8/16 bits) Adder and subtractor/logical operation (8/16 bits) Multiplication (8 bits 8 bits, 16 bits 16 bits), Division (16 bits 16 bits, 32 bits 32 bits) Multiplication and Accumulation (16 bits 16 bits + 32 bits) Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc. Total 59 77 CMOS I/O 51 69 CMOS input 5 5 CMOS output 1 1 2 2 N-ch open-drain I/O (6 V tolerance) Timer 16-bit timer TAU 8 channels (with 1 channel remote control output function)(Timer outputs: 8, PWM outputs: 7 Note 3) 16-bit timer KB2 3 channels (PWM outputs: 6) Watchdog timer 1 channel 12-bit interval timer 1 channel High accuracy real-time 1 channel clock RTC output 1 1 Hz (subsystem clock: fSUB = 32.768 kHz) Note 1. In the case of the 16 KB, this is about 15 KB when the self-programming function and data flash function are used. Note 2. In the PLL clock 48 MHz operation, the system clock is 2/4/8 dividing ratio. Note 3. The number of outputs varies, depending on the setting of channels in use and the number of the master. R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 13 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.OUTLINE (2/2) 80-pin 100-pin R5F110Mx (x = E to H, J) R5F110Px (x = E to H, J) 2 2 Item Clock output/buzzer output * 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) * 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz (Subsystem clock: fSUB = 32.768 kHz operation) 8/12-bit resolution A/D converter 9 channels 13 channels D/A converter 2 channels 2 channels Comparator 1 channel 2 channels Serial interface * CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel I2C bus USB 1 channel 1 channel Function LCD controller/driver 1 channel Internal voltage boosting method, capacitor split method, and external resistance division method are switchable. Segment signal output 44 (40) Note 1 Common signal output 56 (52) Note 1 4 (8) Note 1 Data transfer controller (DTC) Event link controller (ELC) 32 sources 33 sources Event input: 30, Event trigger output: 22 Event input: 31, Event trigger output: 22 Vectored interrupt Internal 36 37 sources External 9 9 8 8 Key interrupt Reset * * * * Reset by RESET pin Internal reset by watchdog timer Internal reset by power-on-reset Internal reset by voltage detector * Internal reset by illegal instruction execution Note 2 * Internal reset by RAM parity error * Internal reset by illegal-memory access Power-on-reset circuit * Power-on-reset: 1.51 0.03 V * Power-down-reset: 1.50 0.03 V Voltage detector * Rising edge: 1.67 V to 3.13 V (12 stages) * Falling edge: 1.63 V to 3.06 V (12 stages) On-chip debug function Provided Power supply voltage VDD = 1.6 to 3.6 V Operating ambient temperature TA = -40 to +85C Note 1. The number in parentheses indicates the number of signal outputs when 8 coms are used. Note 2. The illegal instruction is generated when instruction code FFH is executed. Reset by the illegal instruction execution not is issued by emulation with the in-circuit emulator or on-chip debug emulator. R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 14 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.OUTLINE [80-pin, 100-pin products (without the USB)] (1/2) 80-pin 100-pin R5F111Mx (x = E to H, J) R5F111Px (x = E to H, J) Code flash memory (KB) 64 to 256 64 to 256 Data flash memory (KB) 8 8 8 to 16 Note 1 8 to 16 Note 1 Item RAM (KB) Memory space Main system clock 1 MB High-speed system clock X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK) High-speed on-chip HS (high-speed main) operation mode: 1 to 24 MHz (VDD = 2.7 to 3.6 V), oscillator clock HS (high-speed main) operation mode: 1 to 16 MHz (VDD = 2.4 to 3.6 V, 1 to 20 MHz: VDD = 2.7 to 3.6 V, 1 to 8 MHz: VDD = 1.8 to 2.7 V, 1 to 4 MHz: VDD = 1.6 to 1.8 V LS (low-speed main) operation mode: 1 to 8 MHz (VDD = 1.8 to 3.6 V), LV (low-voltage main) operation mode: 1 to 4 MHz (VDD = 1.6 to 3.6 V) Subsystem clock XT1 (crystal) oscillation, external subsystem clock input (EXCLKS) Low-speed on-chip oscillator clock 15 kHz (TYP.): VDD = 1.6 to 3.6 V General-purpose register 8 bits 32 registers (8 bits 8 registers 4 banks) Minimum instruction execution time 0.04167 s (High-speed on-chip oscillator clock: fHOCO = fIH = 24 MHz operation) 32.768 kHz (TYP.): VDD = 1.6 to 3.6 V 0.05 s (High-speed system clock: fMX = 20 MHz operation) 30.5 s (Subsystem clock: fSUB = 32.768 kHz operation) Instruction set I/O port * * * * * Data transfer (8/16 bits) Adder and subtractor/logical operation (8/16 bits) Multiplication (8 bits 8 bits, 16 bits 16 bits), Division (16 bits 16 bits, 32 bits 32 bits) Multiplication and Accumulation (16 bits 16 bits + 32 bits) Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc. Total 63 81 CMOS I/O 55 73 CMOS input 5 5 CMOS output 1 1 2 2 N-ch open-drain I/O (6 V tolerance) Timer 16-bit timer TAU 8 channels (with 1 channel remote control output function)(Timer outputs: 8, PWM outputs: 7 Note 2) 16-bit timer KB2 3 channels (PWM outputs: 6) Watchdog timer 1 channel 12-bit interval timer 1 channel High accuracy real-time 1 channel clock RTC output 1 1 Hz (subsystem clock: fSUB = 32.768 kHz) Note 1. In the case of the 16 KB, this is about 15 KB when the self-programming function and data flash function are used. Note 2. The number of outputs varies, depending on the setting of channels in use and the number of the master. R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 15 of 16 Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/L1C 1.OUTLINE (2/2) 80-pin 100-pin R5F111Mx (x = E to H, J) R5F111Px (x = E to H, J) 2 2 Item Clock output/buzzer output * 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz (Main system clock: fMAIN = 20 MHz operation) * 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz (Subsystem clock: fSUB = 32.768 kHz operation) 8/12-bit resolution A/D converter 11 channels 13 channels D/A converter 2 channels 2 channels Comparator 1 channel 2 channels Serial interface * CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel * CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel I2C bus LCD controller/driver 1 channel 1 channel Internal voltage boosting method, capacitor split method, and external resistance division method are switchable. Segment signal output 44 (40) Note 1 Common signal output 4 (8) Note 1 Data transfer controller (DTC) Event link controller (ELC) Vectored interrupt Internal sources External 30 sources 31 sources Event input: 30, Event trigger output: 22 Event input: 31, Event trigger output: 22 34 35 Key interrupt Reset 56 (52) Note 1 * * * * 9 9 8 8 Reset by RESET pin Internal reset by watchdog timer Internal reset by power-on-reset Internal reset by voltage detector * Internal reset by illegal instruction execution Note 2 * Internal reset by RAM parity error * Internal reset by illegal-memory access Power-on-reset circuit * Power-on-reset: 1.51 0.03 V * Power-down-reset: 1.50 0.03 V Voltage detector * Rising edge: 1.67 V to 3.13 V (12 stages) * Falling edge: 1.63 V to 3.06 V (12 stages) On-chip debug function Provided Power supply voltage VDD = 1.6 to 3.6 V Operating ambient temperature TA = -40 to +85C Note 1. The number in parentheses indicates the number of signal outputs when 8 coms are used. Note 2. The illegal instruction is generated when instruction code FFH is executed. Reset by the illegal instruction execution not is issued by emulation with the in-circuit emulator or on-chip debug emulator. R01DS0192EJ0001 Rev. 0.01 Oct 15, 2012 Page 16 of 16 REVISION HISTORY Rev. Date 0.01 Oct 15, 2012 RL78/L1C Datasheet Description Page -- Summary First Edition issued SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States and Japan. Caution: This product uses SuperFlash(R) technology licensed from Silicon Storage Technology, Inc. All trademarks and registered trademarks are the property of their respective owners. 1 NOTES FOR CMOS DEVICES (1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). (2) HANDLING OF UNUSED INPUT PINS: Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. (3) PRECAUTION AGAINST ESD: A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. (4) STATUS BEFORE INITIALIZATION: Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. (5) POWER ON/OFF SEQUENCE: In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. (6) INPUT OF SIGNAL DURING POWER OFF STATE : Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics 3. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 4. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. Renesas Electronics assumes no responsibility for any losses incurred by you or 5. Renesas Electronics products are classified according to the following two quality grades: "Standard" and "High Quality". The recommended applications for each Renesas Electronics product depends on third parties arising from such alteration, modification, copy or otherwise misappropriation of Renesas Electronics product. the product's quality grade, as indicated below. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; and safety equipment etc. Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear reactor control systems, military equipment etc.). You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics. 6. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. 7. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by you. 8. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You should not use Renesas Electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. When exporting the Renesas Electronics products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. 10. It is the responsibility of the buyer or distributor of Renesas Electronics products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products. 11. This document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. http://www.renesas.com SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130 Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-651-700, Fax: +44-1628-651-804 Renesas Electronics Europe GmbH Arcadiastrasse 10, 40472 Dusseldorf, Germany Tel: +49-211-65030, Fax: +49-211-6503-1327 Renesas Electronics (China) Co., Ltd. 7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679 Renesas Electronics (Shanghai) Co., Ltd. Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898 Renesas Electronics Hong Kong Limited Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2886-9318, Fax: +852 2886-9022/9044 Renesas Electronics Taiwan Co., Ltd. 13F, No. 363, Fu Shing North Road, Taipei, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670 Renesas Electronics Singapore Pte. Ltd. 80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre Singapore 339949 Tel: +65-6213-0200, Fax: +65-6213-0300 Renesas Electronics Malaysia Sdn.Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510 Renesas Electronics Korea Co., Ltd. 11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141 (c) 2012 Renesas Electronics Corporation. All rights reserved. Colophon 2.2