1
FEATURES DESCRIPTION
APPLICATIONS
TPS718xx
TPS719xx
GND
EN1
EN2
OUT2
IN OUT1
VIN VOUT
VOUT
1 Fm
1 Fm
1 Fm
TypicalApplicationCircuit
2.7Vto6.5V 0.9Vto3.6V
0.9V 3.6V-
On
Off
On
Off
EN1
GND
GND
EN2
6
5
4
OUT1
IN
OUT2
1
2
3
TPS718xx,TPS719xx
DRVPackage
2mmx2mmSON-6
(TopView)
OUT1
IN
OUT2
EN1
GND
EN2
A1
B1
C1
A2
B2
C2
TPS718Axx,TPS719Axx
YZCPackage
6-BALLWCSP
(TopView)
OUT1
IN
OUT2
EN1
GND
EN2
C2
B2
A2
C1
B1
A1
TPS718xx,TPS719xx
YZCPackage
6-BALLWCSP
(TopView)
TPS718xx
TPS719xx
www.ti.com
..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
Dual, 200mA Output, Low Noise, High PSRRLow-Dropout Linear Regulators
23
•Dual, 200mA High-Performance LDOs
The TPS718xx and TPS719xx families of low-dropout(LDO) regulators offer a high power-supply rejection•Low Total Quiescent Current: 90 µA with Both
ratio (PSRR), low noise, fast start-up, and excellentLDOs Enabled
line and load transient responses while consuming a•Low Noise: 70 µV
RMS
/V
very low 90 µA (typical) at no load ground current with•Active Output Pulldown (TPS719xx)
both LDOs enabled. The TPS719xx also provides anactive pulldown circuit to quickly discharge output•Independent Enables for Each LDO
loads. The TPS718xx and TPS719xx are stable with•PSRR: 65dB at 1kHz, 45dB at 1MHz
ceramic capacitors and use an advanced BiCMOS•Available in Multiple Fixed-Output Voltage
fabrication process to yield a typical dropout voltageCombinations from 0.9V to 3.6V Using
of 230mV at 200mA output loads. The TPS718xx andInnovative Factory EEPROM Programming
TPS719xx also use a precision voltage reference andfeedback loop to achieve 3% overall accuracy over all•Fast Start-Up Time: 160 µs
load, line, process, and temperature variations. Both•Over-Current, Over-Temperature and
families of devices are fully specified from T
J
= – 40 °CUnder-Voltage Protection
to +125 °C and are offered in 2mm ×2mm SON-6 and•Low Dropout: 230mV at 200mA
6-ball Wafer Chip-Scale (WCSP) packages that areideal for applications such as mobile handsets and•Stable with 1 µF Ceramic Output Capacitor
WLAN that require good thermal dissipation while•Available in 2mm ×2mm SON-6 and 6-Ball
maintaining a very small footprint.WCSP Packages
•Digital Cameras and Camera Modules•Cellular Camera and TV Phones•Wireless LAN, Bluetooth
®
•Handheld Products
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Bluetooth is a registered trademark of Bluetooth SIG, Inc.3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
DISSIPATION RATINGS
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2) (3)
TPS718 xx-yywwwz Adenotes device with rotated pin 1 orientation of wafer-chipscale package.TPS718A xx-yywwwz XX is nominal output voltage for LDO1 (for example, 28 = 2.8V).TPS719 xx-yywwwz YY is nominal output voltage for LDO2.TPS719A xx-yywwwz WWW is package designator.Zis tape and reel quantity (R = 3000, T = 250).
Examples: TPS71918 – 285DRVR XX = 18 = 1.8V, YYY = 285 = 2.85VTPS719185-33DRVR XXX = 185 = 1.85V, YY = 33 = 3.3VDRV = 2mm x 2mm SON packageZ= R = 3000 piece reel
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .(2) Both outputs are programmable from 0.9V to 3.6V in 50mV increments.(3) Output voltages from 0.9V to 3.6V in 50mV increments are available through the use of innovative factory EEPROM programming;minimum order quantities may apply. Contact factory for details and availability.
Over operating temperature range (unless otherwise noted). All voltages are with respect to GND.
PARAMETER TPS718xx, TPS719xx UNIT
Input voltage range, V
IN
– 0.3 to +7.0 VEnable voltage range, V
EN1
and V
EN2
– 0.3 to V
IN
+ 0.3V VOutput voltage range, V
OUT
– 0.3 to +7.0 VPeak output current Internally limitedOutput short-circuit duration IndefiniteJunction temperature range, T
J
– 55 to +150 °CStorage temperature range , T
STG
– 55 to +150 °CTotal continuous power dissipation, P
DISS
See Dissipation Ratings TableESD rating, HBM 2 kVESD rating, CDM 500 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods maydegrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyondthose specified is not implied.
DERATING FACTORBOARD PACKAGE R
θJC
R
θJA
ABOVE T
A
= +25 °C T
A
< +25 °C T
A
= +70 °C T
A
= +85 °C
High-K
(1)
DRV 20 °C/W 95 °C/W 10.53mW/ °C 1053mW 579mW 421mWHigh-K
(1)
YZC 27 °C/W 190 °C/W 5.3mW/ °C 530mW 295mW 215mW
(1) The JEDEC high-K (2s2p) board used to derive this data was a 3in ×3in, multilayer board with 1-ounce internal power and groundplanes and 2-ounce copper traces on top and bottom of the board.
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Product Folder Link(s): TPS718xx TPS719xx
ELECTRICAL CHARACTERISTICS
TPS718xx
TPS719xx
www.ti.com
..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
Over operating temperature range (T
J
= – 40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater;I
OUT
= 0.5mA, V
EN1
= V
EN2
= V
IN
, C
OUT
= 1.0 µF, unless otherwise noted. Typical values are at T
J
= +25 °C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range
(1)
2.7 6.5 VV
OUT1
, V
OUT2
Output voltage range 0.9 3.6 VNominal T
J
= +25 °C ± 2.5 mVV
OUT1
, V
OUT2
Output accuracy
Over V
IN
, I
OUT
, V
OUT
+ 0.5V ≤V
IN
≤6.5V
– 3.0 +3.0 %Temp 0mA ≤I
OUT
≤200mAV
OUT(NOM)
+ 0.5V ≤V
IN
≤6.5V,ΔV
OUT
/ΔV
IN
Line regulation 130 µV/VI
OUT
= 5mA
ΔV
OUT
/ΔI
OUT
Load regulation 0mA ≤I
OUT
≤200mA 75 µV/mADropout voltage
(2)V
DO
I
OUT
= 200mA 230 400 mV(V
IN
= V
OUT(NOM)
– 0.1V)I
CL
Output current limit (per output) V
OUT
= 0.9 ×V
OUT(NOM)
240 340 575 mAI
OUT1
= I
OUT2
= 0.1mA 90 160 µAI
GND
Ground pin current
I
OUT1
= I
OUT2
= 200mA 250 µAV
EN1,2
≤0.4V, 2.7V ≤V
IN
< 4.5V,
0.3 3.0 µAT
J
= – 40 °C to +85 °CI
SHDN
Shutdown current (I
GND
)
V
EN1,2
≤0.4V, 4.5V ≤V
IN
≤6.5V,
1.8 µAT
J
= – 40 °C to +85 °Cf = 100Hz 63 dBf = 1kHz 63 dBPower-supply rejection ratioPSRR V
IN
= 3.8V, V
OUT
= 2.8V, f = 10kHz 72 dBI
OUT
= 200mA
f = 100kHz 58 dBf = 1MHz 44 dBOutput noise voltageV
N
70 ×V
OUT
µV
RMSBW = 100Hz to 100kHz
R
L
= 14 Ω, V
OUT
= 2.8V,T
STR
Startup time
(3)
160 µsC
OUT
= 1.0 µFShutdown time
(4)
,
(5)
R
L
=∞, C
OUT
= 1.0 µF,T
SHUT
180 µs(TPS719xx only) V
OUT
= 2.8VV
IN
≤5.5V 1.2 6.5 VEnable high (enabled)V
EN(HI)
(EN1 and EN2)
5.5V < V
IN
≤6.5V 1.25 6.5 VEnable low (shutdown)V
EN(LO)
0 0.4 V(EN1 and EN2)Enable pin current, enabledI
EN
EN1 = EN2 = 6.5V 0.04 1.0 µA(EN1 and EN2)Undervoltage lockout V
IN
rising 2.38 2.45 2.52 VUVLO
Hysteresis V
IN
falling 150 mVShutdown, temperature increasing +160 °CT
SD
Thermal shutdown temperature
Reset, temperature decreasing +140 °CT
J
Operating junction temperature – 40 +125 °C
(1) Minimum V
IN
= V
OUT
+ V
DO
or 2.7V, whichever is greater.(2) V
DO
is not measured for devices with V
OUT(NOM)
< 2.8V because minimum V
IN
= 2.7V.(3) Time from V
EN
= 1.25V to V
OUT
= 95% (V
OUT(NOM)
).(4) Time from V
EN
= 0.4V to V
OUT
= 5% (V
OUT(NOM)
).(5) See Shutdown section in the Applications Information for more details.
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS718xx TPS719xx
DEVICE INFORMATION
GND
Bandgap
Bandgap
2.5 Am
2.5 Am
Current
Limit
Thermal
Shutdown
UVLO
Current
Limit
Thermal
Shutdown
UVLO
Enableand
Power
Control
Logic
60W
60W
OUT1
OUT2
EN1
EN2
IN
TPS719only
TPS719only
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
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Figure 1. Functional Block Diagram
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Product Folder Link(s): TPS718xx TPS719xx
EN1
GND
GND
EN2
6
5
4
OUT1
IN
OUT2
1
2
3
OUT1
IN
OUT2
EN1
GND
EN2
C2
B2
A2
C1
B1
A1
TPS718xx
TPS719xx
TPS718Axx
TPS719Axx
OUT1
IN
OUT2
EN1
GND
EN2
A1
B1
C1
A2
B2
C2
TPS718xx
TPS719xx
www.ti.com
..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
DRV PACKAGE
SON-6
(TOP VIEW)
YZC PACKAGE
6-BALL WCSP(TOP VIEW)
YZC PACKAGE
6-BALL WCSP(TOP VIEW)
PIN DESCRIPTIONS
TPS718xx TPS718Axx
(1)
TPS719xx TPS719Axx
(1)
NAME DRV YZC YZC DESCRIPTION
Output of Regulator 1. A small ceramic capacitor (typically ≥1µF) isOUT1 1 C1 A2
needed from this pin to ground to assure stability.IN 2 B1 B2 Input supply to both regulators.Output of Regulator 2. A small ceramic capacitor (typically ≥1µF) isOUT2 3 A1 C2
needed from this pin to ground to assure stability.Enable pin for Regulator 2. Driving the Enable pin (EN2) high turns onEN2 4 A2 C1 Regulator 2. Driving this pin low puts Regulator 2 into shutdown mode,reducing operating current.GND 5 B2 B1 Ground. DRV thermal pad should also be connected to ground.Enable pin for Regulator 1. Driving the Enable pin (EN1) high turns onEN1 6 C2 A1 Regulator 1. Driving this pin low puts Regulator 1 into shutdown mode,reducing operating current.
(1) Aoption denotes devices with rotated Pin 1 orientation on Wafer Chipscale packages.
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS718xx TPS719xx
TYPICAL CHARACTERISTICS
4
3
2
1
0
1
2
3
4
-
-
-
-
DV (mV)
OUT
2.5 5.5 6.5
V (V)
IN
3.5 4.5
I =5mA
OUT
T =+25 C
J°
T =+85 C
J°
T =+125 C
J°
T = 0 C
J-4°
0
1
2
3
4
5
-
-
-
-
-
DV (mV)
OUT
T =+85 C
J°
T =+125 C
J°
T =+25 C
J°T = 40 C
J-°
I =200mA
OUT
2.5 5.5 6.5
V (V)
IN
3.5 4.5
4
2
0
2
4
6
8
10
-
-
-
-
-
I (mA)
OUT
DV (mV)
OUT
0 5
1 2 34
T =+85 C
J°
T =+125 C
J°
T =+25 C
J°
T = 40 C
J-°
5
0
5
10
15
20
25
30
35
40
-
-
-
-
-
-
-
-
0 50 100 150 200
I (mA)
OUT
DV(mV)
OUT
T =+125 C
J
T =+85 C
T =+25 C
T = 40 C
J
J
J-
°
°
°
°
2.805
2.800
2.795
2.790
2.785
2.780
2.775
2.770
2.765
2.760
V(V)
OUT
-40 65 125
T ( C)
J°
5 35-25 -10 20 50 80 95 110
I =5mA
OUT
I =0.1mA
OUT
I =200mA
OUT
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
www.ti.com
Over operating temperature range (T
J
= – 40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater;I
OUT
= 0.5mA, V
EN1
= V
EN2
= V
IN
, C
OUT
= 1.0 µF, unless otherwise noted. Typical values are at T
J
= +25 °C.
LINE REGULATION LINE REGULATION
Figure 2. Figure 3.
LOAD REGULATION UNDER LIGHT LOADS LOAD REGULATION
Figure 4. Figure 5.
OUTPUT VOLTAGE vs DROPOUT VOLTAGE vsTEMPERATURE OUTPUT CURRENT
Figure 6. Figure 7.
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200
160
120
80
40
0
0 100 200
I (mA)
OUT
I( A)m
GND
50 150
T =+125 C
J°
T = 0 C
J-4°
T =+85 C
J°
T =+25 C
J°
60
50
40
30
20
10
0
I(A)m
GND
2.5 5.5 6.5
V (V)
IN
3.5 4.5
I =1mA
OUT
-40 65 125
T ( C)
J°
5 35-25 -10 20 50 80 95 110
140
120
100
80
60
40
20
0
I( A)m
GND
I =0mA
OUT
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
ShutdownCurrent( A)m
T = 40 C
J-°
2.5 5.5 6.5
V (V)
IN
3.5 4.5
T =+125 C
J°
T =+85 C
J°
T =+25 C
J°
450
425
400
375
350
325
300
275
250
CurrentLimit(mA)
2.5 5.5 6.5
V (V)
IN
3.5 4.5
T =+125 C
J
T =+85 C
T =+25 C
T = 40 C
J
J
J-
°
°
°
°
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
10 100k 10M
Frequency(Hz)
1k 10k100 1M
5mA
100mA
200mA
TPS718xx
TPS719xx
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..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= – 40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater;I
OUT
= 0.5mA, V
EN1
= V
EN2
= V
IN
, C
OUT
= 1.0 µF, unless otherwise noted. Typical values are at T
J
= +25 °C.
GROUND PIN CURRENT vs GROUND PIN CURRENT vsOUTPUT CURRENT INPUT VOLTAGE
Figure 8. Figure 9.
GROUND PIN CURRENT vs SHUTDOWN CURRENT vsTEMPERATURE (BOTH LDOs ENABLED) INPUT VOLTAGE
Figure 10. Figure 11.
CURRENT LIMIT vs POWER-SUPPLY RIPPLE REJECTION vsINPUT VOLTAGE FREQUENCY (V
IN
– V
OUT
= 0.5V)
Figure 12. Figure 13.
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Product Folder Link(s): TPS718xx TPS719xx
80
70
60
50
40
30
20
10
0
V (V)
IN
PSRR (dB)
3.0 4.03.2 3.4 3.6 3.8
V =2.80V
OUT
I =5mA
OUT
10kHz
1kHz
100kHz
1MHz
90
80
70
60
50
40
30
20
10
0
PSRR(dB)
10 100k 10M
Frequency(Hz)
1k 10k100 1M
5mA
100mA
200mA
80
70
60
50
40
30
20
10
0
V (V)
IN
PSRR (dB)
3.0 4.03.2 3.4 3.6 3.8
V =2.80V
I =200mA
OUT
OUT
10kHz
1kHz
100kHz
1MHz
10
1
0.1
0.01
OutputSpectralNoiseDensity( V )
mHz
Ö
100 10k 100k
Frequency(Hz)
1k
V =2.80V
OUT
10 s/divm
3.3V
6.5V
1V/div
10mV/div
10mV/div
VIN
VOUT1
VOUT2
=1V/ sm
dVIN
dt
20 s/divm
IOUT1
VOUT1
VOUT2
250mA/div
10mV/div
10mV/div
=200mA/ sm
dIOUT
dt
I =3mA
OUTmin
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= – 40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater;I
OUT
= 0.5mA, V
EN1
= V
EN2
= V
IN
, C
OUT
= 1.0 µF, unless otherwise noted. Typical values are at T
J
= +25 °C.
POWER-SUPPLY RIPPLE REJECTION vs POWER-SUPPLY RIPPLE REJECTION vsFREQUENCY (V
IN
– V
OUT
= 1V) INPUT VOLTAGE
Figure 14. Figure 15.
POWER-SUPPLY RIPPLE REJECTION vs OUTPUT SPECTRAL NOISE DENSITY vsINPUT VOLTAGE FREQUENCY
Figure 16. Figure 17.
LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 18. Figure 19.
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Product Folder Link(s): TPS718xx TPS719xx
40 s/divm
0V
6.5V
4V/div
1V/div
1V/div
EN1,EN2
VOUT1
VOUT2
VIN IOUT =200mA
VOUT
1V/div
400ms/div
TPS718xx
TPS719xx
www.ti.com
..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= – 40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 0.5V or 2.7V, whichever is greater;I
OUT
= 0.5mA, V
EN1
= V
EN2
= V
IN
, C
OUT
= 1.0 µF, unless otherwise noted. Typical values are at T
J
= +25 °C.
TPS719 ENABLE RESPONSE POWER-UP/POWER-DOWN
Figure 20. Figure 21.
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS718xx TPS719xx
APPLICATION INFORMATION
Board Layout Recommendations to Improve
Internal Current Limit
TPS718xx
TPS719xx
GND
EN1
EN2
OUT2
IN OUT1
VIN VOUT
VOUT
1 Fm
1 Fm
1 Fm
2.7V 6.5V-0.9V 3.6V-
0.9V 3.6V-
On
Off
On
Off
ShutdownInput and Output Capacitor Requirements
t=3 60 RL
´
60+RL
COUT
´
Dropout Voltage
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
www.ti.com
The TPS718xx/TPS719xx belong to a family of newgeneration LDO regulators that use innovative
PSRR and Noise Performancecircuitry to achieve ultra-wide bandwidth and highloop gain, resulting in extremely high PSRR (up to
To improve ac performance such as PSRR, output1MHz) at very low headroom (V
IN
– V
OUT
). These
noise, and transient response, it is recommended thatfeatures, combined with low noise, two independent
the board be designed with separate ground planesenables, low ground pin current and ultra-small
for V
IN
and V
OUT
, with each ground plane connectedpackaging, make this part ideal for portable
only at the GND pin of the device. In addition, theapplications. This family of regulators offer
ground connection for the output capacitor shouldsub-bandgap output voltages, current limit and
connect directly to the GND pin of the device. Highthermal protection, and is fully specified from – 40 °C
ESR capacitors may degrade PSRR.to +125 °C.
Figure 22 shows the basic circuit connections.
The TPS718xx/TPS719xx internal current limits helpprotect the regulator during fault conditions. Duringcurrent limit, the output sources a fixed amount ofcurrent that is largely independent of output voltage.For reliable operation, the device should not beoperated in a current limit state for extended periodsof time.
The PMOS pass element in the TPS718xx/TPS719xxhas a built-in body diode that conducts current whenthe voltage at OUT exceeds the voltage at IN. Thiscurrent is not limited, so if extended reverse voltageoperation is anticipated, external limiting to 5% ofrated output current may be appropriate.Figure 22. Typical Application Circuit
The enable pin (EN) is active high and is compatiblewith standard and low voltage, TTL-CMOS levels.Although an input capacitor is not required for
When shutdown capability is not required, EN can bestability, it is good analog design practice to connect
connected to IN. The TPS719 with internal activea 0.1 µF to 1.0 µF low equivalent series resistance
output pulldown circuitry discharges the output with a(ESR) capacitor across the input supply near the
time constant ( t) of:regulator. This capacitor counteracts reactive inputsources and improves transient response, noiserejection, and ripple rejection. A higher-valuecapacitor may be necessary if large, fast rise-timeload transients are anticipated or if the device islocated close to the power source. If source with:impedance is not sufficiently low, a 0.1 µF input
R
L
= output load resistancecapacitor may be necessary to ensure stability.
C
OUT
= output capacitanceThe TPS718xx/TPS719xx are designed to be stablewith standard ceramic capacitors of values 1.0 µF orlarger at the output. X5R- and X7R-type capacitors
The TPS718xx/TPS719xx use a PMOS passare best because they have minimal variation in value
transistor to achieve low dropout. When (V
IN
– V
OUT
)and ESR over temperature. Maximum ESR should be
is less than the dropout voltage (V
DO
), the PMOS<1.0 Ω.
pass device is in its linear region of operation and theinput-to-output resistance is the R
DS(ON)
of the PMOSpass element. V
DO
approximately scales with outputcurrent because the PMOS device behaves like aresistor in dropout.
10 Submit Documentation Feedback Copyright © 2007 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS718xx TPS719xx
Transient Response
Undervoltage Lock-Out (UVLO)
Power Dissipation
Minimum Load
THERMAL INFORMATION
Thermal Protection
P =(V V )xI-
D IN OUT OUT
(1)
Package Mounting
TPS718xx
TPS719xx
www.ti.com
..................................................................................................................................................... SBVS088C – FEBRUARY 2007 – REVISED MAY 2008
As with any linear regulator, PSRR and transient Any tendency to activate the thermal protection circuitresponse are degraded as (V
IN
– V
OUT
) approaches indicates excessive power dissipation or andropout. This effect is shown in Figure 13 and inadequate heatsink. For reliable operation, junctionFigure 14 in the Typical Characteristics section. temperature should be limited to +125 °C maximum.To estimate the margin of safety in a complete design(including heatsink), increase the ambienttemperature until the thermal protection is triggered;As with any regulator, increasing the size of the
use worst-case loads and signal conditions. For goodoutput capacitor will reduce over/undershoot
reliability, thermal protection should trigger at leastmagnitude but increase duration of the transient
+35 °C above the maximum expected ambientresponse.
condition of your particular application. Thisconfiguration produces a worst-case junctiontemperature of +125 °C at the highest expectedambient temperature and worst-case load.The TPS718xx/TPS719xx utilize an undervoltagelock-out circuit to keep the output shut off until
The internal protection circuitry of theinternal circuitry is operating properly. The UVLO
TPS718xx/TPS719xx has been designed to protectcircuit has a de-glitch feature so that it typically
against overload conditions. It was not intended toignores undershoot transients on the input if they are
replace proper heatsinking. Continuously running theless than 50 µs duration. On the TPS719xx, the active
TPS718xx/TPS719xx into thermal shutdownpulldown discharges V
OUT
when the device is in
degrades device reliability.UVLO off condition. However, the input voltage needsto be greater than 0.8V for active pulldown to work.
The ability to remove heat from the die is different foreach package type, presenting differentThe TPS718xx/TPS719xx are stable with no output
considerations in the printed circuit board (PCB)load. Traditional PMOS LDO regulators suffer from
layout. The PCB area around the device that is freelower loop gain at very light output loads. The
of other components moves the heat from the deviceTPS718xx/TPS719xx employ an innovative,
to the ambient air. Performance data for JEDEC low-low-current mode circuit under very light or no-load
and high-K boards are given in the Dissipationconditions, resulting in improved output voltage
Ratings table. Using heavier copper increases theregulation performance down to zero output current.
effectiveness in removing heat from the device. Theaddition of plated through-holes to heat-dissipatinglayers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and loadconditions. Power dissipation (P
D
) is equal to theThermal protection disables the output when the
product of the output current times the voltage dropjunction temperature rises to approximately +160 °C,
across the output pass element (V
IN
to V
OUT
), asallowing the device to cool. When the junction
shown in Equation 1 :temperature cools to approximately +140 °C theoutput circuitry is again enabled. Depending on powerdissipation, thermal resistance, and ambienttemperature, the thermal protection circuit may cycleon and off. This cycling limits the dissipation of the Solder pad footprint recommendations for theregulator, protecting it from damage due to TPS718xx/TPS719xxx are available from the Texasoverheating. Instruments web site at www.ti.com .
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS718xx TPS719xx
1,690
1,590
1,088
0,988
TPS718xx
TPS719xx
SBVS088C – FEBRUARY 2007 – REVISED MAY 2008 .....................................................................................................................................................
www.ti.com
Figure 23. YZC Wafer Chip-Scale Package Dimensions (in mm)
12 Submit Documentation Feedback Copyright © 2007 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS718xx TPS719xx
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jan-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS71812-33DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71812-33DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71812-33DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71812-33DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71818-27YZCR ACTIVE DSBGA YZC 6 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS71818-27YZCT ACTIVE DSBGA YZC 6 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS71818-33DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71818-33DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71825-12DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71825-12DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71828-28YZCR ACTIVE DSBGA YZC 6 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS71828-28YZCT ACTIVE DSBGA YZC 6 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS71828-30DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71828-30DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71828-30DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71828-30DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71913-28DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jan-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS71913-28DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71913-28DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71913-28DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-12DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-12DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-12DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-12DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-28DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71918-28DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71921-22DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71921-22DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71926-15DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71926-15DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71926-15DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71926-15DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71928-28DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71928-28DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71928-28DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jan-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS71928-28DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS719285-285DRVR ACTIVE SON DRV 6 3000 TBD Call TI Call TI
TPS719285-285DRVT ACTIVE SON DRV 6 250 TBD Call TI Call TI
TPS719285-285DSET PREVIEW SON DRV 6 TBD Call TI Call TI
TPS71933-28DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-28DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-28DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-28DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-33DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-33DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71933-33DRVT ACTIVE SON DRV 6 250 TBD Call TI Call TI
TPS71933-33DRVTG4 ACTIVE SON DRV 6 250 TBD Call TI Call TI
TPS71936-315DRVR ACTIVE SON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS71936-315DRVT ACTIVE SON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jan-2012
Addendum-Page 4
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS71812-33DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71812-33DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71818-33DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71818-33DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71825-12DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71825-12DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71828-30DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71828-30DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71913-28DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71913-28DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71918-12DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71918-12DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71918-28DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71918-28DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71921-22DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71921-22DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71926-15DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71926-15DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jul-2012
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS71928-28DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71928-28DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71933-28DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71933-28DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71933-33DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71936-315DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS71936-315DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS71812-33DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71812-33DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71818-33DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71818-33DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71825-12DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71825-12DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71828-30DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71828-30DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71913-28DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71913-28DRVT SON DRV 6 250 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jul-2012
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS71918-12DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71918-12DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71918-28DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71918-28DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71921-22DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71921-22DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71926-15DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71926-15DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71928-28DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71928-28DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71933-28DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71933-28DRVT SON DRV 6 250 203.0 203.0 35.0
TPS71933-33DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71936-315DRVR SON DRV 6 3000 203.0 203.0 35.0
TPS71936-315DRVT SON DRV 6 250 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Jul-2012
Pack Materials-Page 3
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