FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2005-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.6
ASSP for Power Management Applications
(Rechargeable battery)
DC/DC Converter IC of Synchronous
Rectification for charging Li-ion battery
MB39A119
■DESCRIPTION
The MB39A119 is the N-ch MOS drive of the synchronous rectification type DC/DC converter IC using pulse-
width modulation (PWM) type that can charge Li-ion battery from 1 cell to 4 cells and suitable for down-conversion.
This IC integrates built-in comparator for the voltage detection of the AC adapter and switches the power supply
to the AC adapter or battery automatically, enabling supply it to system. In addition, the constant voltage control
state detection function is built in, which prevents mis-detecting the full charge. The MB39A119 provides a wide
range of power supply voltage and low standby current, high efficiency, making it ideal for use as a built-in charge
device in products such as notebook PC.
■FEATURES
• High efficiency : 97 % (Max)
• High-frequency operation : 1 MHz (Max)
• Built-in off time control function
• Built-in voltage detection function of AC adapter (ACOK, XACOK terminal)
• Preventing mis-detection for the full charge by the constant voltage control state detection function (CVM
terminal)
• Built-in two constant current control circuits
• Analog control of constant current value is possible ( + INE1, + INE2 terminal)
• Built-in output stage for N-ch MOS FET synchronous rectification
• Built-in charge stop function at low input voltage
• Output voltage setting accuracy : 4.2 V ± 0.74 % (Ta= − 10 °C to + 85 °C)
• Built-in high accuracy charge current detection amplifier : ± 4 %
(At input voltage difference 100 mV with Voltage gain 24.5 (V/V)
• Built-in high accuracy input current detection amplifier : ± 3 %
(At input voltage difference 100 mV with Voltage gain 25 (V/V)
• Arbitrary output voltage can be set by external resistor
• In IC standby mode, output voltage setting resistor is made to be open to prevent inefficient current loss
• Quiescent current : 1.9 mA (Typ)
• Standby current : 0 µA (Typ)
• Package : QFN28
DS04-27247-3E
MB39A119
2DS04-27247-3E
■PIN ASSIGNMENT
1
2
3
4
5
6
7
21
20
19
18
17
16
15
89 1011121314
2827 26 25 24 2322
VCC
−INC1
+INC1
ACIN
ACOK
CVM
+INE1
CTL
GND
VREF
RT
CS
OUTD
−INE3
−INE1
OUTC2
+INC2
−INC2
+INE2
−INE2
FB123
CB
OUT-1
VS
VB
OUT-2
PGND
XACOK
(TOP VIEW)
(LCC-28P-M12)
Note : Connect IC’s radiation board at bottom side to potential of GND.
MB39A119
DS04-27247-3E 3
■PIN DESCRIPTION
Pin No. Pin Name I/O Description
1VCC⎯Power supply terminal for reference voltage and control circuit.
2−INC1 I Input current detection amplifier (Current Amp1) input terminal.
3 + INC1 I Input current detection amplifier (Current Amp1) input terminal.
4 ACIN I AC adapter voltage detection block (AC Comp.) input terminal.
5ACOKO
AC adapter voltage detection block (AC Comp.) output terminal.
ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,
ACOK = Hi-Z when CTL = L
6 CVM O Constant voltage control state detection block (CV Comp.) output terminal.
7 + INE1 I Error amplifier (Error Amp1) non-inverted input terminal.
8−INE1 I Error amplifier (Error Amp1) inverted input terminal.
9 OUTC2 O Charge current detection amplifier (Current Amp2) output terminal.
10 + INC2 I Charge current detection amplifier (Current Amp2) input terminal.
11 −INC2 I Charge current detection amplifier (Current Amp2) and low input voltage
detection comparator (UV Comp.) input terminal.
12 + INE2 I Error amplifier (Error Amp2) non-inverted input terminal.
13 − INE2 I Error amplifier (Error Amp2) inverted input terminal.
14 FB123 O Error amplifier (Error Amp1, 2, 3) output terminal.
15 −INE3 I Error amplifier (Error Amp3) inverted input terminal.
16 OUTD O
This terminal is set to Hi-Z to prevent loss of current through the output
voltage setting resistor when IC is standby mode.
OUTD = Hi-Z when CTL = L
OUTD = L when CTL = H
17 CS ⎯Soft-start capacitor connection terminal.
18 RT ⎯Triangular wave oscillation frequency setting resistor connection terminal.
19 VREF O Reference voltage output terminal.
20 GND ⎯Ground terminal.
21 CTL I Power supply control terminal for DC/DC converter block.
22 XACOK O
AC adapter voltage detection block (AC Comp.) output terminal.
XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,
XACOK = Hi-Z when CTL = L
23 PGND ⎯Ground terminal.
24 OUT-2 O External synchronous rectification side FET gate drive output terminal.
25 VB O Bias output terminal for output circuit.
26 VS ⎯External main side FET source conneciton terminal.
27 OUT-1 O External main side FET gate drive output terminal.
28 CB ⎯Boot strap capacitor connection terminal.
The capacitor is connected between the CB terminal and the VS terminal.
MB39A119
4DS04-27247-3E
■BLOCK DIAGRAM
GNDVREFRT
<CV Comp.>
<PWM Comp.>
+INC1
−INC1
+INC2
OUTC2
−INC2
−INE1
+INE1
−INE2
+INE2
FB123
−INE3
CS
OUTD
VCC
CB
PGND
OUT-2
CTL
VS
555
VREF
10 µA
<SOFT>
<Error Amp1>
<Current Amp1>
<AC Comp.>
2.0 V 2.6 V
<UV Comp.>
−INC2
(VO)
0.1 V
3.1 V
−2.5 V
−1.5 V
<Error Amp2>
2.6 V
0.3 V
+
−
Hi Side Only
VREF
DC/DC
ON/OFF
VCC
5.0 V
4.2 V
bias
CT
<Over Current Det.>
0.2 V
+INC2
−INC2
(Vo)
4.2 V
OUTC2
<Error Amp3>
<UVLO>
OUT-1
VB
CVM
XACOKACOKACIN
5.0 V
100 kΩ
4
3
2
8
7
13
9
11
12
14
10
16
15
17
27
24
26
23
21
18 19 20
25
28
1
6
22
5
+
−
+
−
×25
+
−+
−
+
−
−
+
+
−
×24.5 −
+
−
+
+
−
+
−
<REF>
<CTL>
<OSC>
Slope
Control
VCC-
UVLO
VB-
UVLO
VREF-
UVLO
VB Reg.
Off time
Control
Drive logic
H: UVLO, UV
release
Drv-1
Drv-2
<Current Amp2>
−
+<Synchronous Cnt.>
MB39A119
DS04-27247-3E 5
■ABSOLUTE MAXIMUM RATINGS
*1 : The packages are mounted on the dual-sided epoxy board (10 cm × 10cm) .
*2 : With connection of exposed pad and with thermal via.
*3 : With connection of exposed pad and without thermal via.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Condition Rating Unit
Min Max Unit
Power supply voltage VCC VCC terminal ⎯27 V
CB terminal input voltage VCB CB terminal ⎯32 V
Control input voltage VCTL CTL terminal ⎯27 V
Input voltage
VINE + INE1, + INE2, − INE1, − INE2,
− INE3 terminal ⎯VCC + 0.3 V
VINC1 + INC1, − INC1 terminal ⎯VCC + 0.3 V
VINC2 + INC2, − INC2 terminal ⎯20 V
OUTD terminal output voltage VOUTD OUTD terminal ⎯20 V
ACIN input voltage VACIN ACIN terminal ⎯VCC V
ACOK terminal output voltage VACOK ACOK terminal ⎯27 V
XACOK terminal output voltage VXACOK XACOK terminal ⎯27 V
CVM terminal output voltage VCVM CVM terminal ⎯27 V
Output current IOUT ⎯⎯60 mA
Power dissipation PDTa ≤ +25 °C⎯4400*1,*2
⎯1900*1,*3mW
Storage temperature TSTG ⎯−55 + 125 °C
MB39A119
6DS04-27247-3E
■RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VCC VCC terminal 8 ⎯25 V
CB terminal input voltage VCB CB terminal ⎯⎯30 V
Reference voltage output
current IREF VREF terminal −1⎯0mA
Bias output current IVB VB terminal −1⎯0mA
Input voltage
VINE + INE1, + INE2, − INE1,
− INE2, − INE3 terminal 0⎯5V
VINC1 + INC1, −INC1 terminal 7 ⎯VCC V
VINC2 + INC2, −INC2 terminal 0 ⎯19 V
Input voltage difference DVINC Current detection voltage range 0 ⎯140 mV
OUTD terminal output voltage VOUTD OUTD terminal 0 ⎯19 V
OUTD terminal output current IOUTD OUTD terminal 0 ⎯2mA
CTL terminal input voltage VCTL CTL terminal 0 ⎯25 V
ACIN input voltage VACIN ACIN terminal 0 ⎯VCC V
ACOK terminal output voltage VACOK ACOK terminal 0 ⎯25 V
XACOK terminal output
voltage VXACOK XACOK terminal 0 ⎯25 V
CVM terminal output voltage VCVM CVM terminal 0 ⎯25 V
Peak output current IOUT Duty ≤ 5 % (t=1/fOSC × Duty) −1200 ⎯+1200 mA
Oscillation frequency fOSC ⎯200 500 1000 kHz
Timing resistor RTRT terminal ⎯39 ⎯kΩ
Soft-start capacitor CSCS terminal ⎯0.22 ⎯µF
CB terminal capacitor CBCB terminal ⎯0.1 ⎯µF
Bias output capacitor CVB VB terminal ⎯1.0 ⎯µF
Reference voltage output
capacitor CREF VREF terminal ⎯0.1 1.0 µF
Operating ambient
temperature Ta ⎯−30 +25 +85 °C
MB39A119
DS04-27247-3E 7
■ELECTRICAL CHARACTERISTICS
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
* : Standard design value
(Continued)
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Reference
voltage
block
[REF]
Output voltage VREF1 19 Ta = +25 °C 4.963 5.000 5.037 V
VREF2 19 Ta = −10 °C to + 85 °C 4.95 5.00 5.05 V
Input stability Line 19 VCC = 8 V to 25 V ⎯110mV
Load stability Load 19 VREF = 0 mA to −1 mA ⎯110mV
Short-circuit
output current Ios 19 VREF = 1 V −60 −30 −15 mA
Under
voltage
lockout
protection
circuit block
[UVLO]
Threshold voltage VTLH 1VCC ⎯7.5 7.9 V
VTHL 1VCC 7.07.4 ⎯V
Hysteresis width VH1VCC ⎯0.1 ⎯V
Threshold voltage VTLH 25 VB 3.8 4.0 4.2 V
VTHL 25 VB 3.1 3.3 3.5 V
Hysteresis width VH25 VB ⎯0.7 ⎯V
Threshold voltage VTLH 19 VREF 2.5 2.7 2.9 V
VTHL 19 VREF 2.3 2.5 2.7 V
Hysteresis width VH19 VREF ⎯0.2 ⎯V
Soft-start
block
[SOFT]
Charge current ICs17 ⎯−14 −10 −6µA
Triangular
wave
oscillator
block
[OSC]
Oscillation
frequency fosc 27 RT = 39 kΩ450 500 550 kHz
Frequency
temperature
stability
∆f/fdt 27 Ta = −30 °C to + 85 °C⎯1* ⎯%
Error
amplifier
block
[Error
Amp1]
Input offset
voltage VIO 7, 8 ⎯⎯15mV
Input bias current IB7, 8 ⎯−50 −15 ⎯nA
Voltage gain AV7, 8, 14 DC ⎯100* ⎯dB
Frequency
bandwidth BW 7, 8, 14 AV = 0 dB ⎯1.2* ⎯MHz
Output voltage VFBH 14 ⎯2.9 3.1 ⎯V
VFBL 14 ⎯⎯0.8 0.9 V
Output source
current ISOURCE 14 FB123 = 2 V ⎯−60 −30 µA
Output sink
current ISINK 14 FB123 = 2 V 2.0 4.0 ⎯mA
MB39A119
8DS04-27247-3E
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
* : Standard design value
(Continued)
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Error
amplifier
block
[Error
Amp2]
Input offset voltage VIO 12, 13 ⎯⎯15mV
Input bias current IB12, 13 ⎯−50 −15 ⎯nA
Voltage gain AV12, 13,
14 DC ⎯100* ⎯dB
Frequency bandwidth BW 12, 13,
14 AV = 0dB ⎯1.2* ⎯MHz
Output voltage VFBH 14 ⎯2.9 3.1 ⎯V
VFBL 14 ⎯⎯0.8 0.9 V
Output source current ISOURCE 14 FB123 = 2 V ⎯−60 −30 µA
Output sink current ISINK 14 FB123 = 2 V 2.0 4.0 ⎯mA
Error
amplifier
block
[Error
Amp3]
Threshold voltage
VTH1 14, 15 FB123 = 2 V 4.179 4.200 4.221 V
VTH2 14, 15 FB123 = 2 V,
Ta = −10 °C to + 85 °C4.169 4.200 4.231 V
Voltage gain AV14, 15 DC ⎯100* ⎯dB
Frequency bandwidth BW 14, 15 AV = 0 dB ⎯1.2* ⎯MHz
Output voltage VFBH 14 ⎯2.9 3.1 ⎯V
VFBL 14 ⎯⎯0.8 0.9 V
Output source current ISOURCE 14 FB123 = 2 V ⎯−60 −30 µA
Output sink current ISINK 14 FB123 = 2 V 2.0 4.0 ⎯mA
OUTD terminal leak
current ILEAK 16 OUTD = 19 V ⎯01µA
OUTD terminal output
ON resistance RON 16 OUTD = 1 mA ⎯35 50 Ω
Current
detection
amplifier
block
[Current
Amp1]
Current detection
voltage
VOUTC1 8 + INC1 = − INC1 = 7 V to 19 V,
∆VIN = 100 mV 2.425 2.5 2.575 V
VOUTC2 8 + INC1 = − INC1 = 7 V to 19 V,
∆VIN = 20 mV 0.425 0.5 0.575 V
Voltage gain AV2, 3, 8 + INC1 = − INC1 = 7 V to 19 V,
∆VIN = 100 mV 24.25 25 25.75 V/V
Input offset voltage VIO 2, 3, 8 + INC1 = − INC1 = 7 V to 19 V −3⎯+3mV
Input current
IINC1 2, 3 + INC1 = − INC1 = 7 V to 19 V ⎯20 30 µA
IINC2 2, 3 + INC1 = − INC1 = 7 V to 19 V,
CTL = 0 V ⎯01µA
Frequency bandwidth BW 2, 3, 8 AV = 0 dB ⎯3.0* ⎯MHz
Output voltage VOUTCH 8⎯3.7 4.0 ⎯V
VOUTCL 8⎯⎯0.04 0.2 V
Output source current ISOURCE 8-INE1 = 2 V ⎯−1.2 −0.6 mA
Output sink current ISINK 8-INE1 = 2 V 100 200 ⎯µA
MB39A119
DS04-27247-3E 9
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
* : Standard design value
(Continued)
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Current
detection
amplifier
block
[Current
Amp2]
Current detection
voltage
VOUTC1 9 + INC2 = − INC2 = 3 V to 19 V,
∆VIN = 100 mV 2.38 2.48 2.58 V
VOUTC2 9 + INC2 = − INC2 = 3 V to 19 V,
∆VIN = 20 mV 0.44 0.52 0.60 V
VOUTC3 9 + INC2 = − INC2 = 0 V to 3 V,
∆VIN = 100 mV 2.24 2.45 2.66 V
VOUTC4 9 + INC2 = − INC2 = 0 V to 3 V,
∆VIN = 20 mV 0.30 0.5 0.70 V
Voltage gain AV9, 10, 11 + INC2 = − INC2 = 3 V to 19 V,
∆VIN = 100 mV 23.76 24.5 25.24 V/V
Input offset voltage VIO 9, 10, 11 + INC2 = − INC2 = 3 V to 19 V −1.5 +1.5 +4.5 mV
Input current
I+INCH 10 + INC2 = − INC2 = 3 V to 19 V,
∆VIN = 100 mV ⎯30 45 µA
I−INCH 11 + INC2 = − INC2 = 3 V to 19 V,
∆VIN = 100 mV ⎯0.1* ⎯µA
IINCL 10, 11 + INC2 = − INC2 = 0 V −300 −200 ⎯µA
Frequency
bandwidth BW 9, 10, 11 AV = 0 dB ⎯3.0* ⎯MHz
Output voltage VOUTCH 9⎯3.9 4.2 ⎯V
VOUTCL 9⎯⎯0.04 0.2 V
Output source
current ISOURCE 9 OUTC2 = 2 V ⎯−1.2 −0.6 mA
Output sink current ISINK 9 OUTC2 = 2 V 100 200 ⎯µA
PWM
compara-
tor block
[PWM
Comp.]
Threshold voltage
VTL 14 Duty cycle = 0%⎯1.5 ⎯V
VTH 14 Duty cycle = 100%⎯2.5 ⎯V
Output
block
[Drv-1, 2]
Output ON
resistance
ROH 24, 27 OUT-1, OUT-2 = −100 mA ⎯47Ω
ROL 24, 27 OUT-1, OUT-2 = 100 mA ⎯13.5Ω
Under
input
voltage
detection
compara-
tor block
[UV
Comp.]
Threshold voltage VTLH 11 −INC2 = 12.6 V 12.6 12.8 13.0 V
VTHL 11 −INC2 = 12.6 V 12.5 12.7 12.9 V
Hysteresis width VH11 ⎯⎯0.1 ⎯V
MB39A119
10 DS04-27247-3E
(Continued)
(VCC = 19 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
* : Standard design value
Parameter Symbol Pin No. Conditions Value Unit
Min Typ Max
Overcurrent
detection
block
[Over
Current Det.]
Threshold voltage VTLH 11 −INC2 = 12.6 V 12.75 12.8 12.85 V
AC adapter
voltage
detection
block
[AC Comp.]
Threshold voltage VTLH 4⎯2.056 2.12 2.184 V
VTHL 4⎯1.959 2.02 2.081 V
Hysteresis width VH4⎯⎯0.1 ⎯V
ACOK terminal
output leak current ILEAK 5ACOK = 25 V ⎯01µA
ACOK terminal
output ON resistance RON 5ACOK = 1 mA ⎯200 400 Ω
XACOK terminal
output leak current ILEAK 22 XACOK = 25 V ⎯01µA
XACOK terminal
output ON resistance RON 22 XACOK = 1 mA ⎯200 400 Ω
Constant
voltage
control state
detection
block
[CV Comp.]
Threshold voltage VTLH 14 ⎯⎯2.7* ⎯V
VTHL 14 ⎯⎯2.6* ⎯V
Hysteresis width VH14 ⎯⎯0.1* ⎯V
CVM terminal
output leak current ILEAK 6CVM = 25 V ⎯01µA
CVM terminal
output ON resistance RON 6CVM = 1 mA ⎯200 400 Ω
Synchronous
rectification
control block
[Synchronous
Cnt.]
CS threshold
voltage
VTLH 17 ⎯2.55 2.6 2.65 V
VTHL 17 ⎯2.50 2.55 2.60 V
Hysteresis width VH17 ⎯⎯0.05 ⎯V
Light load detection
threshold voltage
VTLH 9⎯0.35 0.4 0.45 V
VTHL 9⎯0.25 0.3 0.35 V
Hysteresis width VH9⎯⎯0.1 ⎯V
Bias voltage
block
[VB]
Output voltage VB25 ⎯4.9 5.0 5.1 V
Load stability Load 25 VB = 0 mA to − 10 mA ⎯10 50 mV
Control block
[CTL]
CTL
input voltage
VON 21 IC operating state 2 ⎯25 V
VOFF 21 IC standby state 0 ⎯0.8 V
Input current ICTLH 21 CTL = 5 V ⎯25 40 µA
ICTLL 21 CTL = 0 V ⎯01µA
General Standby current ICCS 1CTL = 0 V ⎯010µA
Power supply current ICC 1CTL = 5 V ⎯1.9 2.9 mA
MB39A119
DS04-27247-3E 11
■TYPICAL CHARACTERISTICS
(Continued)
6
0 5 10 15 20 25
0
1
3
2
4
5
Ta = +25 °C
CTL = 5 V
6
0 5 10 15 20 25
0
1
3
2
4
5
Ta = +25 °C
CTL = 5 V
VREF = 0 mA
6
5
4
3
2
1
0
0 5 10 15 30 35
20 25
Ta = +25 °C
VCC = 19 V
CTL = 5 V
5.08
−40 −20 20 40 80 100
4.92
4.94
4.98
4.96
5.02
5.06 VCC = 19 V
CTL = 5 V
5.00
5.04
600
1000
0 5 10 15 25
0
200
400
300
600
800
500
700
20
900
100
Ta = +25 °C
VCC = 19 V
VREF = 0 mA
10
0
2
4
3
6
8
5
7
9
1
VREF
ICTL
4.25
−40 −20 20 40 80 100
4.15
4.17
4.19
4.18
4.21
4.23
VCC = 19 V
CTL = 5 V
4.20
4.22
600
4.24
4.16
Power supply current ICC (mA)
Power supply voltage VCC (V)
Power Supply Current vs. Power Supply Voltage
Reference voltage VREF (V)
Power supply voltage VCC (V)
Reference Voltage vs. Power Supply Voltage
Load current IREF (mA)
Reference Voltage vs. Load Current
Reference voltage VREF (V)
Operating ambient temperature Ta ( °C)
Reference Voltage vs. Operating Ambient Temperature
Reference voltage VREF (V)
CTL terminal voltage VCTL (V)
CTL Terminal Current, Reference Voltage vs.
CTL Terminal Voltage
CTL terminal current ICTL (µA)
Error amplifier threshold voltage
VTH (V)
Operating ambient temperature Ta ( °C)
Error Amplifier Threshold Voltage vs.
Operating Ambient Temperature
Reference voltage VREF (V)
MB39A119
12 DS04-27247-3E
(Continued)
580
−40 6020 40 80 100
420
440
500
480
540
560 VCC = 19 V
CTL = 5 V
RT = 39 kΩ
520
460
−20 0
14
8
7
Error Amp1
(Error Amp2)
(13)
(12)
IN
OUT
10 kΩ
10 kΩ
2.4 kΩ
240 kΩ
1 µF
10 kΩ
10 kΩ
4.2 V
VCC = 19 V
−
+
+
14
15
Error Amp3
IN
OUT
10 kΩ
10 kΩ
2.4 kΩ
240 kΩ
1 µF
VCC = 19 V
4.2 V
−
+
+
10000
1 100 1000
100
1000
10
Ta = +25 °C
VCC = 15 V
CTL = 5 V
50
100 1M100k 10M
−50
−40
0
−10
20
40
10
−30
1k 10k
30
−20
225
−225
−180
0
−45
90
180
45
−135
135
−90
Ta = +25 °C
φ
Av
50
100 1M100k 10M
−50
−40
0
−10
20
40
10
−30
1k 10k
30
−20
225
−225
−180
0
−45
90
180
45
−135
135
−90
Ta = +25 °C
φ
Av
Triangular wave oscillation
frequency fOSC (kHz)
Operating ambient temperature Ta ( °C)
Triangular Wave Oscillation Frequency vs.
Operating Ambient Temperature
Gain AV (dB)
Frequency f (Hz)
Error Amplifier Gain, Phase vs. Frequency (ERR1, 2)
Phase φ (degree)
Gain AV (dB)
Frequency f (Hz)
Error Amplifier Gain, Phase vs. Frequency (ERR3)
Phase φ (degree)
Triangular wave oscillation
frequency fOSC (kHz)
Timing Resistor RT (kΩ)
Triangular Wave Oscillation Frequency vs.
Timing Resistor
MB39A119
DS04-27247-3E 13
(Continued)
8
Current Amp1
OUT
+INC1
19 V
VCC = 19 V
18.95 V
−
+
3
2
−INC1
−INE1
× 25
9
Current Amp2
OUT
+INC2
12.6 V
VCC = 19 V
12.55 V
−
+
10
11
−INC2
OUTC2
× 24.5
50.0
1M100k 10M
−50.0
−40.0
0.0
−10.0
20.0
40.0
10.0
−30.0
1k 10k
30.0
−20.0
225
−225
−180
0
−45
90
180
45
−135
135
−90
Ta = +25 °C
φ
Av
50.0
1M100k 10M
−50.0
−40.0
0.0
−10.0
20.0
40.0
10.0
−30.0
1k 10k
30.0
−20.0
225
−225
−180
0
−45
90
180
45
−135
135
−90
Ta = +25 °C
φ
Av
5000
5025 100
0
2000
1500
3000
4000
2500
500
0
3500
1000
−25−50 75
4500
125
4400
1900
QFN-24 (with thermal via)
QFN-24
(without thermal via)
Gain AV (dB)
Frequency f (Hz)
Current Detection Amplifier Gain, Phase vs. Frequency
Phase φ (degree)
Gain AV (dB)
Frequency f (Hz)
Current Detection Amplifier Gain, Phase vs. Frequency
Phase φ (degree)
Power dissipation PD (mW)
Operating ambient temperature Ta ( °C)
Power Dissipation vs. Operating Ambient Temperature
MB39A119
14 DS04-27247-3E
■FUNCTION DESCRIPTION
1. DC/DC Converter Block
(1) Reference voltage block (REF)
The reference voltage circuit uses the voltage supplied from the VCC terminal (pin 1) to generate a temperature
compensated, stable voltage (5.0 V Typ) used as the reference power supply voltage for the IC’s internal circuitry.
This block can also be used to obtain a load current to a maximum of 1 mA from the reference voltage VREF
terminal (pin 19) .
(2) Triangular wave oscillator block (OSC)
The triangular wave oscillator block has built-in capacitor for frequency setting and generates the triangular wave
oscillation waveform by connecting the triangular wave oscillation frequency setting resistor with the RT terminal
(pin 17) .
The triangular wave is input to the PWM comparator circuits on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detects the output signal from the current detection amplifier (Current Amp1) , compares this to
the +INE1 terminal (pin 7) , and outputs a PWM control signal to be used in controlling the charge current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB123 terminal (pin 14) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier detects the output signal from the current detection amplifier (Current Amp2) , compares this to
the +INE2 terminal (pin 12) , and outputs a PWM control signal to be used in controlling the charge current.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
FB123 terminal (pin 14) and -INE2 terminal (pin 13) , providing stable phase compensation to the system.
(5) Error amplifier block (Error Amp3)
This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM
control signal. External output voltage setting resistors can be connected to the error amplifier inverted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB123
terminal (pin 14) to the -INE3 terminal (pin 15) of the error amplifier, enabling stable phase compensation to the
system.
(6) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the
output sense resistor (RS2) due to the flow of the AC adapter current, using the +INC1 terminal (pin 3) and -INC1
terminal (pin 2) . The AC adapter current control signal is amplified to 25 times and output to the inverse input
terminal of Error Amp1 through the internal 100 kΩ.
This amplifier cannot use for detecting the charge current.
(7) Current detection amplifier block (Current Amp2)
The current detection amplifier (Current Amp2) detects a voltage drop which occurs between both ends of the
output sense resistor (RS1) due to the flow of the charge current, using the +INC2 terminal (pin 10) and -INC2
terminal (pin 11) . The signal amplified to 24.5 times is output to the OUTC2 terminal (pin 9) .
(8) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PWM comparator circuit compares with either of low voltages between the triangular wave voltage generated
by the triangular wave oscillator and the error amplifier output voltage, turns on the main side output transistor
MB39A119
DS04-27247-3E 15
and turns off on the synchronous rectification side output transistor, during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
(9) Output block (Drv-1, 2)
The output circuit uses a CMOS configuration capable of driving an external N-ch MOS FET both main side and
synchronous rectification side.
(10) Control block (CTL)
Setting the CTL terminal (pin 21) “L” level places in the standby mode.
CTL function table
(11) Bias voltage block (VB)
Bias voltage block outputs 5 V (Typ) for the power supply of the output circuit and for setting the bootstrap voltage.
(12) Off time control block (Off time Control)
When MB39A119 operates by high on-duty, voltage difference of both ends of boot strap capacitor CB is
decreasing gradually. In such the case, off time control block charges with CB by compulsorily generating off
time (0.3 µs Typ) .
(13) Overcurrent detection block (Over Current Det.)
Overcurrent detection block detects the 0.2 V (Typ) or more potential difference between +INC2 terminal (pin
10) and -INC2 terminal (pin 11) . When excessive current flows to the charge direction due to load-sudden
change, it determines the overcurrent, makes CS terminal (pin 17) “L” level, and makes the on duty 0 %. After
finishing the overcurrent, MB39A119 restarts with the soft-start operation.
(14) Synchronous rectification control block (Synchronous Cnt.)
CS terminal (pin 17) and 2.6 V (Typ) are compared. Output OUT-2 terminal (pin 24) for synchronous rectification
side FET drive in the soft-start is fixed at “L” level.
Output OUTC2 terminal of current detection amplifier block (Current Amp2) (pin 9) and 0.3 V (Typ) are compared,
and output OUT-2 terminal (pin 24) for synchronous rectification side FET drive is fixed at “L” level at light-load.
CTL Power OUTD
L OFF (Standby) Hi-Z
HON (Active) L
MB39A119
16 DS04-27247-3E
2. Protection Function
(1) Under voltage lockout protection circuit block (VREF-UVLO)
A momentary decrease in internal reference voltage (VREF) may cause malfunctions in the control IC, resulting
in breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects internal reference voltage drop
and fixes the OUT-1 terminal (pin 27) and the OUT-2 terminal (pin 24) to the “L” level. The system restores
voltage supply when the internal reference voltage reaches the threshold voltage of the under voltage lockout
protection circuit.
Protection circuit (VREF-UVLO) operation function table
When UVLO is operating (VREF voltage is lower than UVLO threshold voltage) , the logic of the following terminal
is fixed.
(2) Under voltage lockout protection circuit block (VCC-UVLO, VB-UVLO)
The transient state or a momentary decrease in power supply voltage, which occurs when the bias voltage (VB)
for output circuit is turned on, may cause malfunctions in the control IC, resulting in breakdown or degradation
of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a bias voltage drop and fixes
the OUT-1 terminal (pin 27) and the OUT-2 terminal (pin 24) to the “L” level. The system restores voltage supply
when the power supply voltage or internal reference voltage reaches the threshold voltage of the under voltage
lockout protection circuit.
Protection circuit (VCC-UVLO, VB-UVLO) operation function table
When UVLO is operating (VCC voltage or VB voltage is lower than UVLO threshold voltage) , the logic of the
following terminal is fixed.
(3) Under input voltage detection comparator block (UV Comp.)
VCC terminal (pin 1) voltage and -INC2 terminal (pin 11) voltage are compared, and VCC voltage is lower than
the battery voltage +0.1 V (Typ) and fixes the OUT-1 terminal (pin 27) and OUT-2 terminal (pin 24) to the “L” level.
The system restores voltage supply when the input voltage reaches the threshold voltage of the under input
voltage detection comparator.
Protection circuit (UV Comp.) operation function table
When under input voltage is detected (Input voltage is lower than UV Comp. threshold voltage) , the logic of the
following terminal is fixed.
OUTD OUT-1 OUT-2 CS VB
Hi-Z L L L L
OUT-1 OUT-2 CS
LLL
OUT-1 OUT-2 CS
LLL
MB39A119
DS04-27247-3E 17
3. Detection Functions
(1) AC adapter voltage detection block (AC Comp.)
When ACIN terminal (pin 4) voltage is lower than 2.0 V (Typ) , AC adapter voltage detection block (AC Comp.)
outputs “Hi-Z” level to the ACOK terminal (pin 5) and outputs “L” level to the XACOK terminal (pin 22) . When
CTL terminal (pin 21) is set to “L” level, ACOK terminal (pin 5) and XACOK terminal (pin 22) are fixed to “Hi-Z” level.
AC adapter detection function table
The logic of the following terminal is fixed according to the connection state of the AC adapter.
(2) Constant voltage control state detection block (CV Comp.)
When CV Comp. detects that the FB123 terminal (pin 14) voltage of the error amplifier (Error Amp3) output
terminal becomes 2.6 V (Typ) or less, “L” level is output to constant voltage control state detection block output
terminal CVM terminal (pin 6) .
Charge control state function table
ACIN ACOK XACOK
HLHi-Z
LHi-ZL
Error Amp3 output (FB123) CVM Status
> 2.6 V Hi-Z Constant current control
≤ 2.6 V L Constant voltage control
MB39A119
18 DS04-27247-3E
■CONSTANT CHARGING VOLTAGE AND CURRENT OPERATION
The MB39A119 is DC/DC converter IC with the pulse width modulation method (PWM method) .
In the output voltage control loop, the output voltage of the DC/DC converter is detected, and the Error Amp3
compares internal reference voltage 4.2 V and DC/DC converter output to output the PWM controlled signal.
In the charging current control loop, the voltage drop generated at both ends of charging current sense resistor
(RS1) is sensed by +INC2 terminal (pin 10) , -INC2 terminal (pin 11) of Current Amp2, and the signal is output
to OUTC2 terminal (pin 9) , which is amplified by 24.5 times. Error Amp2 compares the OUTC2 terminal (pin 9)
voltage, which is the output of Current Amp2, and +INE2 terminal (pin 12) to output the PWM control signal,
and it regulates the charging current.
In AC adapter current control loop, the voltage drop generated at both ends of AC adapter current sense resistor
(RS2) is sensed by +INC1 terminal (pin 3) , -INC1 terminal (pin 2) of Current Amp1, and the signal is output to
-INE1 terminal (pin 8) , which is amplified by 25 times. Error Amp1 compares -INE1 terminal (pin 8) voltage,
which is output of Current Amp1, and +INE1 terminal (pin 7) to output PWM controlled signal, and it limits the
charging current due to the AC adapter current not to exceed the setting value.
The PWM comparator compares the triangular wave to the smallest terminal voltage among the Error Amplifier
output voltage (Error Amp1 to Error Amp3) . And the triangular wave voltage generated by the triangular wave
oscillator. When the triangular wave voltage is smaller than the error amplifier output voltage, the main side
output transistor is turned on and the synchronous rectification side output transistor is turned off.
MB39A119
DS04-27247-3E 19
■SETTING THE CHARGE VOLTAGE
The charge voltage (DC/DC output voltage) can be set by connecting external output voltage setting resistors
(R1 and R2) to the -INE3 terminal (pin 15) . Be sure to select a resistor value that allows you to ignore the on-
resistance (35 Ω at 1 mA) of internal FET connected to the OUTD terminal (pin 16).
■SETTING THE CHARGE CURRENT
The charge current value can be set at the analog voltage value of the +INE2 terminal (pin 12) .
It is recommended that the filter should be connected to an input terminal of Current Amp2 as shown below in order
to reduce the switching noise and increase the charge current accuracy.
Charge current formula : Ichg (A) = + INE2 (V)
24.5 × RS1 (Ω)
Battery charge current setting voltage : + INE2
+ INE2 (V) = 24.5 × Ichg (A) × RS1 (Ω)
Battery charge voltage : VO
VO (V) = R1 + R2 × − INE3 (V)
R2
−
+
16
15
OUTD
−INE3
BVO
<Error Amp3>
4.2 V
R1
R2
−
+
+INC2
Ichg
<Current Amp2>
× 24.5
RS1
0.22
µF0.22
µF
−INC2
10 Ω10 Ω
10
11
MB39A119
20 DS04-27247-3E
■SETTING THE INPUT CURRENT
The input limit current value can be set at the analog voltage value of the +INE1 terminal (pin 7) .
■SETTING THE OVERCURRENT DETECTION VALUE
The overcurrent is detected when the voltage difference is more than 0.2 V (Typ) between +INE2 terminal (pin
10) voltage and -INE2 terminal (pin 11) voltage.
Charge current and overcurrent detection value by RS1 value (example)
■SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected to the RT terminal
(pin 18) .
Input current formula : IIN (A) = + INE1 (V)
25 × RS2 (Ω)
Input current setting voltage : + INE1
+ INE1 (V) = 25 × IIN (A) × RS2 (Ω)
Charge overcurrent detection value : Iocdet (A) = 0.2 (V)
RS1 (Ω)
RS1 +INE2 Ichg OCDet
33 mΩ0.5 V to 3.5 V 0.6 A to 4.2 A 6 A
15 mΩ0.5 V to 3.5 V 1.3 A to 9.3 A 13 A
Triangular wave oscillation frequency : fOSC
fosc (kHz) := 19500
RT (kΩ)
MB39A119
DS04-27247-3E 21
■SETTING THE SOFT-START TIME
To prevent rush current at start-up of IC, the soft-start time can be set by connecting soft-start capacitor (CS) to
the CS terminal (pin 17) .
When the CTL terminal (pin 21) is set to “H” level and IC is started (VCC ≥ UVLO threshold voltage) , external
soft-start capacitor (CS) connected to the CS terminal (pin 17) is charged at 10 µA.
ON duty depends PWN comparator output, which compares the FB123 terminal (pin 14) voltage and the trian-
gular wave oscillator output voltage.
During soft-start, FB123 terminal (pin14) voltage increases with sum voltage of CS terminal (pin 17) and diode
voltage. Therefore, the output voltage of the DC/DC converter and current increase can be set by output ON
duty in proportion to rise of the CS terminal (pin 17) voltage. The ON duty is affected by the ramp voltage of
FB123 terminal (pin 14) until an output voltage of one Error Amp reaches the DC/DC converter loop controlled
voltage.
Soft-start time is obtained from the following formula. :
Soft-start time : tS (time to output on duty 80 %)
ts (s) := 0.13 × CS (µF)
VO
0 v
IO
0 A
CT
0 v
FB123
CS
0 v
OUT-1
VO
IO
OUT-1
FB123
CT
CS
Error Amp3 threshold voltage
• Soft-start timing chart
MB39A119
22 DS04-27247-3E
■TRANSIENT RESPONSE AT LOAD-STEP
The constant voltage control loop and the constant current control loop are independent. With the load-step,
these two control loops change.
The battery voltage and current overshoot are generated by the delay time of the control loop when the mode
changes. The delay time is determined by phase compensation constant. When the battery is removed if the
charge control is switched from the constant current control to the constant voltage control, and the charging
voltage does overshoot by generating the period controlled with high duty by output setting voltage. The excessive
voltage is not applied to the battery because the battery is not connected.
When the battery is connected if the charge control is switched from the constant voltage control to the constant
current control, and the charging current does overshoot by generating the period controlled with high duty by
output setting voltage.
The battery pack manufacturer in Japan thinks not the problem the current overshoot of 10ms or less.
Constant Voltage
Error Amp3 Output
Constant Current
Battery Voltage
Error Amp2 Output
Battery Current
Constant Current
Error Amp2 Output Error Amp3 Output
When charge control switches from the
constant current control to the constant
voltage control, the voltage does
overshoot by generating the period
controlled with high duty by output
setting voltage. The battery pack manufacturer in
Japan thinks not the problem the
current overshoot of 10ms or
less.
• Operation at step-load
MB39A119
DS04-27247-3E 23
■AC ADAPTER DETECTION FUNCTION
When ACIN terminal (pin 4) voltage is lower than 2.0 V (Typ) , AC adapter voltage detection block (AC Comp.)
outputs “Hi-Z” level to the ACOK terminal (pin 5) and outputs “L” level to the XACOK terminal (pin 22) . When
CTL terminal (pin 21) is set to “L” level, ACOK terminal (pin 5) and XACOK terminal (pin 22) are fixed to
“Hi-Z” level.
(1) AC adapter presence
The presence of AC adapter can be easily detected because the signal is output from the ACOK terminal (pin
5) to microcomputer etc.
In this case, if CTL terminal (pin 21) is set in “L” level, IC become the standby state (ICC = 0 µA Typ) .
<AC Comp.>
AC adapter
ACIN ACOK XACOK
Micon
−
+
4522
• Connection example of detecting AC adapter presence
MB39A119
24 DS04-27247-3E
(2) Automatic changing system power supply between AC adapter and battery
The AC adapter voltage is detected, and the external switch at input side and battery side is changed automat-
ically with the connection as follows. Connect CTL terminal (pin 21) to VCC terminal (pin 1) for this function.
OFF duty cycle becomes 100 % when CS terminal (pin 17) voltage is made to be 0 V, if it is needed after full
charge.
(3) Battery selector function
When control signal from microcomputer etc. is input to ACIN terminal (pin 4) below, ACOK terminal (pin 5)
output voltage and XACOK terminal (pin 22) output voltage are controlled to select one of the two batteries for
charge. Connect CTL terminal (pin 21) to VCC terminal (pin 1) for this function. OFF duty cycle becomes 100
% when CS terminal (pin 17) voltage is made to be 0 V, if it is needed after full charge.
<AC Comp.>
ACIN ACOK XACOK
−
+
Micon
VREF
10 µA
CTL
CS
<SOFT>
VCC
AC adapter
Micon
System
Battery
4522
1
21
17
• Connection example of automatic changing system power supply between AC adapter and battery
<AC Comp.>
ACIN ACOK XACOK
−
+
VREF
10 µA
CTL
CS
<SOFT>
VCC
AC
adapter
Micon
System
Battery1 Battery2
RS1
Ichg
AB
4522
1
21
17
• Connection example of battery selector function
MB39A119
DS04-27247-3E 25
■PHASE COMPENSATION
Circuit example of phase compensation is shown below.
<Error Amp3>
−
+
VIN
−
+
<PWM Comp.>
VCC
<OUT> OUT
VH
(VCC-6V)
VH
OSC
Bias
Voltage
ESR
FB123
Rc
Cc 4.2 V
Co
Rin2
Rin1
Ro
VBATT
l1
RL
Lo
RS2
15 mΩ
RS1
33 mΩ
−INE3
−2.5 V
−1.5 V
Drive
• Circuit example of phase compensation
Lo : Inductance
RL : Equivalent series resistance of inductance
Co : Capacity of condenser
ESR : Equivalent series resistance of condenser
Ro : Load resistance
11M100k 10M1k 10k
180
−160
−120
0
60
140
20
−80
100
−40
Phase
Gain
gain
phase
160
−180
−140
−20
40
120
−100
80
−60
90
−80
−60
0
30
70
10
−40
50
−20
80
−90
−70
−10
20
60
−50
40
−30
10010
f1 (Hz) = 1
2πLo × Co × (Ro + ESR)
(Ro + RL)
Lo = 15 µH
Co = 14.1 µF
Ro = 4.2 Ω
RL = 30 mΩ
ESR = 100 mΩ
Frequency [Hz]
Phase [deg]
Gain [dB]
Frequency characteristic of power output LC filter
(DC gain is included.) Cut-off frequency
• Method to obtain frequency characteristic of LC filter
MB39A119
26 DS04-27247-3E
Note1) Review frequency characteristic of Error Amp when LC filter constant is changed.
Note2) When the ceramic capacitor is used as smoothing capacitor CO, phase margin is reduced because ESR
of the ceramic capacitor is extremely small as frequency characteristic of LC filter at low ESR.
Therefore, change phase compensation of Error Amp or create resistance equivalent to ESR using pattern.
11M100k1k 10k
180
−160
−120
0
60
140
20
−80
100
−40
160
−180
−140
−20
40
120
−100
80
−60
90
−80
−60
0
30
70
10
−40
50
−20
80
−90
−70
−10
20
60
−50
40
−30
10010
Gain
total gain
AMP Open
Loop Gain
total phase
Phase
f2 (Hz) = 1
2π × Rc × Cc
Rc = 150 kΩ
Cc = 3300 pF
Frequency [Hz]
Phase [deg]
Gain [dB]
Total frequency characteristic Cut-off frequency
• Method to obtain frequency characteristic of Error Amp
11M100k1k 10k
180
−160
−120
0
60
140
20
−80
100
−40
160
−180
−140
−20
40
120
−100
80
−60
90
−80
−60
0
30
70
10
−40
50
−20
80
−90
−70
−10
20
60
−50
40
−30
10010
Phase
Gain
total gain
AMP Open Loop
Gain
total phase
Triangular wave oscillation frequency.
Frequency [Hz]
Phase [deg]
Gain [dB]
Total frequency characteristic
The overview of frequency characteristic
for DC/DC converter can be obtained in
combination between LC filter and fre-
quency characteristic of Error Amp as
mentioned above.
Note the following point in order to stabi-
lize frequency characteristic of DC/DC
converter.
Cut-off frequency of DC/DC converter
should be set to half or less of the triangu-
lar wave oscillator frequency.
• Method to obtain frequency characteristic of DC/DC converter
1 10M100k1k 10k
180
−160
−120
0
60
140
20
−80
100
−40
160
−180
−140
−20
40
120
−100
80
−60
90
−80
−60
0
30
70
10
−40
50
−20
80
−90
−70
−10
20
60
−50
40
−30
10010
gain
phase
Gain
Phase
1M
f1 (Hz) = 1
2πLo × Co × (Ro + ESR)
(Ro + RL)
Lo = 15 µH
Co = 14.1 µF
Ro = 4.2 Ω
RL = 30 mΩ
ESR = 100 mΩ
Frequency [Hz]
Phase [deg]
Gain [dB]
Frequency characteristic of power output LC filter
(DC gain is included.) Cut-off frequency
• Method to obtain frequency characteristic of LC filter at low ESR
MB39A119
DS04-27247-3E 27
• 3Pole2Zero • Additional ESR
−
+
DC/DC output
Board Pattern
or connected
resistor
MB39A119
28 DS04-27247-3E
■PROCESSING WITHOUT USING OF THE CURRENT AMP1 AND AMP2
When Current Amp is not used, connect +INC1 terminal (pin 3) and −INC1 terminal (pin 2) to VCC terminal (pin
1) , connect +INC2 terminal (pin 10) and −INC2 terminal (pin 11) to VREF terminal (pin 19) , and then leave
OUTC2 terminal (pin 9) open.
■PROCESSING WITHOUT USING OF THE ERROR AMP1 AND AMP2
When Error Amp1 and Amp2 are not used, connect −INE1 terminal (pin 8) and −INE2 terminal (pin 13) to GND
(pin 20) , and connect +INE1 terminal (pin 7) and +INE2 terminal (pin 12) to VREF terminal (pin 19) .
10
+INC2
+INC1
−INC2
VCC
OUTC2
VREF
−INC1
2
11
1
9
19
3
“Open”
• Connection when Current Amp is not used
20
+INE2
+INE1
−INE2
VREF
GND
−INE1
7
13
8
12
19
• Connection when Error Amp is not used
MB39A119
DS04-27247-3E 29
■PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 17) open.
17
CS
“Open”
• Connection when no soft-start time is specified
MB39A119
30 DS04-27247-3E
■I/O EQUIVALENT CIRCUIT
(Continued)
+
−
1
20
VCC
GND
19 VREF
124.53
kΩ
41.47
kΩ
1.25 V
21CTL
132.4
kΩ
204
kΩ
GND
VB
GND
VCC
2.5 V
25
200 kΩ
200 kΩ
17 CS
VREF
(5.0 V)
GND
VCC
+
−
18 RT
VREF
(5.0 V)
VCC
GND
1.08 V
1MΩ
7
FB123
+INE1
8−INE1
GND
VCC
(3.1 V)
CS
14
12
FB123
+INE2
13−INE2
(3.1 V)
GND
VCC
15−INE3
(3.1 V)
GND
VCC
4.2 V FB123
• Reference voltage block
ESD protection
element
• Control block
• Soft-start block
• Triangular wave oscillator block • Error amplifier block (Error Amp1)
• Error amplifier block (Error Amp2) • Error amplifier block (Error Amp3)
• Bias voltage block
ESD protection
element
MB39A119
DS04-27247-3E 31
(Continued)
3+INC1
2 −INC1
GND
VCC
VREF
−INE1
20 kΩ
80 kΩ
100 kΩ10
+INC2
9
−INC2
OUTC2
GND
VCC
VREF
20 kΩ
80 kΩ
11
GND
VREF
CTL
FB123
GND
27 OUT-1
26
28 CB
VS
GND
OUT-2
24
PGND
23
VB
GND
OUTD
16
6CVM
FB123
VREF
(5.0 V)
GND
5XACOK
ACOK
VREF
(5.0 V)
GND
4
ACIN
22
• PWM comparator
block
• Output block
(Main side)
• AC adapter voltage detection block
• Constant voltage control state detection
block
• Invalidity current
prevention block
• Current detection amplifier block (Current Amp1) • Current detection amplifier block (Current Amp2)
• Output block (synchronous
rectification side)
MB39A119
32 DS04-27247-3E
■APPLICATION EXAMPLE
Battery
VREF
VO
<Over Current Det.>
CTL
OUT-1
<Error Amp3>
<UVLO>
OUT-2
C10
0.1µF
Output voltage (Battery
voltage) is adjustable.
Q1-1
VREF 2.6V
+INC1
−INC1
+INC2
OUTC2
OUTD
−INC2
−INE1
+INE1
+INE2
−INE3
FB123
−INE2
CS VCC
R2
PGND
−
+
−
+
−
+
×25
−
+
×24.5
−
+
−
+
−
+
Drv-1
Drv-2
−
+
−
+
VCC
UVLO
VB
UVLO
VREF
UVLO
Slope
Control
<OSC>
<REF> <CTL>
−2.5 V
−1.5 V
Off time
Control
Drive Logic
VB Reg.
Hi Side only
H: ULVO,UV
release
18 19 20
21
23
24
26
27
28
25
1
6
22
5
4
3
2
8
7
13
9
10
11
12
14
A
B
15
16
17
B
A
<SOFT>
<Sync Cnt.>
VREF
5.0V
DC/DC
ON/OFF
GND
R19
39kΩ
0.3V
OUTC2
CT
4.2V
bias
RT
10µA
0.2V
C9
0.22µF
4.2V
SW3
OFF
ON
ON
SW4
OFF
OFF
ON
lchg
4A
2A
0.4A
<Current
Amp2> <Error Amp2>
<Error Amp1>
100kΩ
C2
4.7
µ
F
C1
4.7
µ
F
Q1-2 D1
L1
5.2µH
15Ω
VS
VB
C6
0.1
µ
F
C7
1.0
µ
F
D4
CB lchg
5.0V
<CV Comp.>
2.6V
0.1V <UV Comp.>
<PWM Comp.>
3.1V
<Current Amp1>
<AC Comp.>
−INC2
(VO)
VIN
8V
~
25V
R21
24kΩ
R20
20kΩR17
10kΩ
C11 6800pF
C18
R33
10kΩ
R25 R26
9.1kΩ15kΩ
R18
33kΩ
R27
16k
Ω
R28
2k
Ω
R24
47k
Ω
R10
100kΩ
R8
300kΩ
C12 330pF
ACIN
R39
16kΩ
R40
75kΩ
R41
16kΩ
R15
24kΩ
RS2
R6
51kΩ
15mΩ
Q2-1 Q2-2
R34
100kΩ
CVM VCC
System
Q5
R46 56kΩ
R45
100k
Ω
C21
0.1µF
−INC2
(VO)
+INC2
ACOK XACOK
R32
100kΩ
C14 22pF
C13 22pF
−
+
2.0V
SW4 SW3
RS1
C8
0.1
µ
F
R51
10Ω
R52
10Ω
C22 0.22µF
C23
0.22µF
C3
4.7
µ
F
C5
4.7
µ
F
C4
4.7
µ
F
−
+
−
+
1500pF
33mΩ
MB39A119
DS04-27247-3E 33
■PARTS LIST
(Continued)
Component Item Specification Vendor Package Parts No.
M1 IC MB39A119 Fujitsu QFN-28P MB39A119QN-G
Q1-1, Q1-2 N-ch FET VDS = − 30 V, ID = 8 A (Max) NEC SO-8 µPA2752
Q2-1, Q2-2 P-ch FET VDS = − 30 V, ID = 8 A (Max) NEC SO-8 µPA1772
Q5 P-ch FET VDS = − 30 V, ID = 6 A (Max) TOSHIBA SO-8 TPC8102
D1 Diode VF = 0.35 V (Max) at IF = 0.5 A ROHM TUMD2 RSX051VA-30
D4 Diode VF = 0.4 V (Max) at IF = 0.3 A SANYO 1197A SBS006
L1 Inductor 5.2 µH, 22 mΩ, 5.5 A SUMIDA SMD CDRH104R-5R2
C1 Ceramic condenser 4.7 µF (25 V) TDK 3216 C3216JB1E475K
C2 Ceramic condenser 4.7 µF (25 V) TDK 3216 C3216JB1E475K
C3 Ceramic condenser 4.7 µF (25 V) TDK 3216 C3216JB1E475K
C4 Ceramic condenser 4.7 µF (25 V) TDK 3216 C3216JB1E475K
C5 Ceramic condenser 4.7 µF (25 V) TDK 3216 C3216JB1E475K
C6 Ceramic condenser 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C7 Ceramic condenser 1.0 µF (25 V) TDK 3216 C3216JB1E105K
C8 Ceramic condenser 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C9 Ceramic condenser 0.22 µF (25 V) TDK 1608 C1608JB1E224K
C10 Ceramic condenser 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C11 Ceramic condenser 6800 pF (50 V) TDK 1608 C1608JB1H682K
C12 Ceramic condenser 330 pF (50 V) TDK 1608 C1608CH1H331J
C13 Ceramic condenser 22 pF (50 V) TDK 1608 C1608CH1H220J
C14 Ceramic condenser 22 pF (50 V) TDK 1608 C1608CH1H220J
C18 Ceramic condenser 1500 pF (50 V) TDK 1608 C1608CH1H152J
C21 Ceramic condenser 0.1 µF (50 V) TDK 1608 C1608JB1H104K
C22 Ceramic condenser 0.22 µF (25 V) TDK 1608 C1608JB1E224K
C23 Ceramic condenser 0.22 µF (25 V) TDK 1608 C1608JB1E224K
RS1 Resistor 33 mΩKOA SL1 SL1TTE33L0D
RS2 Resistor 15 mΩKOA SL1 SL1TTE15L0D
R2 Resistor 15 Ωssm 1608 RR0816P150D
R6 Resistor 51 kΩssm 1608 RR0816P513D
R8 Resistor 300 kΩssm 1608 RR0816P304D
R10 Resistor 100 kΩssm 1608 RR0816P104D
R15 Resistor 24 kΩssm 1608 RR0816P243D
R17 Resistor 10 kΩssm 1608 RR0816P103D
R18 Resistor 33 kΩssm 1608 RR0816P333D
R19 Resistor 39 kΩssm 1608 RR0816P393D
R20 Resistor 20 kΩssm 1608 RR0816P203D
R21 Resistor 24 kΩssm 1608 RR0816P243D
R24 Resistor 47 kΩssm 1608 RR0816P473D
R25 Resistor 9.1 kΩssm 1608 RR0816P912D
R26 Resistor 15 kΩssm 1608 RR0816P153D
R27 Resistor 16 kΩssm 1608 RR0816P163D
MB39A119
34 DS04-27247-3E
(Continued)
Note : NEC : NEC corporation
TOSHIBA : TOSHIBA CORPORATION
ROHM : ROHM CO., LTD.
SUMIDA : Sumida Corporation
TDK : TDK Corporation
KOA : KOA Corporation
ssm : SUSUMU CO., LTD.
SANYO : SANYO Electric Co., Ltd.
Component Item Specification Vendor Package Parts No.
R28 Resistor 2 kΩssm 1608 RR0816P202D
R32 Resistor 100 kΩssm 1608 RR0816P104D
R33 Resistor 10 kΩssm 1608 RR0816P103D
R34 Resistor 100 kΩssm 1608 RR0816P104D
R39 Resistor 16 kΩssm 1608 RR0816P163D
R40 Resistor 75 kΩssm 1608 RR0816P753D
R41 Resistor 16 kΩssm 1608 RR0816P163D
R45 Resistor 100 kΩssm 1608 RR0816P104D
R46 Resistor 56 kΩssm 1608 RR0816P563D
R51 Resistor 10 Ωssm 1608 RR0816P100D
R52 Resistor 10 Ωssm 1608 RR0816P100D
MB39A119
DS04-27247-3E 35
■SELECTION OF COMPONENTS
• N-ch MOS FET
The N-ch MOS FET for switching use should be rated for at least +20% more than the input voltage. To minimize
continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage and high
frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this
application, the NEC µPA2752 is used. Continuity loss, on/off switching loss and total loss are determined by
the following formulas. The selection must ensure that peak drain current does not exceed rated values.
• Inductor
In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor,
but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous
operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value,
which will enable continuous operation under light loads. Note that if the inductance value is too high, however,
direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at
the point where efficiency is greatest.
Note also that the DC superimposition characteristics become worse as the load current value approaches the
rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing
loss of efficiency. The selection of rated current value and inductance value will vary depending on where the
point of peak efficiency lies with respect to load current. Inductance values are determined by the following
formulas.
The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the
load current or less.
Continuity loss : Pc
PC = ID2 × RDS (ON) × Duty
On-cycle switching loss : PS (ON)
PS (ON) = VD (Max) × ID × tr × fosc
6
Off-cycle switching loss : PS (OFF)
PS (OFF) = VD (Max) × ID (Max) × tf × fosc
6
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
MB39A119
36 DS04-27247-3E
16.8 V output
VIN = 24 V (Max) , VO = 16.8 V, IO = 4.0 A, fosc = 500 kHz
1. N-ch MOS FET (µPA2752 : NEC product)
Main side
VDS = 30 V, VGS = ± 20 V, ID = 8 A, RDS (ON) = 25 mΩ (Typ) , Qg = 10 nC (Typ)
Synchronous rectification side
VDS = 30 V, VGS = ± 20 V, ID = 8 A, RDS (ON) = 25 mΩ (Typ) , Qg = 10 nC (Typ)
Drain current : Peak value
The peak drain current of this FET must be within its rated current.
If the FET’s peak drain current is ID, it is obtained by the following formula.
2. Inductor (CDRH104R-5R2 : SUMIDA product)
Main side
ID ≥Io + VIN−Vo tON
2L
≥4.0 + 24−16.8 × 1 × 0.7
2 × 5.2 × 10−6500 × 103
≥4.97 A
Synchronous rectification side
ID ≥Io + Vo tOFF
2L
≥4.0 + 16.8 × 1 × (1 − 0.7)
2 × 5.2 × 10−6500 × 103
≥4.97 A
5.2 µH (tolerance ± 30%) , rated current = 5.5 A
L ≥2 (VIN−Vo) tON
Io
≥2 × (24−16.8) × 1 × 0.7
4.0 500 × 103
≥5.04 µH
MB39A119
DS04-27247-3E 37
Ripple current : Peak value
The peak ripple current must be within the rated current of the inductor.
If the peak ripple current is IL, it is obtained by the following formula.
Ripple current : peak-to-peak value
If the peak-to-peak ripple current is ∆IL, it is obtained by the following formula.
The load current satisfying the continuous current condition
Io ≥Vo tOFF
2L
≥16.8 × 1 × (1−0.7)
2 × 5.2 × 10−6500 × 10−3
≥0.97 A
IL ≥IO
VIN−Vo tON
2L
≥4.0 + 24−16.8 × 1 × 0.7
2 × 5.2 × 10−6500 × 103
≥4.97 A
∆IL =VIN−Vo tON
L
=24−16.8 × 1 × 0.7
5.2 × 10−6500 × 103
:=1.94 A
MB39A119
38 DS04-27247-3E
12.6 V output
VIN = 20 V (Max) , VO = 12.6 V, IO = 4.0 A, fosc = 500 kHz
1. N-ch MOS FET (µPA2752 : NEC product)
Main side
VDS = 30 V, VGS = ± 20 V, ID = 8 A, RDS (ON) = 25 mΩ (Typ) , Qg = 10 nC (Typ)
Synchronous rectification side
VDS = 30 V, VGS = ± 20 V, ID = 8 A, RDS (ON) = 25 mΩ (Typ) , Qg = 10 nC (Typ)
Drain current : Peak value
The peak drain current of this FET must be within its rated current.
If the FET’s peak drain current is ID, it is obtained by the following formula.
Main side
ID ≥Io + VIN−Vo tON
2L
≥4.0 + 20−12.6 × 1 × 0.63
2 × 5.2 × 10−6500 × 103
≥4.90 A
Synchronous rectification side
ID ≥Io + Vo tOFF
2L
≥4.0 + 12.6 × 1 × (1 − 0.63)
2 × 5.2 × 10−6500 × 103
≥4.90 A
MB39A119
DS04-27247-3E 39
2. Inductor (CDRH104R-5R2 : SUMIDA product)
Ripple current : Peak-to-peak value
If the peak-to-peak ripple current is ∆IL, it is obtained by the following formula.
3. Diode for bootstrap (SBS006 : SANYO product)
VR (DC reverse voltage) = 30 V, Average output current = 500 mA, peak surge current = 10 A
VF (forward voltage) = 0.35 V, at IF = 300 mA
VR : value that satisfies input voltage
Efficiency is somewhat rising in low leak Schottky diode by the use but even if the signal diode is used, it
is enough. It is recommended to use low VF. Also, capacitor for bootstrap must be very large than gate
capacity of FET at main side. It is recommended to use the capacity of approximately 0.1 µF to 1.0 µF.
5.2 µH (tolerance ± 30%) , rated current = 5.5 A
L ≥2 (VIN−Vo) tON
Io
≥2 × (24−12.6) × 1 × 0.63
4.0 500 × 103
≥4.67 µH
The load current satisfying the continuous current condition
Io ≥Vo tOFF
2L
≥12.6 × 1 × (1−0.63)
2 × 5.2 × 10−6500 × 103
≥897.0 mA
IL ≥IO
VIN−Vo tON
2L
≥4.0 + 20−12.6 × 1 × 0.63
2 × 5.2 × 10−6500 × 103
≥4.90 A
∆IL =VIN−Vo tON
L
=20−12.6 × 1 × 0.63
5.2 × −6500 × 103
:=1.79 A
MB39A119
40 DS04-27247-3E
4. Charging current setting sense resistor (SL1TTE33L0F : KOA product)
33 mΩ
When + INE2 terminal (pin 12) voltage is 3.3 V, and the charging current (IO) is 4.0 A, R4 is obtained by the
following formula.
5. Input current setting sense resistor (SL1TTE15L0F : KOA product)
15 mΩ
When + INE1 terminal (pin 7) voltage is 2.25 V, and the input current is 6.0 A, R1 is obtained by the following
formula.
6. Switching P-ch FET (µPA1772 : NEC product, TPC8102 : TOSHIBA product)
Q2-1, Q2-2, and Q5 must select an appropriate device according to the input current.
R4 = + INE2
24.5 × IO
=3.3
24.5 × 4.0
:= 33.0 mΩ
R1 = + INE1
25 × I1
=2.25
25 × 6.0
:= 15.0 mΩ
MB39A119
DS04-27247-3E 41
■REFERENCE DATA
(Continued)
0.01 0.1 1 10
100
50
55
60
65
70
75
80
85
90
95
VIN = 19 V
VO = 16.8 V setting
0.01 0.1 1 10
100
50
55
60
65
70
75
80
85
90
95
VIN = 16 V
VO = 12.6 V setting
0 6 10 20
100
50
55
60
65
70
75
80
85
90
95
24
8121416 18
VIN = 19 V
IO = 4 A setting
Conversion efficiency vs. Charging current (constant voltage mode)
Conversion efficiency vs. Charging current (constant voltage mode)
Charging current IO (A)
Conversion efficiency η (%)
Charging current IO (A)
Conversion efficiency η (%)
Conversion efficiency vs. Charging voltage (constant current mode)
Charging voltage VO (V)
Conversion efficiency η (%)
MB39A119
42 DS04-27247-3E
(Continued)
0610
100
50
55
60
65
70
75
80
85
90
95
24
8121416
VIN = 16 V
IO = 4 A setting
18 20
0.0 1.5 2.5 5.0
18
0
2
4
6
8
10
12
14
16
0.5 1.0
2.0 3.0 3.5 4.0 4.5
VIN = 19 V
VO = 16.8 V setting
SW3 = ON
SW4 = OFF
SW3 = ON
SW4 = ON
SW3 = OFF
SW4 = OFF
0.0 1.5 2.5 5.0
18
0
2
4
6
8
10
12
14
16
0.5 1.0
2.0 3.0 3.5 4.0 4.5
VIN = 16 V
VO = 12.6 V setting
SW3 = ON
SW4 = OFF
SW3 = ON
SW4 = ON
SW3 = OFF
SW4 = OFF
Conversion efficiency vs. Charging voltage (constant current mode)
Charging voltage vs. Charging current
Charging voltage VO (V)
Conversion efficiency η (%)
Charging current IO (A)
Charging voltage VO (V)
Charging voltage vs. Charging current
Charging current IO (A)
Charging voltage VO (V)
MB39A119
DS04-27247-3E 43
(Continued)
OUT-1 (V)
−5
0
5
0
5
10
15
20
0 1.5
0.5 1.0
2.0
VIN = 19 V
VO = 16.8 V setting
IO = 2 A
SW3 = OFF
SW4 = OFF
OUT-2
OUT-1
OUT-2 (V)
2.5 3.0 3.5 4.0 4.5 5.0(µs)
OUT-1 (V)
−5
0
5
0
5
10
15
20
0 1.5
0.5 1.0
2.0
VIN = 19 V
VO = 12 V
IO = 4 A setting
SW3 = OFF
SW4 = OFF
OUT-2
OUT-1
OUT-2 (V)
2.5 3.0 3.5 4.0 4.5 5.0(µs)
VS
(V)
−5
0
5
10
15
20
0 1.5
0.5 1.0
2.0
VIN = 19 V
VO = 16.8 V setting
IO = 2.0 A
SW3 = OFF
SW4 = OFF
VS
2.5 3.0 3.5 4.0 4.5 5.0(µs)
Switching waveform (constant voltage mode)
Switching waveform (constant current mode)
Switching waveform (constant voltage mode)
MB39A119
44 DS04-27247-3E
(Continued)
VS
(V)
−5
0
5
10
15
20
0 1.5
0.5 1.0
2.0
VS
2.5 3.0 3.5 4.0 4.5 5.0(µs)
VIN = 19 V
VO = 12 V
IO = 4.0 A setting
SW3 = OFF
SW4 = OFF
600
550
500
450
400
350
300
250
200
150
100
50
0
0.000 1.000 2.000 3.000 4.000 5.000
VIN = 19 V
VO = 16.8 V setting
OUT-2
OUT-1
600
550
500
450
400
350
300
250
200
150
100
50
0
17 18 20 22 24 25
VO
fosc
232119
24.0
22.0
20.0
18.0
16.0
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0.0
VO = 16.8 V setting
RL = 10 Ω
Oscillation frequency vs. Charging current
Charging current IO (A)
Oscillation frequency fOSC (kHz)
Oscillation frequency charging voltage vs. Input voltage
Input voltage VIN (V)
Oscillation frequency fOSC (kHz)
Charging voltage VO (V)
Switching waveform (constant current mode)
MB39A119
DS04-27247-3E 45
(Continued)
0
1
2
3
4
5
012
48
16
CTL
Vo
20 24 28 32 36 40 (ms)
Io
Io (A)
VIN = 19 V
IO = 4 A setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo (V)
0
10
CTL (V)
0
5
CVM (V)
CVM
0
1
2
3
4
5
012
48
16
CTL
Vo
20 24 28 32 36 40 (ms)
Io
Io (A)
VIN = 19 V
IO = 4 A setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo (V)
0
10
CTL (V)
0
5
CVM (V)
CVM
Soft-start operating waveform (constant current mode)
Soft-start operating waveform (constant current mode)
MB39A119
46 DS04-27247-3E
(Continued)
0
1
2
3
4
5
012
48
16
CTL
Vo
20 24 28 32 36 40 (ms)
Io
Io (A)
VIN = 19 V
VO = 16.8 V setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo (V)
0
10
CTL (V)
0
5
CVM (V)
CVM
0
1
2
3
4
5
012
48
16
CTL
Vo
20 24 28 32 36 40 (ms)
Io
Io (A)
VIN = 19 V
VO = 16.8 V setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo (V)
0
10
CTL (V)
0
5
CVM (V)
CVM
Soft-start operating waveform (constant voltage mode)
Soft-start operating waveform (constant voltage mode)
MB39A119
DS04-27247-3E 47
(Continued)
0
1
2
3
4
5
06
24
8
Vo
10 12 14 16 18 20 (ms)
Io
Io (A)
VIN = 19 V
IO = 4 A setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo
(V)
6
0
1
2
3
4
5
06
24
8
Vo
10 12 14 16 18 20 (ms)
Io
Io (A)
VIN = 19 V
IO = 4 A setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo
(V)
6
Load-step response operation waveform (C.C mode→C.V mode)
Load-step response operation waveform (C.V mode→C.C mode)
MB39A119
48 DS04-27247-3E
(Continued)
0
1
2
3
4
5
06
24
8
Vo
10 12 14 16 18 20 (ms)
Io
Io (A)
VIN = 19 V
VO = 16.8 V setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo
(V)
6
0
1
2
3
4
5
06
24
8
Vo
10 12 14 16 18 20 (ms)
Io
Io (A)
VIN = 19 V
VO = 16.8V setting
SW3 = OFF
SW4 = OFF
14
16
18
Vo
(V)
6
Load-step response operation waveform (C.V mode→C.V mode)
Load-step response operation waveform (C.V mode→C.V mode)
MB39A119
DS04-27247-3E 49
■LOOP CHARACTERISTICS
20
30
40
1.E+01
50
10
45
35
25
15
5
0
5
10
15
20
25
30
35
40
45
50
80
120
160
200
40
180
140
100
60
20
0
20
40
60
80
100
120
140
160
180
200
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
VIN = 16 V
Setting VO = 8.4 V
VO = 6 V (C.C mode)
RL = 1.5
20
30
40
1.E+01
50
10
45
35
25
15
5
0
5
10
15
20
25
30
35
40
45
50
80
120
160
200
40
180
140
100
60
20
0
20
40
60
80
100
120
140
160
180
200
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
VIN = 19 V
Setting VO = 16.8 V
VO = 16.8 V (C.V mode)
RL = 10
Gain, phase vs. Frequency
Gain, phase vs. Frequency
Gain (dB)
Frequency (Hz)
Phase (deg)
Gain (dB)
Frequency (Hz)
Phase (deg)
<Voltage mode>
<Current mode>
MB39A119
50 DS04-27247-3E
■USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
•Containers for semiconductor materials should have anti-static protection or be made of conductive material.
•After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
•Work platforms, tools, and instruments should be properly grounded.
•Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
•The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ORDERING INFORMATION
Part number Package Remarks
MB39A119QN 28-pin plastic QFN
(LCC-28P-M12)
MB39A119
DS04-27247-3E 51
■PACKAGE DIMENSION
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
28-pin plastic QFN Lead pitch 0.50 mm
Sealing method Plastic mold
28-pin plastic QFN
(LCC-28P-M12)
(LCC-28P-M12)
C
2007-2008 FUJITSU MICROELECTRONICS LIMITED C28069S-c-1-2
(.197±.004)
5.00±0.10
(.138±.004)
5.00±0.10
(.197±.004)
3.50±0.10
3.50±0.10
(.138±.004)
(3-R0.20)
((3-R.008))
0.50(.020)
(TYP)
(.016±.004)
0.40±0.10
1PIN CORNER
(C0.30(C.012))
MAX
0.85(.033)
0.20(.008)
INDEX AREA
+0.05
–
0.03
–
.001
+.002
0.25
(.010 )
(.000 )
0.00
+.002
–
.000
–
0.00
+0.05
0.08(.003)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB39A119
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
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For further information please contact:
North and South America
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Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
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Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
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151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
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Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
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