SMP100LC-25 - STMICROELECTRONICS

February 2012 Doc ID 7050 Rev 14 1/13

SMP100LC

Trisil™ for telecom equipment protection

Features

■Bidirectional crowbar protection

■Voltage range from 8 V to 400 V

■Low capacitance from 20 pF to 45 pF @ 2 V

■Low leakage current: IR = 2 µA max

■Holding current: IH = 150 mA min.

■Repetitive peak pulse current:

IPP = 100 A (10/1000 µs)

Benefits

■Trisils are not subject to ageing and provide a

fail safe mode in short circuit for better

protection.

■Helps equipment meet main standards such as

UL60950, IEC 950 / CSA C22.2 and UL1459.

■Epoxy meets UL94, V0.

■Package is JEDEC registered (DO-214AA).

Complies with the following standards

■GR-1089 Core

■ITU-T-K20/K21

■IEC 61000-4-5

■IEC 61000-4-2 level 4

■TIA/EIA IS-968

■UL497B recognized, UL file E136224

Applications

Any sensitive equipment requiring protection

against lightning strikes and AC power faults.

These devices are dedicated to central office

protection as they comply with the most stressful

standards. Their low capacitances make them

suitable for xDSL.

Description

The SMP100LC is a series of low capacitance

transient surge arrestors designed for the

protection of high data rate communication

equipment. The low capacitance of the devices

avoids any distortion of the signal and is

compatible with digital transmission line cards

(xDSL, ISDN...).

SMP100LC series tested and confirmed

compatible with Cooper Bussmann Telecom

Circuit Protector TCP 1.25A.

The SMP100LC-xxx with the fuse TCP1.25A or

TCP2A is compliant with Telcordia GR1089

(lightning and AC power fault tests),

ITU-T K20/K21 (lightning and AC power fault

tests), TIA/EIA-IS-968 (formerly FCC Part 68

lightning tests), and UL60950 (AC power fault

tests). The use of the TCP1.25A allows the

SMP100LC-xxx to be safe for the 2nd level (B

criteria) AC power fault tests.

TM: Trisil is a trademark of STMicroelectronics

SMB

(JEDEC DO-214AA)

www.st.com

Characteristics SMP100LC

2/13 Doc ID 7050 Rev 14

1 Characteristics

Table 1. In compliance with the following standards

Standard

Peak surge

voltage

(V)

Waveform

voltage

Required

peak current

(A)

Current

waveform

Minimum serial

resistor to meet

standard (Ω)

GR-1089 Core

First level

2500

1000

2/10 µs

10/1000 µs

500

100

2/10 µs

10/1000 µs

GR-1089 Core

Second level 5000 2/10 µs 500 2/10 µs 0

GR-1089 Core

Intra-building 1500 2/10 µs 100 2/10 µs 0

ITU-T-K20/K21 6000

1500 10/700 µs 150

37.5 5/310 µs 0

ITU-T-K20

(IEC61000-4-2)

8000

15000 1/60 ns ESD contact discharge

ESD air discharge

IEC61000-4-5 4000

4000

10/700 µs

1.2/50 µs

100

5/310 µs

8/20 µs

TIA/EIA IS-968,

lightning surge type A

1500

800

10/160 µs

10/560 µs

200

100

10/160 µs

10/560 µs

TIA/EIA IS-968,

lightning surge type B 1000 9/720 µs 25 5/320 µs 0

SMP100LC Characteristics

Doc ID 7050 Rev 14 3/13

Figure 1. Electrical characteristics - definitions (Tamb = 25 °C)

Table 2. Absolute ratings (Tamb = 25 °C)

Symbol Parameter Value Unit

IPP Repetitive peak pulse current (see Figure 2)

10/1000 µs

8/20 µs

10/560 µs

5/310 µs

10/160 µs

1/20 µs

2/10 µs

100

400

140

150

200

400

500

IFS Fail-safe mode: maximum current (1)

1. In fail safe mode, the device acts as a short circuit.

8/20 µs 5 kA

ITSM

Non repetitive surge peak on-state current

(sinusoidal)

t = 0.2 s

t = 1 s

t = 2 s

t = 15 mn

I2tI

2t value for fusing t = 16.6 ms

t = 20 ms

21 A2s

Tstg Storage temperature range -55 to 150 °C

TjOperating junction temperature range -40 to 150

TLMaximum lead temperature for soldering during 10 s. 260 °C

Table 3. Thermal resistances

Symbol Parameter Value Unit

Rth(j-a) Junction to ambient (with recommended footprint) 100 °C/W

Rth(j-l) Junction to leads 20 °C/W

VRM VRVBO

IPP

IBO

IRM

Symbol Parameter

V Stand-off voltage

V Breakover voltage

I Leakage current

I Peak pulse current

I Breakover current

I Holding current

V Continuous reverse voltage

I Leakage current at V

C Capacitance

Characteristics SMP100LC

4/13 Doc ID 7050 Rev 14

Table 4. Electrical characteristics - values (Tamb = 25 °C)

Order code

IRM @ VRM IR @ VR Dynamic

VBO (1)

1. See Figure 16: Test circuit 1 for Dynamic IBO and VBO parameters

Static

VBO @ IBO (2)

2. See Figure 17: Test circuit 2 for IBO and VBO parameters

IH (3)

3. See Figure 18: Test circuit 3 for dynamic IH parameter

C(4)

4. VR = 50 V bias, VRMS =1 V, F = 1 MHz

C(5)

5. VR = 2V bias, VRMS =1 V, F = 1 MHz

max. max. max. max. max. min. typ. typ.

µA V µA V V V mA mA pF pF

SMP100LC-8

82515

800

(typ.) NA 75

SMP100LC-25 22 25 40 35

150

NA 65

SMP100LC-35 32 35 55 55 NA 55

SMP100LC-65 55 65 85 85 45 90

SMP100LC-90 81 90 120 125 40 80

SMP100LC-120 108 120 155 150 35 75

SMP100LC-140 126 140 180 175 30 65

SMP100LC-160 144 160 205 200 30 65

SMP100LC-200 180 200 255 250 30 60

SMP100LC-230 207 230 295 285 30 60

SMP100LC-270 243 270 345 335 30 60

SMP100LC-320 290 320 400 390 25 50

SMP100LC-360 325 360 460 450 25 50

SMP100LC-400 360 400 540 530 20 45

SMP100LC Characteristics

Doc ID 7050 Rev 14 5/13

Figure 2. Pulse waveform Figure 3. Non repetitive surge peak on-state

current versus overload duration

100

%IPP

trtp

Repetitive peak pulse current

tr = rise time (µs)

tp = pulse duration time (µs)

I (A)

TSM

1E-2 1E-1 1E+0 1E+1 1E+2 1E+3

F=50Hz

T initial = 25°C

t(s)

Figure 4. On-state voltage versus on-state

current (typical values)

Figure 5. Relative variation of holding

current versus junction

temperature

100

012345678

V (V)

I (A)

T initial = 25°C

I [T ] / I [T =25°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

T (°C)

Figure 6. Relative variation of breakover

voltage versus junction

temperature

Figure 7. Relative variation of leakage

current versus junction

temperature (typical values)

-25 0 25 50 75 100 125

0.96

0.98

1.00

1.02

1.04

1.06

1.08

V [ ] / V [ =25°C]

BO BO

T (°C)

I [ ] / I [ =25°C]

25 50 75 100 125

100

1000

2000

T (°C)

Application information SMP100LC

6/13 Doc ID 7050 Rev 14

2 Application information

In wire line applications, analog or digital, both central office and subscriber sides have to be

protected. This function is assumed by a combined series / parallel protection stage.

Figure 10. Examples of protection stages for line cards

In such a stage, parallel function is assumed by one or several Trisil, and is used to protect

against short duration surge (lightning). During this kind of surges the Trisil limits the voltage

across the device to be protected at its break over value and then fires. The fuse assumes

the series function, and is used to protect the module against long duration or very high

current mains disturbances (50/60Hz). It acts by safe circuit opening. Lightning surge and

mains disturbance surges are defined by standards like GR1089, TIA/EIA IS-968,

ITU-T K20.

Figure 11. Typical circuits

Figure 8. Variation of thermal impedance

junction to ambient versus pulse

duration

Figure 9. Relative variation of junction

capacitance versus reverse voltage

applied (typical values)

1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2

0.01

0.1

t (s)

Z/R

th(j-a) th(j-a)

Printed circuit board - FR4,

copper thickness = 35µm,

recommended pad layout

C [V ] / C [V =2V]

12 5 10 20 50 100 300

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

V (V)

F =1MHz

V = 1V

T = 25°C

RMS

Line

Protection stage

Ring

relay

Line

Ex. Analog line card Ex. xDSL line card or terminal

Fuse TCP 1.25A

SMP100LC-xxx

Typical circuit for subscriber side

Fuse TCP 1.25A

Tip S

Gnd

SMP100LC-xxx

Ring S

SMP100LC-xxx

Fuse TCP 1.25A

Tip L

Gnd

Ring L

Typical circuit for central office side

SMP100LC Application information

Doc ID 7050 Rev 14 7/13

Figure 12. Test method of the board with fuse and Trisil

These topologies, using SMP100LC from ST and TCP1.25A from Cooper Bussmann, have

been functionally validated with a Trisil glued on the PCB. Following example was performed

with SMP100LC-270 Trisil. For more information, see Application Note AN2064.

Figure 13. Trisil turns on during lightning strike

Test conditions:

2/10 µs + and - 2.5 and 5 kV, 500 A (10 pulses of each polarity), Tamb = 25 °C

Test result:

Fuse and Trisil OK after test in accordance with GR1089 requirements.

Surge

Generator

Device to be protected

Oscilloscope

I surge

Line side

Voltage probe

Current probe

Test board

I surge (100A/div)

V (50V/div)

Application information SMP100LC

8/13 Doc ID 7050 Rev 14

Figure 14. Trisil action while fuse remains operational

Test conditions:

600 V, 3 A, 1.1 s (first level), Tamb = 25 °C

Test result:

Fuse and Trisil OK after test in accordance with GR1089 requirements.

Figure 15. High current AC power test: the fuse acts like a switch by opening the

circuit

Test conditions:

277 V, 25 A (second level), Tamb = 25 °C

Test result:

Fuse safely opened and Trisil OK after test in accordance with GR1089 requirements.

I surge (2A/div)

V (100V/div)

I surge (10A/div)

V (100V/div)

SMP100LC Application information

Doc ID 7050 Rev 14 9/13

Figure 16. Test circuit 1 for Dynamic IBO and VBO parameters

Figure 17. Test circuit 2 for IBO and VBO parameters

100 V / µs, di/dt < 10 A / µs, Ipp = 100 A

1 kV / µs, di/dt < 10 A / µs, Ipp = 10 A

10 µF

2Ω45 Ω

66 Ω470 Ω

83 Ω

0.36 nF

46 µH

60 µF

26 µH

12 Ω

250 Ω46 µH

47 Ω

KeyTek 'System 2' generator with PN246I module

220V 50Hz

1/4

R1 = 140Ω

R2 = 240Ω

ton = 20ms

IBO

measurement

VBO

measurement

Vout DUT

TEST PROCEDURE

Pulse test duration (tp = 20ms):

V selection:

●

for Bidirectional devices = Switch K is closed

for Unidirectional devices = Switch K is open

Device with V < 200V V = 250 V , R1 = 140

OUT

BO OUT RMS

➔Ω

Device with V 200V V = 480 V , R2 = 240

BO OUT RMS

➔Ω≥

Ordering information scheme SMP100LC

10/13 Doc ID 7050 Rev 14

Figure 18. Test circuit 3 for dynamic IH parameter

3 Ordering information scheme

Figure 19. Ordering information scheme

TEST PROCEDURE

1/ Adjust the current level at the I value by short circuiting the AK of the D.U.T.

2/ Fire the D.U.T. with a surge current

➔I=

10A, 10/1000µs.

3/ The D.U.T. will come back off-state within 50ms maximum.

This is a GO-NOGO test which allows to confirm the holding current (I ) level in a

functional test circuit.

BAT = - 48 V

Surge generator

D.U.T

SMP 100 LC - xxx

Trisil surface mount

Repetitive peak pulse current

Capacitance

Voltage

100 = 100 A

LC = Low capacitance

65 = 65 V

SMP100LC Package information

Doc ID 7050 Rev 14 11/13

4 Package information

●Epoxy meets UL94, V0

●Lead-free package

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

Table 5. SMB dimensions

Ref.

Dimensions

Millimeters Inches

Min. Max. Min. Max.

A1 1.90 2.45 0.075 0.096

A2 0.05 0.20 0.002 0.008

b 1.95 2.20 0.077 0.087

c 0.15 0.40 0.006 0.016

E 5.10 5.60 0.201 0.220

E1 4.05 4.60 0.159 0.181

D 3.30 3.95 0.130 0.156

L 0.75 1.50 0.030 0.059

Figure 20. Footprint dimensions

in mm (inches)

Figure 21. Marking layout(1)

1. Marking layout can vary according to assembly location.

2.60

5.84

1.62

2.18

1.62

(0.064) (0.102)

(0.23)

(0.064)

(0.086)

y w w

x x x

e: ECOPACK compliance

XXX: Marking

Z: Manufacturing location

Y: Year

WW: week

Cathode bar ( unidirectional devices only )

Ordering information SMP100LC

12/13 Doc ID 7050 Rev 14

5 Ordering information

6 Revision history

Table 6. Ordering information

Order code Marking Package Weight Base qty Delivery mode

SMP100LC-8 PL8

SMB 98 mg 2500 Tape and reel

SMP100LC-25 L25

SMP100LC-35 L35

SMP100LC-65 L06

SMP100LC-90 L09

SMP100LC-120 L12

SMP100LC-140 L14

SMP100LC-160 L16

SMP100LC-200 L20

SMP100LC-230 L23

SMP100LC-270 L27

SMP100LC-320 L32

SMP100LC-360 L36

SMP100LC-400 L40

Table 7. Document revision history

Date Revision Changes

09-Nov-2004 9 Absolute ratings values, table 3 on page 2, updated.

07-Dec-2004 10 SMP100LC-320, SMP100LC-360 and SMP100LC-400 addition.

20-Jun-2005 11 Telecom Circuit Protector added in Description.

05-Mar-2007 12 Reformatted to current standards. SMB Package information

updated. Standards compliance paragraphs added to Description.

05-Jan-2010 13 Corrected vertical axis labelling in Figure 8.

09-Feb-2012 14 Added UL statement in Complies with the following standards.

SMP100LC

Doc ID 7050 Rev 14 13/13

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