11180B–ATARM–29 - Oct- 13
Introduction
This user guide introduces the evaluation kits for the Atmel® SAMA5D3 series
embedded MPUs listed below:
SAMA5D31
SAMA5D33
SAMA5D34
SAMA5D35
SAMA5D36
It pertains to the following evaluation kit references:
SAMA5D31-EK
SAMA5D33-EK
SAMA5D34-EK
SAMA5D35-EK
SAMA5D36-EK
ARM-based Embedded MPUs
SAMA5D3x-EK User Guide
USER GUIDE
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SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Contents
Important: Unpack and assemble the kit carefully, following the assembly guide provided in the box.
Boards
One SAMA5D3 main board (MB)
One of the five available CPU module (CM) boards
SAMA5D31-CM
SAMA5D33-CM
SAMA5D34-CM
SAMA5D35-CM
SAMA5D36-CM
One optional Display Module (DM) board (5"_WVGA_R-DM), available for all SAMA5D3x evaluation kits
that feature an LCD interface: SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D36
Power supply
One universal input AC/DC power supply with US, Europe and UK plug adapters
One 3V lithium battery type CR1225
Cables
One micro A/B-type USB cable
One RJ45 crossed cable
A welcome letter
Related Items
Atmel SAMA5D3 Series Datasheet
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SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Table of Contents
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Related Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Power up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Sample Code and Technical Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Evaluation Kit Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. CPU Module (CM) Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 Equipment List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Embest/Flextronics Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5 Ronetix Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5. Main Board (MB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.1 Main Board Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.2 Function Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.3 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.4 PIO Usage and Interface Connectors Details. . . . . . . . . . . . . . . . . . . . . . . . . 76
5.5 Main Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6. Optional Display Module (DM) Board . . . . . . . . . . . . . . . . . . . . . . 116
6.1 DM Board Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
6.2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7. Troubleshooting and Recommendations . . . . . . . . . . . . . . . . . . . . 120
7.1 Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
8. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
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1. Evaluation Kit Specifications
1.1 Electrostatic Warning
Warning: ESD-Sensitive Electronic Equipment!
The evaluation kit is shipped in a protective anti-static package. The board system must not be subjected to high
electrostatic potentials.
We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile
ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic
element on the board.
Table 1-1. Evaluation Kit Specifications
Characteristic Specifications
Clock speed Up to 536 MHz PCK, up to 166 MHz MCK
Ports 10/100/1000 Ethernet, USB, RS232, JTAG, CAN, Audio, HDMI, SD card
Board supply voltage 5V DC from connector
Dimensions:
MB (Main Board)
CM (Computer Module) Board
DM (Display Module) Board
165 * 135 * 20 mm
67.60 * (40 to 47) * 5 mm
135 * 80 * 6 mm
RoHS status Compliant
CE and FCC Part 15 status Compliant
Kit Identification SAMA5D31-EK
SAMA5D33-EK
SAMA5D34-EK
SAMA5D35-EK
SAMA5D36-EK
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2. Power Up
2.1 Power up the Board
Unpack the board, taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug
adapter corresponding to that of your country and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The LCD should light up and display a welcome page. Click or touch icons displayed on the screen and view the demo
(the red ones need to be replaced by demo software).
2.2 Sample Code and Technical Support
After booting up the board, you can run sample code or your own application on the development kit. You can downlo ad
sample code and get technical support from the Atmel web site.
Linux software and demos can be found on the web site Linux4SAM.
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3. Evaluation Kit Hardware
3.1 Introduction
The Atmel SAMA5D3 series evaluation kit is a fully-featured evaluation platform for Atmel SAMA5D3 series
microcontrollers. The evaluation kit allows users to extensively evaluate, prototype and create application-specific
designs.
The Atmel SAMA5D3 series evaluation kit is a platform architecture based on a main board, a computer module
equipped with a SAMA5D3 series processor and an optional display module, providing maximum flexibility for kit users.
The SAMA5D3 series evaluation kit consists of three boards:
The computer module (CM) board, is a single-board computer that integrates all the core components and is
mounted onto an application-specific main board (MB). The computer module has specified pinouts based on the
SODIMM200 connector. It provides the functional requirements for an embedded application. These functions
include, but are not limited to, graphics, audio, mass storage, network and multiple serial and USB ports. A single
SODIMM200 connector provides the main board interface to carry all the I/O signals to and from the computer
module.
The main board (MB) provides all the interface connectors required to att ach the system to the application specific
peripherals. This versatility allows the designer to create a densely-packed solution, which results in a more
reliable product while simplifying system integration.
The display module board (DM) integrates LCD, touchscreen and Qtouch® technology
Table 3-1. Evaluation Kit Features
Feature SAMA5D31 SAMA5D33 SAMA5D34 SAMA5D35 SAMA5D36
CAN0 X X X
CAN1 X X X
GMAC XXXX
EMAC X X X
HSMCI1 XXXXX
HSMCI2 XXXX
LCDC XXX X
UART0 X X X
UART1 X X X
ISI XXXXX
SHA XXXXX
AES XXXXX
TDES XXXXX
TC1 XXXXX
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SAMA5D3x-EK User Guide [USER GUIDE]
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4. CPU Module (CM) Board
4.1 Overview
The CPU module (CM) board is the heart of the SAMA5D3x-EK. It connects to the main board through a SODIMM200
interface and integrates the SAMA5D3 series processor and external memories. The CM board serves as a minimal CPU
sub-system. All five SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 and SAMA5D36 processors share the same CM
board circuitry with minor configuration settings.
The CM board connects to a carrier board containing its connectors, power supply and any expansion I/O through a
standard gold-plated SODIMM 200-pin connection.
Note: There are five CM boards from three dif ferent manufacturers. The five processors are implemented as shown in
Table 4-1.
The five CM boards share the same circuitry design with different designator information and PCB layouts. The circuitry
reference in this guide, for common design parts, refers to schematics from SAMA5D3 series-CM (mfg2). All the other
schematics are provided in the Section 4.4 “Embest/Flextronics Schematics” and Section 4.5 “Ronetix Schematics”.
Table 4-1. CM Board Implementation
Manufacture r an d
Module Kind SAMA5D31-CM SAMA5D33-CM SAMA5D34-CM SAMA5D35-CM SAMA5D36-CM
Embest/Flextronics X X X
Ronetix XXXX
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Figure 4-1. CPU Module Board from Embest/Flextronics
Figure 4-2. CPU Module Board from Ronetix
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Figure 4-3. Board Architecture
Note: Different interfaces on the main board share the same connections to the CPU module. The actual usage
depends on the CPU module featured in your evaluation kit.
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M
M
2
0
0
S
o
D
I
M
M
2
0
0
S
o
D
I
M
M
2
0
0
S
o
D
I
M
M
2
0
0
S
o
0
0
SoDIMM200Power
O
O
O
O
O
O
O
O
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
O
s
s
c
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
O
s
c
Osc
SPI
SPI
E
E
E
E
E
Gigabit Etherne t
RGMII
Gigabit Etherne t
RGMII
SAMA5D3 Series
OneWire
O
O
n
n
n
n
e
e
W
W
i
i
r
r
e
e
OneWire
PIO
PIO
NOR
FLASH
128Mb
10
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.2 Equipment List
The CM board is built around an ARM® Cortex®-A5-based microcontroller (BGA 324 package) with external memory an d
Gigabit Ethernet PHYsical layer transceiver.
4.2.1 Devices
4.2.2 Interface Connection
SODIMM200 card edge interface
4.2.3 Configuration Items
One jumper for SPI DataFlash chip select connection
Table 4-2. CPU Module Specifications
Characteristic Specifications
PCB CPU Module (10 layers)
Dimensions in mm:
(L x W x H) 67.60 *(40 to 47) * 5 max
Processor SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 and SAMA5D36 (324-ball BGA package)
Clock speed 12 MHz crystal
32.768 kHz
Memory 2 x DDR2 2 Gb 16 Meg x 16 x 8 banks
1 x SLC NAND Flash 2/4Gb 8-bit data
1 x NOR 128 Mb 16-bit data
On-board I/O Ports One Serial EEPROM SPI
One 1-Wire EEPROM DS2431
One user-powered red LED and one user blue LED
One gigabit Ethernet PHY
Connector SODIMM200
Board supply voltage 3.3V from SODIMM200 connector
On-board power regulation
Temperature:
- operating
- storage 0°C to +60°C
-40°C to +85°C
Relative humidity 0 to 90% (non condensing)
RoHS status Compliant
Board Identification
Silkscreen top
SAMA5D31-CM
SAMA5D33-CM
SAMA5D34-CM
SAMA5D35-CM
SAMA5D36-CM
11
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.2.4 Boot Options
Table 4-3 lists the supported boot options
4.2.4.1 Boot Configuration
In order to use SAM-BA boot, the NAND Flash and SPI DataFlash must be deselected.
Pressing the pushbutton PB4 (CS boot disable) disconnects these two components from the system while the ROM Boot
is searching for a boot device after reset. A reset can be forced by pressing the PB1 (NRST) pushbutton. Note that PB1
and PB4 pushbuttons are located on the main board (MB).
In order to boot from SAM-BA, both PB1 and PB4 should be pressed, then PB1 released while PB4 is kept pressed unt il
SAM-BA boots.
Table 4-3. Boot Options
Boot Mode Boot Device Type Note
BMS OPEN Embedded ROM Boot ROM Boot followed by:
- SPI0, NPCS0
- SD/MMC MCI0, MCI1
- NAND Flash
- SPI0, NPCS1
- TWI0
- SAM-BA®
Default boot is from
embedded ROM
BMS CLOSE NOR Flash On-board NOR Flash
using NCS0 Boot from external NOR
Flash memory
12
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3 Functional Blocks
4.3.1 Processor
The CM board is equipped with one Atmel SAMA5D3 ARM-based embedded MPU from the list below:
SAMA5D31
SAMA5D33
SAMA5D34
SAMA5D35
SAMA5D36
The SAMA5D3x devices are packaged in a BGA324-ball BGA package and share an identical footprint.
.As different interfaces can be defined using the same pins, the functions available on the evaluation board depend on
the actual configuration of the CPU.
The Atmel SAMA5D3 series is a high-performance, power-efficient embedded MPU based on the ARM Cortex-A5
processor, achieving 536 MHz with power consumption levels below 0.5 mW in low-power mode. The device features a
floating point unit for high-precision computin g and accelerated data processing, and a high data bandwidth architecture.
It integrates advanced user interface and connectivity peripherals and security features.
The SAMA5D3 series features an internal multi-layer bus architecture associated with 39 DMA channels to sustain the
high bandwidth required by the processor and the high-speed peripherals. The device offers support for
DDR2/LPDDR/LPDDR2 and MLC NAND Flash memory with 24-bit ECC.
The comprehensive peripheral set in cludes an LCD controller with overlays for hardware-accelerated image composition,
a touchscreen interface and a CMOS sensor interface. Connectivity peripherals include Gigabit EMAC with IEEE1588,
10/100 EMAC, multiple CAN, UART, SPI and I2C. With its secure boot mechanism, hardware accelerated engines for
encryption (AES, TDES) and hash function (SHA), the SAMA5D3 ensures anti-cloning, code protection and secure
external data transfers.
Refer to Section 4. “CPU Module (CM) Board” on page 7 for details.
The processor runs at frequencies up to 536 MHz for the core and up to 166 MHz for the system bus.
4.3.2 Clock Circuitry
The CM board includes three clock sources:
Two clocks are alternatives for the SAMA5D3 series processor main clock
One crystal oscillator is used for the Ethernet RGMII chip
4.3.3 Reset Circuitry
The reset sources for the CM board are:
Power-on reset
Pushbutton reset (Pushbutton is equipped on main board)
JTAG reset from an in-circuit emulator (MB features an on-board JTAG interface)
Table 4-4. Main Components Associated with the Clock Systems
Quantity Description Component
Assignment
1 Crystal for internal clock, 12 MHz Y1
1 Crystal for RTC clock, 32.768 kHz Y2
1 Oscillator for ethernet clock RGMII, 25 MHz Y3
13
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.4 Power Supplies
The CM board is driven by +3.3V input power rail from the MB through the SODIMM200 connector. The CM board
embeds all necessary power rails required for the microprocessor.
When additional voltages are required, they are generated on-board from the 3.3V supply (power source is a linear
regulator or a switching regulator). The detailed power supply requirements for given modules are specified within the
corresponding product documentation.
Table 4-5 summarizes the power specifications.
Ta ble 4-5. Supply Group Configuration
Nominal Name Powers Component
3.0V VDDBU the Slow Clock oscillator, the internal 32K
RC, the internal 12M RC and a part of the
System Controller From VBAT 3V, SODIMM200 connector
3.3V VDDIOP0 a part of peripheral I/O lines From main 3.3V, SODIMM200 connector
3.3V VDDIOP1 a part of peripheral I/O lines From main 3.3V, SODIMM200 connector
3.3V VDDUTMII the USB device and host UTMI + interface From main 3.3V, SODIMM200 connector
3.3V VDDOSC the main oscillator cells From main 3.3V, SODIMM200 connector
3.3V VDDANA the analog-to-digital converter From main 3.3V, SODIMM200 connector
1.2V VDDCORE the core, including the processor, the
embedded memories and the peripherals Regulator on-board
1.2V VDDUTMIC the USB device and host UTMI + core Regulator on-board
1.2V VDDPLLA the PLLA cell Regulator on-board
1.8V VDDIODDR DDR2 interface I/O lines Regulator on-board
1.8V VDDIOM NAND, NOR Flash and SMC interface I/O
lines Regulator on-board
3.0V to
3.3V ADVREF ADC reference voltage From ADVREF, SODIMM200 connector
2.5V VDDFUSE Fuse box for programming Regulator on-board
14
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-4. Embest/Flext ro ni cs Power Supply
TDO
NTRST
NRST
SHDN
WKUP
TDI
TMS
TCK
TDO
NRST
WKUP
SHDN
NTRST
TDI
TMS
TCK
PWR_EN
PWR_EN
VCC_3V3
ADVREF
VDDIOP1
VDDIOP0
VDDBU
VDDBU
VDDIOP0
VDDBU
VDDIOM
VDDIOP0
VCC_3V3
VCC_1V2
VCC_1V2 VCC_3V3VDDOSC
VDDOSC
FUSE_2V5 VCC_3V3
VDDANA
VDDPLLA
GNDUTMI
GNDUTMI
GNDUTMI
VCC_3V3
FUSE_2V5
GNDUTMI
VDDIODDR VCC_3V3
VCC_3V3
VCC_3V3
VCC_1V2
VCC_3V3
VCC_3V3
HHSDMB{7} HHSDPB{7}
HHSDMC{7} HHSDPC{7}
DIBP{7} DIBN{7}
HHSDMA{7} HHSDPA{7}
TMS{7} TCK{7} TDO{7}
NRST{3,6,7}
JTAGSEL{7} TDI{7}
NTRST{7}
BMS{7}
WKUP{7} SHDN{7}
PWR_EN
{7}
TP16
SMD
TP16
SMD
TP8
SMD
TP8
SMD
C41
100nF
C41
100nF
TP14
SMD
TP14
SMD
C36 20pFC36 20pF
C9
100nF
C9
100nF
SUP1
CA89405MF
DNP
SUP1
CA89405MF
DNP
TP2
SMD
TP2
SMD
TP4
SMD
TP4
SMD
C10
100nF
C10
100nF
R39
100K 1%
R0402
R39
100K 1%
R0402
R111 0RR111 0R
TP7
SMD
TP7
SMD
C23
100nF
C23
100nF
Y1
12MHz
Y1
12MHz
1
23
4
MN15 RT9018B-18GSP
SOP_8__50_154X193_69
MN15 RT9018B-18GSP
SOP_8__50_154X193_69
NC 5
EN 2
ADJ
7
VOUT
6VIN 3
GND(PAD)
9
GND
8
VDD 4
PGOOD
1
R8 10KR8 10K
R49
DNP
R0402
R49
DNP
R0402
C33
100nF
C33
100nF
C24
100nF
C24
100nF
TP10
SMD
TP10
SMD
R16
1R
R16
1R
C6
100nF
C6
100nF
TP15
SMD
TP15
SMD
C7
100nF
C7
100nF
C42
4.7uF
C42
4.7uF
MN14
XC6206P251MR-G
Voltage Detector
MN14
XC6206P251MR-G
Voltage Detector
Vo
2
Vss
1Vin 3
C37
4.7uF
C37
4.7uF
C38
4.7uF
C38
4.7uF
MN2H
SAMA5D3x_BGA324
MN2H
SAMA5D3x_BGA324
GNDCORE_1
A16
VDDCORE_1 C5
VDDCORE_2 C7
GNDCORE_2
C9
VDDIODDR_1 D13
VDDCORE_3 D14
GNDIODDR_1
E14
GNDIODDR_2
F10
GNDIODDR_3
F13
VDDIODDR_2 F14
GNDIODDR_4
F15 VDDIOP0_1 G7
VDDIODDR_3 G10
VDDIODDR_4 G13
VDDIODDR_5 H11
GNDIODDR_5
H14
GNDIOP_1
J7
GNDIOM_1
J11
GNDANA
L4
ADVREF L5
VDDANA L6
VDDIOP1_1 L11
VDDIOP1_2 M4
TDO
M11 TMS
N10
GNDIOP_2
N11
GNDCORE_3
N13
GNDFUSE
P4
TCK
P9
GNDPLL
P10
NTRST
P11
GNDUTMI_1
R12
VDDFUSE R3
TDI
R8
VDDPLLA R10
VBG
R11
VDDIOM_1 P12
VDDCORE_4 T7
GNDCORE_4
T8
JTAGSEL
T9
WKUP
T10
GNDOSC
T11
SHDN
T12
GNDBU
T13
GNDCORE_5
T14
VDDCORE_5 T15
VDDIOM_2 T16
GNDIOM_2
T17
GNDIOP_3
U7
XIN
U8
BMS
U9
VDDOSC U11
VDDUTMII U13
TST
U15
XIN32
U16
VDDCORE_6 U17
VDDCORE_7 V7
XOUT
V8
NRST
V9
VDDIOP0_2 V11
VDDUTMIC V13
VDDBU V15
XOUT32
V16
GNDCORE_6
V17
GNDIOP_4
E5
HHSDMA
V10
HHSDPA
U10
HHSDMC
V14
HHSDPC
U14
HHSDPB
U12 HHSDMB
V12
DIBN
U6
DIBP
V6
TP1
SMD
TP1
SMD
C8
100nF
C8
100nF
L1
180ohm at 100MHz
L1
180ohm at 100MHz
1 2
L7
10uH/150mA
L7
10uH/150mA
C3
100nF
C3
100nF
L5
10uH/150mA
L5
10uH/150mA
L6
10uH/150mA
L6
10uH/150mA
C131
100nF
C0603
C131
100nF
C0603
C127
1uF
C127
1uF
C40
100nF
C40
100nF
R7 100KR7 100K
C1
100nF
C1
100nF
C34
100nF
C34
100nF
RR1D
100K
RR1D
100K
4 5
R10
1R
R10
1R
R11
1R
R11
1R
C128
100nF
C0603
C128
100nF
C0603
R40
100K 1%
R0402
R40
100K 1%
R0402
C27 20pFC27 20pF
TP11
SMD
TP11
SMD
L152.2uH
3D16-2
L152.2uH
3D16-2
C2
100nF
C2
100nF
TP17
SMD
TP17
SMD
C134
10uF
C0805
C134
10uF
C0805
C11
100nF
C11
100nF
TP3
SMD
TP3
SMD
TP19
SMD
TP19
SMD
Y2 32.768 kHzY2 32.768 kHz
12
C43
100nF
C43
100nF
R51
47K 1%
R0402
R51
47K 1%
R0402
C39
100nF
C39
100nF
C121
1uF
C121
1uF
TP6
SMD
TP6
SMD
RR1C 100KRR1C 100K
3 6
C19
100nF
C19
100nF
C32
100nF
C32
100nF
C25
10uF
C0805
C25
10uF
C0805
TP9
SMD
TP9
SMD
C44
10pF
C44
10pF
C29
100nF
C29
100nF
TP12
SMD
TP12
SMD
TP18
SMD
TP18
SMD
C30 20pFC30 20pF
C28
100nF
C28
100nF
C130
10uF
C0805
C130
10uF
C0805
C15
4.7uF
C15
4.7uF
C5
100nF
C5
100nF
RR1B 100K
RR1B 100K
2 7
C31 20pFC31 20pF
C132
10uF
C132
10uF
R4
DNP
R4
DNP
R38
200K 1%
R0402
R38
200K 1%
R0402
L2
180ohm at 100MHz
L2
180ohm at 100MHz
1 2
R6 100KR6 100K
C13
22pF
C0402
C13
22pF
C0402
R44
DNP
R0402
R44
DNP
R0402
C12
100nF
C12
100nF
TP5
SMD
TP5
SMD
C17
100nF
C17
100nF
R19
5.62K 1%
R19
5.62K 1%
C20
100nF
C20
100nF
C14
10nF
C0402
C14
10nF
C0402
MN16 RT8010GQW
WDFN-6L_2X2
MN16 RT8010GQW
WDFN-6L_2X2
NC
1
EN 2
VIN 3
LX
4
GND
5
FB
6
PAD
7
R109
0R
R109
0R
C35
100nF
C35
100nF
C18
100nF
C18
100nF
RR1A
100K
RR1A
100K
1 8
C21
100nF
C21
100nF
C4
100nF
C4
100nF
R46
23.7K 1%
R0402
R46
23.7K 1%
R0402
15
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-5. Ronetix Power Supply
POWER_ENABLE
2;3
3V3
3V3
3V3
VDDIODDR
VDD_CORE
VDD_CORE
VDD_PLL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3V3
1
2
3
4
5
VIN
GND
STBY
NC
VOUT
US1
BU12TD3WG-TR
OR BU10TD3WG-TR
C9
1uF/10V C10
1uF/10V
C5
10n/25V
C8
10n/25V
C11
10n/25V
C6
22u/6V3
C7
22u/6V3
C3
22u/6V3
C4
22u/6V3
L2
LQM2HPN1R0MG0L
L1
LQM2HPN1R0MG0L
0402
RS1
2k49/1%
0402
R3
5k1/1%
0402
R2
6k34/1%
0402
RS2
10k/1%
0603
R4
0R
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U2
SC189ASKTRT 1V0
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U1
SC189ASKTRT 1V0
0402
R1
100k
SEE TABLE 1
SEE TABLE 1
SEE TABLE 1
RS1
GND pins are provided and should be
Typ
us
100
V
0.4
V
1.2
Max
EN Inpu t L o w Threshold
Min
EN Input High Threshold
Soft-Start T ime
0.3
EN Inpu t High Thres h o ld
Min
EN Input Low Threshold
Max
1.2
V
50
V
Start Time
us
Typ
DNP
16
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-6. Ronetix Power Supply (Conti nued)
ADVREF
2;4
3V3
3V3
AGND
VDD_IOP0
VDD_IOP1
VDD_PLL
VDD_CORE
VDD_IOM
UTMI_GND
UTMI_GND
VDD_PLL
VDDFUSE
VDDIODDR
UTMI_GND
VDD_ANA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Vbat
L4
BLM15AG121SN1D
L5
BLM15AG121SN1D
L6
BLM15AG121SN1D
L3
BLM15AG121SN1D
C14
100n/10V
C16
100n/10V
C15
100n/10V
C18
100n/10V
C17
100n/10V
C19
100n/10V
C23
100n/10V
C12
100n/10V
C13
100n/10V
C20
100n/10V
C22
100n/10V
C21
100n/10V
C24
100n/10V
C25
100n/10V
C40
100n/10V
C105
100n/10V
C26
100n/10V
C28
100n/10V
C27
100n/10V
C30
100n/10V
C29
100n/10V
C38
470n/16V/Y5V
C35
470n/16V/Y5V
C32
470n/16V/Y5V
C42
470n/16V/Y5V
C33
470p/50V
C34
470p/50V
C39
470p/50V
C43
470p/50V
C36
4u7/6V3/X5R
C31
4u7/6V3/X5R
C37
4u7/6V3/X5R
C41
4u7/6V3/X5R
C5
C7
D14
T15
U17
V7
T7
C9
N13
T8
T14
V17
A16
D13
F14
G10
G13
H11
E14
F10
F13
F15
H14
P12
T16
J11
T17
G7
V11
L11
M4
E5
J7
N11
U7
V15
T13
L6
L4
R3
P4
R10
P10
U11
T11
V13
U13
R12
L5
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
VDDIOM
VDDIOM
GNDIOM
GNDIOM
VDDIOP0
VDDIOP0
VDDIOP1
VDDIOP1
GNDIOP
GNDIOP
GNDIOP
GNDIOP
VDDBU
GNDBU
VDDANA
GNDANA
VDDFUSE
GNDFUSE
VDDPLLA
GNDPLL
VDDOSC
GNDOSC
VDDUTMIC
VDDUTMII
GNDUTMI
ADVREF
U3-A
SAMA5D3x
0603
R57
0R
0603
R9
0R
A cooper for UTMI_GND net
cover all USB Components
top/bot
top/bot top/bot
top/bot
(3V3)
top/bot
17
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.5 Memory
4.3.5.1 Memory Organization
The SAMA5D3 series processor features a DDR/SDR memory interface and an External Bus Interface (EBI) to interface
to a wide range of external memories and to almost any kind of parallel peripheral.
4.3.5.2 Resource Allocation
This section describes the memory devices that equip the SAMA5D3 series CM board.
Two SDRAM/DDR2 are used as main system memory. MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board
provides up to 2 Gb of on-board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates at up to
166 MHz.
Figure 4-7. Embest/Flextronics DDR2 Memory
DDR2 SDRAM
DDR_A8 DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D15
DDR_D14
DDR_A1
DDR_A9
DDR_A2 DDR_D2
DDR_A10
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_D1
DDR_VREF
DDR_D0
DDR_A6
DDR_D4
DDR_D3
DDR_A7 DDR_D6
DDR_D5
DDR_D7
DDR_D8
DDR_A0
DDR_A8
DDR_D27
DDR_D26
DDR_D25
DDR_D31
DDR_D29
DDR_D28
DDR_D30
DDR_A1
DDR_A9
DDR_A2
DDR_A10
DDR_D18
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_VREF
DDR_D17
DDR_D16
DDR_A6
DDR_D19
DDR_D20
DDR_D22
DDR_A7 DDR_D23
DDR_D21
DDR_D24
DDR_A0
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CKE
DDR_WE
DDR_CLK
DDR_RAS
DDR_CLKN
DDR_CAS
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_WE
DDR_CKE
DDR_RAS
DDR_CLK
DDR_CAS
DDR_CLKN
DDR_A13
DDR_VREF
DDR_A13
VDDIODDR
VDDIODDR VDDIODDR
VDDIODDR
VDDIODDR
DDR_CKE{3}
DDR_CLK{3} DDR_CLKN{3}
DDR_CS{3}
DDR_CAS{3} DDR_RAS{3}
DDR_WE{3}
DDR_DQS1{3}
DDR_DQS0{3}
DDR_DQM1{3} DDR_DQM0{3}
DDR_DQS3{3}
DDR_DQS2{3}
DDR_DQM3{3} DDR_DQM2{3}
DDR_A[0..13]{3}
DDR_D[0..31]{3}
DDR_VREF {3}
DDR_BA0{3} DDR_BA1{3} DDR_BA2{3}
L8
10uH/150mA
L8
10uH/150mA
C54 100nFC54 100nF
R66
1.5K 1%
R66
1.5K 1%
C76 100nFC76 100nF
C77 100nFC77 100nF
C68 100nFC68 100nF
C62 100nFC62 100nF
C79 100nFC79 100nF
C85
100nF
C85
100nF
C80 100nFC80 100nF
C73 100nFC73 100nF
C75 100nFC75 100nF
C88
100nF
C88
100nF
TP22
SMD
TP22
SMD
C58 100nFC58 100nF
C64 100nFC64 100nF
C67 100nFC67 100nF
C69 100nFC69 100nF
C61 100nFC61 100nF
C56 100nFC56 100nF
C60 100nFC60 100nF
R91 DNPR91 DNP
R101 4.7K
R101 4.7K
C57 100nFC57 100nF
C78 100nFC78 100nF
C63 100nFC63 100nF
C72 100nFC72 100nF
R98 4.7KR98 4.7K
C89
4.7uF
C89
4.7uF
R99 4.7KR99 4.7K
C55 100nFC55 100nF
C86
100nF
C86
100nF
C74 100nFC74 100nF
R92 0RR92 0R
MT47H128M16RT
DDR2 SDRAM
MN9
MT47H128M16RT
DDR2 SDRAM
MN9
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
C83 100nFC83 100nF
C59 100nFC59 100nF
C53 100nFC53 100nF
C71 100nFC71 100nF C70 100nFC70 100nF
R94 0RR94 0R
C82 100nFC82 100nF
R64
1R
R64
1R R65
1.5K 1%
R65
1.5K 1%
C84 100nFC84 100nF
MT47H128M16RT
DDR2 SDRAM
MN8
MT47H128M16RT
DDR2 SDRAM
MN8
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
R93 DNPR93 DNP
C66 100nFC66 100nF
R100 4.7K
R100 4.7K
C87
4.7uF
C87
4.7uF
C65 100nFC65 100nF
C90
100nF
C90
100nF
C81 100nFC81 100nF
18
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-8. Ronetix DDR2 Memory
One NAND Flash: NAND is connected to the processor. Maximum size is 256 bytes.
One NOR Flash (optional, not populated): NOR Flash is 16 bits wide. Maximum size is 128 Mbytes.
DDR_A3
DDR_A6
DDR_A13
DDR_A12
DDR_A11
DDR_A2
DDR_A1
DDR_A0
DDR_A8
DDR_A5
DDR_A4
DDR_A10
DDR_A7
DDR_A9
DDR_A13
DDR_A11
DDR_A7
DDR_A6
DDR_A8
DDR_A0
DDR_A1
DDR_A4
DDR_A3
DDR_A5
DDR_A10
DDR_A9
DDR_A12
DDR_A2
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D27
DDR_D28
DDR_D31
DDR_D29
DDR_D30
DDR_D15
DDR_D20
DDR_D24
DDR_D22
DDR_D21
DDR_D23
DDR_D19
DDR_D18
DDR_D17
DDR_D16
DDR_D26
DDR_D25
DDR_D9
DDR_D11
DDR_D12
DDR_D4
DDR_D2
DDR_D10
DDR_D8
DDR_D7
DDR_D3
DDR_D6
DDR_D5
DDR_D0
DDR_D1
DDR_D13
DDR_D14
DDR_D1
DDR_D0
DDR_D12
DDR_D2
DDR_D9
DDR_D10
DDR_D11
DDR_D6
DDR_D5
DDR_D4
DDR_D3
DDR_D7
DDR_D8
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D31
DDR_D30
DDR_D24
DDR_D23
DDR_D22
DDR_D21
DDR_D18
DDR_D19
DDR_D20
DDR_D27
DDR_D26
DDR_D29
DDR_D28
DDR_D25
DDR_A[0-13]
DDR_A[0-13]DDR_A[0-13]
DDR_D[0-31]
DDR_D[0-15]
DDR_D[16-31]
DDR_ADDR
DDR_ADDRDDR_ADDR
DDR_DATA
DDR_DATA DDR_DATA
DDR_BA2
5
DDR_BA1
5
DDR_BA0
5
DDR_DQM2
5
DDR_DQS2
5
DDR_DQS3
5
DDR_WE#
5
DDR_CAS#
5
DDR_RAS#
5
DDR_CKE
5
DDR_DQM3
5
DDR_DQM1
5
DDR_DQM0
5
DDR_DQS1
5
DDR_DQS0
5
DDR_CK#
5
DDR_CK
5
DDR_CS#
5
DDR_RAS#
5
DDR_CAS#
5
DDR_WE#
5
DDR_BA0
5
DDR_BA2
5
DDR_BA1
5
DDR_VREF
5
DDR_DQM1
5
DDR_DQM0
5
DDR_BA0
5
DDR_BA1
5
DDR_RAS#
5
DDR_CS#
5
DDR_WE#
5
DDR_CAS#
5
DDR_BA2
5
DDR_CK
5
DDR_CK#
5
DDR_DQS1
5
DDR_DQS0
5
DDR_DQS2
5
DDR_DQS3
5
DDR_DQM3
5
DDR_DQM2
5
DDR_VREF
5
DDR_VREF
5
DDR_VREF
5
DDR_CKE
5
DDR_CKE
5
DDR_CK#
5
DDR_CK
5
DDR_VREF
5
DDR_CS#
5
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR VDDIODDR
GND
GND
GNDGND GND
GND
GND GND
GND GND
GND GND
GNDGND
GND
L7
BLM15AG121SN1D
C60
100n/10V
C63
100n/10V
C55
100n/10V
C58
100n/10V
C59
100n/10V
C51
100n/10V
C50
100n/10V
C54
100n/10V
C46
100n/10V
C47
100n/10V
C62
100n/10V
C65
100n/10V
C56
100n/10V
C44
100n/10V
C48
100n/10V
C45
100n/10V
C52
100n/10V
C49
100n/10V
C57
100n/10V
C53
100n/10V
C76
100n/10V
C77
100n/10V
C79
100n/10V
C108
100n/10V
C109
100n/10V
C110
100n/10V
C111
100n/10V
C112
100n/10V
C113
100n/10V
C114
100n/10V
C115
100n/10V
C116
100n/10V
C117
100n/10V
C118
100n/10V
C119
100n/10V
C120
100n/10V
C61
100n/10V
C64
4u7/6V3/X5R
B10
C11
A9
D11
B9
E10
D10
A8
C10
B8
F11
A7
D9
A6
H12
H17
H13
G17
G16
H15
F17
G15
F16
E17
G14
E16
D17
C18
D16
C17
B16
B18
C15
A18
C16
C14
D15
B14
A15
A14
E12
A11
B11
F12
A10
E11
G12
E15
B15
D12
E18
G18
B17
B13
D18
F18
A17
A13
C8
B12
A12
B7
G11
A5
B5
E9
B6
F9
C12
E13
C13
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQSN0
DDR_DQSN1
DDR_DQSN2
DDR_DQSN3
DDR_CS
DDR_CLK
DDR_CLKN
DDR_CKE
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CALN
DDR_CALP
DDR_VREF
U3-H
SAMA5D3x
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K3
L7
K7
L8
K9
K2
J8
K8
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
F7
E8
B7
A8
F3
B3
A2
E2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
RFU(A13)
RFU
RFU
BA0
BA1
BA2
WE#
CAS#
RAS#
CS#
ODT
CKE
CK
CK#
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS#/NU
UDQS
UDQS#/NU
LDM
UDM
NC
NC
VREF
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
U4
MT47H128M16RT-3:C
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K3
L7
K7
L8
K9
K2
J8
K8
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
F7
E8
B7
A8
F3
B3
A2
E2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
RFU(A13)
RFU
RFU
BA0
BA1
BA2
WE#
CAS#
RAS#
CS#
ODT
CKE
CK
CK#
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS#/NU
UDQS
UDQS#/NU
LDM
UDM
NC
NC
VREF
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
U5
MT47H128M16RT-3:C
0402
R12
1k5/1%
0402
R14
1k5/1%
0402
R51
0R
0402
R50
0R
DNP
0402
R52
0R
DNP
0402
R53
0R
0402
R11
1R
0402
R72
4k7
0402
R73
4k7
0402
R70
4k7
0402
R71
4k7
0402
R13
200R
0402
R10
200R
TP13
TP12
12.09.2012
group 1AB
group 1AB
A
top/bot
Differential
100 ohms
top/bot
top/bot
group 1AB
group 1AB
group 1AB
group 1AB
group 1AB
Zo=50 ohms
keeping propagation delay equal
(between 2A & 2B too)
DQS-4w-DQ-3w-DQM-4w-DQS
group 2B
L3 & L8
Data traces may not exceed 1.3 inches (33.0 mm).
Data traces must be length -matched to within 0 .1 in c h (2 .5 4 mm).
Data traces must match the data group trace lengths to within
0.25 inches (6.35 mm).
DQS-4w-DQ-3w-DQM-4w-DQS
Zo=50 ohms
keeping propagation delay equal
(between 2A & 2B too)
L3 & L8
group 2A
minimizing cro s s ta lk with [DQ, DQ S , DQM]
Zo=50 ohms
B
Keep nets as short as possible, therefore, DDR2 devices have to be placed close as possible of MIURA.
The layout EBI DDR2 should use controlled impedance traces of ZO = 50Ohm characteristic impedance.
Trace width = 0.13mm: target 50Ohm impedance.
Trace space = 0.30 to 0.38 mm.
Address and control traces may not exceed 1.3 inches (33.0 mm).
Address and control traces must be length-matched to within 0.1 inch (2.54 mm).
Address and control traces must match the data group trace lengths to within 0.25 inches (6.35 mm).
L3 & L8
group 3AB
Chenged U4 and U5
From MT47H64M16HR-25H to MT47H128M16RT-3:C
19
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-9. Embest/Flextronics External Memory
NRD
NWE
NANDCE
M_EBI_D2
M_EBI_D4
M_EBI_D3
M_EBI_D6
M_EBI_D7
M_EBI_D5
M_EBI_D0
M_EBI_D1
NANDCLE
NANDALE
NANDRDY
M_EBI_D4
M_EBI_D2
M_EBI_D10
M_EBI_D5
M_EBI_D12
M_EBI_D9
M_EBI_D14
M_EBI_D15
M_EBI_D3
M_EBI_D0
M_EBI_D6
M_EBI_D7
M_EBI_D8
M_EBI_D1
M_EBI_D13
M_EBI_D11
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A15
FLASH_A14
FLASH_A13
FLASH_A16
FLASH_A18
FLASH_A17
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
NRD
NWE
NCS0
FLASH_A23
NCS3
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOMVCC_3V3
NRST{2,6,7}
OE_Nandflash{5}
MN6
NL17SZ126
MN6
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
R48 0RR48 0R
C47
100nF
C47
100nF
C51
100nF
C51
100nF C52
100nF
C52
100nF
R34 470KR34 470K
R31
10K
R31
10K
R50 470KR50 470K
TP13
SMD
TP13
SMD
MN7
MT29F2G08ABAEAWP
MN7
MT29F2G08ABAEAWP
WE
18
N.C6
6
VCC 37
CE
9RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
DNU1
21
DNU2
22
N.C12
23
N.C13
24
R/B
7
I/O8_N.C 26
I/O9_N.C 27
I/O10_N.C 28
I/O0 29
VCC_N.C 34
N.C14
35
VSS 36
DNU3
38
VCC_N.C 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
VSS_N.C 25
I/O11_N.C 33
I/O1 30
I/O3 32
I/O2 31
I/O15_N.C 47
I/O14_N.C 46
I/O13_N.C 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
I/O12_N.C 40
VSS_N.C 48
R41 0RR41 0R
R30 100KR30 100K
L13
180ohm at 100MHz
L13
180ohm at 100MHz
1 2
R58
DNP
R58
DNP
R52 470KR52 470K
R29 100KR29 100K
C48
100nF
C48
100nF
R27 0RR27 0R
R45 470KR45 470K
C49
100nF
C49
100nF
R43 0RR43 0R
MN5
JS28F128P33TF70A
MN5
JS28F128P33TF70A
A1
29
A2
25
A3
24
A4
23
A5
22
A6
21
A7
20
A8
19
A9
8
A10
7
A11
6
A12
5
A13
4
A14
3
A15
2
A16
1
A17
55
A18
18
A19
17
A20
16
DQ0 34
DQ1 36
DQ2 39
DQ3 41
DQ4 47
DQ5 49
DQ6 51
DQ7 53
DQ8 35
DQ9 37
DQ10 40
DQ11 42
DQ12 48
DQ13 50
DQ14 52
DQ15 54
VCC 33
VCCQ 38
VPP
43 VSS 28
VSS 31
VSS 12
A21
11
NC 13
CE#
30
OE#
32
WE#
14
RST#
44
WP#
15
CLK
45
WAIT 56
A22
10
A23
9
RFU2 27
RFU1 26
ADV# 46
20
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-10. Ronetix External Memory
PE23/A23_NOR/CTS2
2;6
A22_NOR/NAND_CLE
6
A21_NOR/NAND_ALE
6
A3_NOR
6
D6
6D7
6
A1_NOR
6A2_NOR
6
A6_NOR
6
A5_NOR
6
A4_NOR
6
NRD_NOR/NAND_OE 6
NWE_NOR/NAND_WE 6
NRST 2;7;8
PE26/NCS0/TXD2 2;6
D3
6
D2
6
D1
6
A13_NOR
6
D0
6
A12_NOR
6
A15_NOR
6
A19_NOR
6A20_NOR
6
A18_NOR
6
A17_NOR
6
A16_NOR
6
A8_NOR
6
A11_NOR
6
A7_NOR
6
A9_NOR
6A10_NOR
6
D9
6
D8
6
D15
6
D14
6
D11
6
D10
6
D13
6
D12
6
A14_NOR
6
D5
6
D4
6
A11_NOR 6
A12_NOR 6
A4_NOR 6
A3_NOR 6
A2_NOR 6
A1_NOR 6
A10_NOR 6
A9_NOR 6
A8_NOR 6
A7_NOR 6
A6_NOR 6
A5_NOR 6
A13_NOR 6
A14_NOR 6
A19_NOR 6
A16_NOR 6
A15_NOR 6
A17_NOR 6
A18_NOR 6
D3 6
D1 6
D0 6
D2 6
D4 6
NWE_NOR/NAND_WE 6
D9 6
NRD_NOR/NAND_OE 6
D15 6
NAND_RD/BY 6
NAND_CS/NCS3 6
D8 6
D12 6
D13 6
D14 6
D10 6
D11 6
A22_NOR/NAND_CLE 6
A21_NOR/NAND_ALE 6
A20_NOR 6
PE29/NWR1(NBS1)/TCLK2 2
PE31/IRQ/PWML1 2
PE25/RXD2/1-Wire 2;6;8
PE23/A23_NOR/CTS2 2;6
PE27/NCS1/TIOA2/LCDDAT22 2
PE30/NWAIT 2
PE28/NCS2/TIOB2/LCDDAT23 2
PE26/NCS0/TXD2 2;6
PE24/RTS2 2;8
D7 6
D6 6
D5 6
VDD_IOM
VDD_IOM
GND
GND
C68 100n/10V
C67 100n/10V
C66 100n/10V
E3
H3
E4
H4
H5
E5
H6
E6
F3
G3
F4
G4
F5
G6
F6
G7
E2
D2
C2
A2
B2
D3
C3
A3
B6
A6
C6
D6
B7
A7
C7
D7
E7
B3
C4
D5
D4
C5
B8
A5
F2
G2
B5
F7
A4
B4
D8
F1
G5
A1
A8
B1
C1
C8
D1
E1
F8
G1
G8
H1
H8
E8
H2
H7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15/A-1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
W#
E#
G#
RP#
BYTE#
R/B#
VPP/WP#
VCCQ
VCCQ
VCC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSS
VSS
VSS
U6
M29W128GL70ZA6E
EN29GL128H90BAIP
P13
R14
R13
V18
P14
U18
T18
R15
P17
P15
P18
R16
N16
R17
N17
R18
N18
P16
M18
N15
M15
N14
M17
M13
M16
N12
M14
M12
L13
L15
L14
L16
K12
K15
K14
K16
K13
K17
J12
K18
J14
J16
J13
J17
J15
J18
H16
H18
L12
L18
L17
K11
PE0/A0(NBS0)
PE1/A1
PE2/A2
PE3/A3
PE4/A4
PE5/A5
PE6/A6
PE7/A7
PE8/A8
PE9/A9
PE10/A10
PE11/A11
PE12/A12
PE13/A13
PE14/A14
PE15/A15/SCK3
PE16/A16/CTS3
PE17/A17/RTS3
PE18/A18/RXD3
PE19/A19/TXD3
PE20/A20/SCK2
PE21/A21(NANDALE)
PE22/A22(NANDCLE)
PE23/A23/CTS2
PE24/A24/RTS2
PE25/A25/RXD2
PE26/NCS0/TXD2
PE27/NCS1/TIOA2/LCDDAT22
PE28/NCS2/TIOB2/LCDDAT23
PE29/NWR1(NBS1)/TCLK2
PE30/NWAIT
PE31/IRQ/PWML1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
NCS3
NANDRDY
NRD
NWE(NWR0)
U3-G
SAMA5D3x
0402
R16 22R
0402
R15
100k
Static Memory Controller and External Bus Interface
Alternative component : EN 29G L128H 90BAI P
NOR FLASH
NAND_RD/BY
6
D7 6
D6 6
NRD_NOR/NAND_OE
6NWE_NOR/NAND_WE
6
A22_NOR/NAND_CLE
6A21_NOR/NAND_ALE
6
D0 6
D3 6
D2 6
D1 6
NAND_CS_R/NCS3
6D5 6
D4 6
VDD_IOM
VDD_IOM
VDD_IOM
GND
C70 100n/10V
C71 100n/10V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
NC
NC
NC
NC
NC
RD/BY#
RE#
CE#
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP# NC
NC
NC
NC
NC
VSS!
NC
NC
NC
DQ0
DQ1
DQ2
DQ3
NC
VCC!
NC
VSS
VCC
DNU
VCC!
NC
DQ4
DQ5
DQ6
DQ7
NC
NC
DNU
VSS!
U8
MT29F2G08ABAEAWP-IT
HY27UF082G2B-TPCB
0402
R22 0R
0402
R19 0R
0402
R24
10k
NAND_WP
0402
R23
100k
0402
R17
100k
NAND FLASH
Alternative component : H Y27UF 082G2B-TPCB
21
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.6 Serial Peripheral Interface Controller (SPI)
The SAMA5D3 series processor provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used
to interface with the on-board serial Dat aFlash. Note that the on-board serial DataFlash is enabled through a jumper: JP1
on Embest modules, J1 on Ronetix modules. The jumper must be in place access (and boot) the serial DataFlash.
Figure 4-11. Embest/Flextronics Serial DataFlash on SPI
Figure 4-12. Ronetix Serial DataFlash on SPI
(SPI0_MIS0)
(SPI0_MOSI)
SERIAL DATAFLASH
(SPI0_SPCK)
(SPI0_NPCS0)
PD11
PD12
PD10
PD13
OE_Dataflash
VDDIOP1
VDDIOP1
VDDIOP1
VDDIOP1
OE_Nandflash{3}
BOOT_CS_OFF{7}
R69 0RR69 0R
R70 0RR70 0R
R68 0RR68 0R
D1
BAT54C
D1
BAT54C
32
1
C92
100nF
C92
100nF
JP1JP1
R71
10K
R71
10K
MN10
AT25DF321A
MN10
AT25DF321A
HOLD 7
GND 4
VCC 8
CS
1SCK
6SI
5
SO
2
WP 3
R67
470K
R67
470K
C91
100nF
C91
100nF
MN11
NL17SZ126
MN11
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
CS_BOOT_DISABLE
2
NAND_CS/NCS3
6
PD13/SPI0_CS0
2;6;9
NAND_CS_R/NCS3 6
PD11/SPI0_MOSI
2;6;9
PD10/SPI0_MISO
2;6;9
PD12/SPI0_SPCK
2;6;9
VDD_IOP0
VDD_IOM
VDD_IOP0
VDD_IOM
VDD_IOP0
VDD_IOP0
VDD_IOP0
GND
GND
GND
GND
GND
132
4
5
6
7
8
CS#
SO (SO I ) WP#
GND
SI (SIO )
SCK
HOLD#
VCC
U10
AT25DF321A-SH
D1
BAT54CWT1G
C72 100n/10V
C69 100n/10V
C73
100n/10V
1
2
J1
HEADER SM D 2x 1/ 2m m / 90dgr
1
2
J2
HEADER T H 2x 1/ 2m m /90dgr
0402
R25 0R DNP
0402
R27
10k
0402
R21
10k
0402
R65 22R
0402
R26
100k
5
OE
2Y
VCC
A4
1
3
GND
U11
SN74LVC1G126DBVT
5
OE
2Y
VCC
A4
1
3
GND
U9
SN74LVC1G126DBVT
SERIAL FLASH
Populate either R25 or J 1 / J 2/
22
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.7 1-Wire EEPROM
The SAMA5D3 series CM board uses a 1-wire device as a “soft label” to store information such as chip type,
manufacture name, production date, etc.
Only page 1 is used.
Warning: Do not modify the information contained in this page.
Pages 2 to n remain free for the user.
Figure 4-13. Embest 1-Wire EEPROM
Figure 4-14. Ronetix 1-Wire EEPROM
1-WIRE EEPROM
PE25
VDDIOM
R73 0RR73 0R
MN12
DS2431P+
MN12
DS2431P+
IO
2
GND
1
NC1 3
NC2 4
NC3 5
NC4 6
R72
1.5K
R72
1.5K
PE25/RXD2/1-Wire
2;6;8
VDD_IOM
GND
1
32 4
5
6
GND
IO NC
NC
NC
NC
U7
DS2431P
0402
R18
1k5/1%
0402
R20 0R
1-Wire EEPROM
23
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.8 Tri-Speed Ethe rn e t P HY
The SAMA5D3 series CM board is equipped with a MICREL PHY device (MICREL KSZ9021/31) operating at
10/100/1000 Mbps. The board supports the RGMII interface mode. The Ethernet interface consists of four pairs of low-
voltage differential pair signals designated from GRX± and GTx± plus control signals for link activity indicators. These
signals can be used to connect to a 10/100/1000 Base-T RJ45 connector integrated on the main board.
For more information about the Ethernet controller device, refer to the MICREL KSZ89021RN controller manufacturer's
datasheet.
Figure 4-15 . Em be s t/Flextroni cs GEth er net ETH0
G125CK
GTX0
GTX1
GTX2
GTX3
GRX0
GRX1
GRX2
GRX3
GTXCK
GTX_CTL
GRXCK
GRX_CTL
GMDC
GMDIO
INT_GETHR
PB4
PB5
PB6
PB7
PB3
PB2
PB1
PB0
PB16
PB11
PB13
PB9
PB8
PB25
PB17
PB18
XI
XO
XI
XO
VDDIOP1
DVDDL
AVDDL
AVDDH
AVDDL_PLL
VDDIOP1
VDDIOP1
VCC_3V3 AVDDL_PMOS AVDDL_PLL
AVDDL
DVDDL
VDDIOP1
VDDIOP1
LED1{7} LED2{7}
PB[0..31] {5,7}
NRST {2,3,7}
ETH0_TX1+{7} ETH0_TX1-{7}
ETH0_RX1+{7} ETH0_RX1-{7} ETH0_TX2+{7} ETH0_TX2-{7}
ETH0_RX2+{7} ETH0_RX2-{7}
+
C107
10uF
+
C107
10uF
+
C96
10uF
+
C96
10uF
R84 27RR84 27R
C105
10nF
C105
10nF
R89
4.7K
R89
4.7K
R85 27RR85 27R
L10
180ohm at 100MHz
L10
180ohm at 100MHz
1 2
C101
10nF
C101
10nF
C106
10nF
C106
10nF
RR26B 27RRR26B 27R
27
C117
10nF
C117
10nF
R102 27RR102 27R
C115
10uF
C115
10uF C114 20pFC114 20pF
+
C104
10uF
+
C104
10uF
RR26A 27RRR26A 27R
18
RR25D 27RRR25D 27R
45
R77 27RR77 27R
R80 27RR80 27R
RR25C 27RRR25C 27R
36
C102
10nF
C102
10nF
C120
10nF
C120
10nF
R78 4.7KR78 4.7K
Y3
25MHz
Y3
25MHz
1
23
4
L11
180ohm at 100MHz
L11
180ohm at 100MHz
12
RR25B 27RRR25B 27R
2 7
R95
4.7K
R95
4.7K
C100
10nF
C100
10nF
RR25A 27R
RR25A 27R
18
L9
180ohm at 100MHz
L9
180ohm at 100MHz
1 2
RR24D 27RRR24D 27R
45
R96
4.7K
R96
4.7K
L14
LQM2HPN1R0MG0L
L14
LQM2HPN1R0MG0L
RR24C 27RRR24C 27R
36
L12
180ohm at 100MHz
L12
180ohm at 100MHz
1 2
+
C116
47uF
+
C116
47uF
C118
22uF
C118
22uF
+
C103
10uF
+
C103
10uF
R33
10K 1%
R33
10K 1%
R79 1KR79 1K
R32
2K 1%
R32
2K 1%
R97
4.7K
R97
4.7K
R90
4.7K
R90
4.7K
C94
10nF
C94
10nF
R81 27RR81 27R
C108
10nF
C108
10nF
C97
10nF
C97
10nF
C95
10nF
C95
10nF
C111
10nF
C111
10nF C112
10nF
C112
10nF
C109
10nF
C109
10nF
C98
10nF
C98
10nF
+
C93
10uF
+
C93
10uF
R82 27RR82 27R
C113
10nF
C113
10nF
R83 4.99K 1%R83 4.99K 1%
MN13
SC189ASKTRT
MN13
SC189ASKTRT
VIN
1
GND
2
EN
3VOUT 4
LX 5
KSZ9021RN
48-pin QFN
MN17
KSZ9021RN
KSZ9021RN
48-pin QFN
MN17
KSZ9021RN
VSS_PS
13
LED2
15
DVDDH
16
LED1
17
DVDDL
14
TXD0
19
TXD1
20
TXD2
21
TXD3
22
DVDDL
18
DVDDL
23
GTX_CLK
24
TX_EN 25
DVDDL 26
RXD3 27
VSS 29
DVDDL 30
RXD1 31
RXD0 32
RX_DV 33
DVDDH 34
RX_CLK 35
MDC 36
MDIO 37
INT_N 38
DVDDL 39
DVDDH 40
CLK125_NDO 41
RESET_N 42
LDO_O 43
XO 45
XI 46
AVDDH 47
ISET 48
AVDDH
1
TXRXP_A
2
TXRXM_A
3
TXRXP_B
5
TXRXM_B
6
TXRXP_C
7
TXRXM_C
8
TXRXP_D
10
TXRXM_D
11
AVDDH
12
RXD2 28
AVDDL_PLL 44
P_GND 49
AVDDL
4
AVDDL
9
R87 27RR87 27R
C110
10nF
C110
10nF
R88 27R
R88 27R
C119 20pFC119 20pF
C99
10nF
C99
10nF
24
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 4-16. Ronetix GEthernet ETH0
ETH_V1
PB10/GTXER/RF1
2
PB5/GRX1
7
PB6/GRX2
7
PB4/GRX0
7
PB7/GRX3
7
PB11/RX_CLK
7
PB8/GTX_CLK
7
PB9/GTXEN
7
PB1/GTX1
7
PB0/GTX0
7
PB2/GTX2
7
PB3/GTX3
7
LED2
2
LED1
2
ETH0_TX1+
2
ETH0_TX1-
2
ETH0_RX1+
2
ETH0_RX1-
2
ETH0_TX2+
2
ETH0_TX2-
2
ETH0_RX2+
2
ETH0_RX2-
2
PB18/CLK125_NDO
7
PB12/RX_DV
2;7
PB25/SCK1/GRX6
2;7
PB16/GMDC
7
PB17/GMDIO
7
PB11/RX_CLK
7
PB7/GRX3
7
PB12/RX_DV
2;7
PB5/GRX1
7
PB6/GRX2
7
PB8/GTX_CLK
7
PB3/GTX3
7
PB4/GRX0
7
PB2/GTX2
7
PB0/GTX0
7
PB9/GTXEN
7
PB1/GTX1
7
NRST
2;6;8
PB13/GRXER/PWML3
2
PB18/CLK125_NDO
7
PB24/MCI1_CK/GRX5
2
PB17/GMDIO
7
PB16/GMDC
7
PB27/RTS1/PWMH1
2
PB28/RXD1
2
PB25/SCK1/GRX6
2;7
PB26/CTS1/GRX7
2
PB29/TXD1
2
PB30/DRXD
2
PB31/DTXD
2
PB19/MCI1_CDA/GTX4
2
PB23/MCI1_DA3/GRX4
2
PB21/MCI1_DA1/GTX6
2
PB22/MCI1_DA2/GTX7
2
PB20/MCI1_DA0/GTX5
2
PB15/GCOL/CANTX1
2
PB14/GCRS/CANRX1
2
ETH_DVDDH
ETH_DVDDH
ETH_AVDDL
ETH_AVDDL_PLL
ETH_AVDDH
ETH_DVDDH
ETH_DVDDL
ETH_DVDDH
ETH_AVDDH
VDD_IOP1
ETH_AVDDL_PLL
ETH_AVDDL
ETH_DVDDL
ETH_DVDDH
ETH_DVDDH
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GNDGNDGND GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
D2
BAS316
L14
BLM15AG121SN1D
L13
BLM15AG121SN1D
L8
BLM21PG221SN1D
L9
BLM21PG221SN1D
L11
BLM21PG221SN1D
L12
BLM21PG221SN1D
C99
1uF/10V
C96
10n/25V
C98
10n/25V
C95
10n/25V
C97
10n/25V
C87
10n/25V
C90
10n/25V
C91
10n/25V
C121
10n/25V
C85
10n/25V
C83
10n/25V
C84
10n/25V
C88
10n/25V
C89
10n/25V
C93
10n/25V
C106
10n/25V
C94
10n/25V
C127
10n/25V
C86
22p/50V
C82
22p/50V
C122
100n/10V
C107
100n/10V
C92
10u/6V3
C74
22u/6V3
C128
22u/6V3
C78
22u/6V3
C129
22u/6V3
C81
22u/6V3
C130
22u/6V3
C75
22u/6V3
C131
22u/6V3
C132
22u/6V3
Y4
CPX32-25.000MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46 47
48
49
AVDDH
TXRXP_A
TXRXM_A
AVDDL
TXRXP_B
TXRXM_B
TXRXP_C
TXRXM_C
AVDDL
TXRXP_D
TXRXM_D
AVDDH
VSS_PS
DVDDL
LED2/PHYAD1
DVDDH
LED1/PHYAD0
DVDDL
TXD0
TXD1
TXD2
TXD3
DVDDL
GTX_CLK
TX_EN
DVDDL
RXD3/MODE3
RXD2/MODE2
VSS
DVDDL
RXD1/MODE1
RXD0/MODE0
RX_DV/CLK125_EN
DVDDH
RX_CLK/PHYAD2
MDC
MDIO
INT_N
DVDDL
DVDDH
CLK125_NDO/LED_MODE
RESET_N
LDO_O
AVDDL_PLL
XO
XI
AVDDH
ISET
P_GND
U12
KSZ9021RN
L10
LQM2HPN1R0MG0L
T2
N7
T3
N6
P5
T4
R4
U1
R5
P3
R6
V3
P6
V1
R7
U3
P7
V2
V5
T6
N8
U4
M7
U5
M8
T5
N9
V4
M9
P8
M10
R9
PB0/GTX0/PWMH0
PB1/GTX1/PWML0
PB2/GTX2/TK1
PB3/GTX3/TF1
PB4/GRX0/PWMH1
PB5/GRX1/PWML1
PB6/GRX2/TD1
PB7/GRX3/RK1
PB8/GTXCK/PWMH2
PB9/GTXEN/PWML2
PB10/GTXER/RF1
PB11/GRXCK/RD1
PB12/GRXDV/PWMH3
PB13/GRXER/PWML3
PB14/GCRS/CANRX1
PB15/GCOL/CANTX1
PB16/GMDC
PB17/GMDIO
PB18/G125CK
PB19/MCI1_CDA/GTX4
PB20/MCI1_DA0/GTX5
PB21/MCI1_DA1/GTX6
PB22/MCI1_DA2/GTX7
PB23/MCI1_DA3/GRX4
PB24/MCI1_CK/GRX5
PB25/SCK1/GRX6
PB26/CTS1/GRX7
PB27/RTS1/PWMH1
PB28/RXD1
PB29/TXD1
PB30/DRXD
PB31/DTXD
U3-D
SAMA5D3x
0402
RS3
2k/1%
0402
R38
4k99/1%
0402
RS4
10k/1%
0402
R75
0R
DNP
0402
R40
0R
DNP
0402
R77
0R
DNP
0402
R36
1k
0402
R55
4k7
0402
R54
4k7
0402
R45
4k7
0402
R58
4k7
0402
R56
4k7
0402
R35
4k7
0402
R37
4k7
0402
R28
4k7
0402
R31
4k7
0402
R32
4k7
0402
R69
22R
0402
R68
22R
0402
R67
22R
0402
R66
22R
0402
R29
22R
0402
R34
22R
0402
R59
22R
0402
R30
22R
0402
R76
22R
0402
R60
22R
0402
R61
22R
0402
R62
22R
0402
R33
22R
0402
R39
100k
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U15
SC189ASKTRT 1V0
C80
22u/6V3
place close
to U3
RGMII Routing Constraints (Reduced Gigabit Media Independent Interface):
The RGMII signals must be length-matched by TX and RX groups.
That is, the TX group should be matched within 0.25 inch (6.35 mm),
and the RX group should be matched within 0.25 inch (6.35 mm).
Total length should not exceed 1.75 inch (44.5 mm).
There is no requirement to match the TX and RX groups
because their clocks are not related.
place close to CPU
0.5A !
max ?mA-->
max ?mA-->
top/bot
max ?mA-->
top/bot
place close
to KSZ9021RN
2A !
top/bot
top/bot
max 205mA-->
top/bot
max 345mA-->
2A !
2A !
max 563mA-->
place close to KSZ9021RN
top/bot
top/bot
top/bot
2A !
top/bot
top/bot
Cl=Cs+[C1xC 2]/[C1+C2]
if C1=C2 =>
C1,2=2[Cl-Cs] !!!
Cl is load capacitance of the cristal.
CS is the stray capacitance on the
printed circuit board,
typically a value of 5pf can be used
for calculation
max 13mA-->
top/bot
top/bot
top/bot
25
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.9 Indicators
There are two LEDs on the SAMA5D3 series CM board that can be controlled by the user. Both are controlled by GPIO
lines PE24 and PE25 as shown below.
Figure 4-17. Embest/Flextronics LED Indicators
Figure 4-18. Ronetix LED Indicators
LED
PE25
PE24
VCC_3V3
PE[23..31]{3,7}
R75
100K
R75
100K
R74
470R
R74
470R
R76
470R
R76
470R
Q1
IRLML2502
Q1
IRLML2502
1
3
2
D3 redD3 red
D2 BlueD2 Blue
PE24/RTS2
2;6 PE25/RXD2/1-Wire
2;6
VDD_IOM VDD_IOM
GND
S
D
G
Q1
BSS138W-7-F
DL2
LED 0603 - BLUE - LTST-C193TBKT-5A
DL1
LED 0603 - RED - LTST-C190CKT
0402
R46
1M
0402
R47
200R
0402
R49
200R
LEDS
26
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.3.10 SODIMM200 Interface
The SAMA5D3 series CM board uses SODIMM200 card edge connector to interface with the MB board.
Refer to Section 5.4.22 “SODIMM Card Edge Socket”.
4.3.11 Connectors
Figure 4-19 shows the mechanical dimensions of the SAMA5D3 series CM board outline and the mounting holes.
Figure 4-19. CPU Module Board Dimensions
Holes for mounting screws on carrier board.
27
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.4 Embest/Flextronics Schematics
This SAMA5D3x-EK CM board manufactured by Embest/Flextronics is available in Revision D and Revision E. In this
section, schematics are provided for both revisions.
4.4.1 CPU Module Revision D Schematics
This section contains the following schematics:
Block diagram
SAMA5D3x power
SAMA5D3x NOR and NAND
4 Gb DDR2
SAMA5D3x DataFlash, 1-wire, LED
Ethernet
200-pin SODIMM
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
AA
PIO A,...EPIO A,...E
PIO A&D
PIO B&E
PIO C
ATMEL
SAMA5D3 SERIES
S
O
D
I
M
M
C
O
N
N
E
C
T
O
R
PIO
CONNECTOR PIO
CONNECTOR PIO
CONNECTOR
EBI 4Gb
DDR2
SDRAM
2Gb
NAND
FLASH
128Mb
NOR
FLASH
ONE WIRE
EEPROM
SERIAL
DATA
FLASH
SERIAL
EEPROM
10/100/1000 FAST
ETHERNET
USB A,B,C
DIB
3V3 INPUT
VBAT
ANALOG Reference
ICE
Title:
:veR:rebmuN tnemucoD:eziS
fo:teehS:etaD
Draw By:
http://arm.embedinfo.com
DMARGAID KCOLB
SAMA5D3x-CM
A3 17Monday, September 17, 2012Zhu Xueliang
Title:
:veR:rebmuN tnemucoD:eziS
fo:teehS:etaDDraw By:
http://arm.embedinfo.com
DMARGAID KCOLB
SAMA5D3x-CM
A3 17Monday, September 17, 2012Zhu Xueliang
Title:
:veR:rebmuN tnemucoD:eziS
fo:teehS:etaDDraw By:
http://arm.embedinfo.com
DMARGAID KCOLB
SAMA5D3x-CM
A3 17Monday, September 17, 2012Zhu Xueliang
ARM CORTEX A5-BASED PROCESSOR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TDO
NTRST
NRST
SHDN
WKUP
TDI
TMS
TCK
TDO
NRST
WKUP
SHDN
NTRST
TDI
TMS
TCK
PWR_EN
PWR_EN
VCC_3V3
ADVREF
VDDIOP1
VDDIOP0
VDDBU
VDDBU
VDDIOP0
VDDBU
VDDIOM
VDDIOP0
VCC_3V3
VCC_1V2
VCC_1V2 VCC_3V3VDDOSC
VDDOSC
FUSE_2V5 VCC_3V3
VDDANA
VDDPLLA
GNDUTMI
GNDUTMI
GNDUTMI
VCC_3V3
FUSE_2V5
GNDUTMI
VDDIODDR VCC_3V3
VCC_3V3
VCC_3V3
VCC_1V2
VCC_3V3
VCC_3V3
HHSDMB{7} HHSDPB{7}
HHSDMC{7} HHSDPC{7}
DIBP{7} DIBN{7}
HHSDMA{7} HHSDPA{7}
TMS{7} TCK{7} TDO{7}
NRST{3,6,7}
JTAGSEL{7} TDI{7}
NTRST{7}
BMS{7}
WKUP{7} SHDN{7}
PWR_EN
{7}
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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SAMA5D3x-I&POWER D
SAMA5D3x-CM
A3 27Friday, September 21, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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SAMA5D3x-I&POWER D
SAMA5D3x-CM
A3 27Friday, September 21, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
SAMA5D3x-I&POWER D
SAMA5D3x-CM
A3 27Friday, September 21, 2012Zhu Xueliang
TP16
SMD
TP16
SMD
TP8
SMD
TP8
SMD
C41
100nF
C41
100nF
TP14
SMD
TP14
SMD
C36 20pFC36 20pF
C9
100nF
C9
100nF
SUP1
CA89405MF
DNP
SUP1
CA89405MF
DNP
TP2
SMD
TP2
SMD
TP4
SMD
TP4
SMD
C10
100nF
C10
100nF
R39
100K 1%
R0402
R39
100K 1%
R0402
R111 0RR111 0R
TP7
SMD
TP7
SMD
C23
100nF
C23
100nF
Y1
12MHz
Y1
12MHz
1
23
4
MN15 RT9018B-18GSP
SOP_8__50_154X193_69
MN15 RT9018B-18GSP
SOP_8__50_154X193_69
NC 5
EN 2
ADJ
7
VOUT
6VIN 3
GND(PAD)
9
GND
8
VDD 4
PGOOD
1
R8 10KR8 10K
R49
DNP
R0402
R49
DNP
R0402
C33
100nF
C33
100nF
C24
100nF
C24
100nF
TP10
SMD
TP10
SMD
R16
1R
R16
1R
C6
100nF
C6
100nF
TP15
SMD
TP15
SMD
C7
100nF
C7
100nF
C42
4.7uF
C42
4.7uF
MN14
XC6206P251MR-G
Voltage Detector
MN14
XC6206P251MR-G
Voltage Detector
Vo
2
Vss
1Vin 3
C37
4.7uF
C37
4.7uF
C38
4.7uF
C38
4.7uF
MN2H
SAMA5D3x_BGA324
MN2H
SAMA5D3x_BGA324
GNDCORE_1
A16
VDDCORE_1 C5
VDDCORE_2 C7
GNDCORE_2
C9
VDDIODDR_1 D13
VDDCORE_3 D14
GNDIODDR_1
E14
GNDIODDR_2
F10
GNDIODDR_3
F13
VDDIODDR_2 F14
GNDIODDR_4
F15 VDDIOP0_1 G7
VDDIODDR_3 G10
VDDIODDR_4 G13
VDDIODDR_5 H11
GNDIODDR_5
H14
GNDIOP_1
J7
GNDIOM_1
J11
GNDANA
L4
ADVREF L5
VDDANA L6
VDDIOP1_1 L11
VDDIOP1_2 M4
TDO
M11 TMS
N10
GNDIOP_2
N11
GNDCORE_3
N13
GNDFUSE
P4
TCK
P9
GNDPLL
P10
NTRST
P11
GNDUTMI_1
R12
VDDFUSE R3
TDI
R8
VDDPLLA R10
VBG
R11
VDDIOM_1 P12
VDDCORE_4 T7
GNDCORE_4
T8
JTAGSEL
T9
WKUP
T10
GNDOSC
T11
SHDN
T12
GNDBU
T13
GNDCORE_5
T14
VDDCORE_5 T15
VDDIOM_2 T16
GNDIOM_2
T17
GNDIOP_3
U7
XIN
U8
BMS
U9
VDDOSC U11
VDDUTMII U13
TST
U15
XIN32
U16
VDDCORE_6 U17
VDDCORE_7 V7
XOUT
V8
NRST
V9
VDDIOP0_2 V11
VDDUTMIC V13
VDDBU V15
XOUT32
V16
GNDCORE_6
V17
GNDIOP_4
E5
HHSDMA
V10
HHSDPA
U10
HHSDMC
V14
HHSDPC
U14
HHSDPB
U12 HHSDMB
V12
DIBN
U6
DIBP
V6
TP1
SMD
TP1
SMD
C8
100nF
C8
100nF
L1
180ohm at 100MHz
L1
180ohm at 100MHz
1 2
L7
10uH/150mA
L7
10uH/150mA
C3
100nF
C3
100nF
L5
10uH/150mA
L5
10uH/150mA
L6
10uH/150mA
L6
10uH/150mA
C131
100nF
C0603
C131
100nF
C0603
C127
1uF
C127
1uF
C40
100nF
C40
100nF
R7 100KR7 100K
C1
100nF
C1
100nF
C34
100nF
C34
100nF
RR1D
100K
RR1D
100K
4 5
R10
1R
R10
1R
R11
1R
R11
1R
C128
100nF
C0603
C128
100nF
C0603
R40
100K 1%
R0402
R40
100K 1%
R0402
C27 20pFC27 20pF
TP11
SMD
TP11
SMD
L152.2uH
3D16-2
L152.2uH
3D16-2
C2
100nF
C2
100nF
TP17
SMD
TP17
SMD
C134
10uF
C0805
C134
10uF
C0805
C11
100nF
C11
100nF
TP3
SMD
TP3
SMD
TP19
SMD
TP19
SMD
Y2 32.768 kHzY2 32.768 kHz
12
C43
100nF
C43
100nF
R51
47K 1%
R0402
R51
47K 1%
R0402
C39
100nF
C39
100nF
C121
1uF
C121
1uF
TP6
SMD
TP6
SMD
RR1C 100KRR1C 100K
3 6
C19
100nF
C19
100nF
C32
100nF
C32
100nF
C25
10uF
C0805
C25
10uF
C0805
TP9
SMD
TP9
SMD
C44
10pF
C44
10pF
C29
100nF
C29
100nF
TP12
SMD
TP12
SMD
TP18
SMD
TP18
SMD
C30 20pFC30 20pF
C28
100nF
C28
100nF
C130
10uF
C0805
C130
10uF
C0805
C15
4.7uF
C15
4.7uF
C5
100nF
C5
100nF
RR1B 100K
RR1B 100K
2 7
C31 20pFC31 20pF
C132
10uF
C132
10uF
R4
DNP
R4
DNP
R38
200K 1%
R0402
R38
200K 1%
R0402
L2
180ohm at 100MHz
L2
180ohm at 100MHz
1 2
R6 100KR6 100K
C13
22pF
C0402
C13
22pF
C0402
R44
DNP
R0402
R44
DNP
R0402
C12
100nF
C12
100nF
TP5
SMD
TP5
SMD
C17
100nF
C17
100nF
R19
5.62K 1%
R19
5.62K 1%
C20
100nF
C20
100nF
C14
10nF
C0402
C14
10nF
C0402
MN16 RT8010GQW
WDFN-6L_2X2
MN16 RT8010GQW
WDFN-6L_2X2
NC
1
EN 2
VIN 3
LX
4
GND
5
FB
6
PAD
7
R109
0R
R109
0R
C35
100nF
C35
100nF
C18
100nF
C18
100nF
RR1A
100K
RR1A
100K
1 8
C21
100nF
C21
100nF
C4
100nF
C4
100nF
R46
23.7K 1%
R0402
R46
23.7K 1%
R0402
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A7
DDR_A12
FLASH_A2
FLASH_A7
FLASH_A8
FLASH_A15
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A13
DDR_D12
DDR_D13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D26
DDR_D27
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D30
DDR_D31
DDR_D28
DDR_D29
FLASH_A12
FLASH_A13
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A14
M_EBI_D12
M_EBI_D13
M_EBI_D8
M_EBI_D9
M_EBI_D10
M_EBI_D11
M_EBI_D14
M_EBI_D15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
FLASH_A23
NRD
NWE
NANDCE
M_EBI_D2
M_EBI_D4
M_EBI_D3
M_EBI_D6
M_EBI_D7
M_EBI_D5
M_EBI_D0
M_EBI_D1
NANDCLE
NANDALE
NANDRDY
M_EBI_D4
M_EBI_D2
M_EBI_D10
M_EBI_D5
M_EBI_D12
M_EBI_D9
M_EBI_D14
M_EBI_D15
M_EBI_D3
M_EBI_D0
M_EBI_D6
M_EBI_D7
M_EBI_D8
M_EBI_D1
M_EBI_D13
M_EBI_D11
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A15
FLASH_A14
FLASH_A13
FLASH_A16
FLASH_A18
FLASH_A17
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
NRD
NWE
NCS0
FLASH_A23
PE24
PE25
PE27
PE28
PE29
PE30
PE31
PE26
PE23
M_EBI_A23
M_EBI_A22
M_EBI_A21
NCS0
NANDCLE
NANDALE
NCS3
NRD
NWE
NANDRDY
NCS3
M_EBI_A0
FLASH_A1
DDR_A0
M_EBI_D0
M_EBI_D1
M_EBI_D2
M_EBI_D3
M_EBI_D4
M_EBI_D5
M_EBI_D6
M_EBI_D7
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIODDR
VDDIOM
VDDIOM
VDDIOMVCC_3V3
DDR_D[0..31] {4}
NRST{2,6,7}
DDR_VREF {4}
PE[23..31] {5,7}
OE_Nandflash{5}
DDR_A[0..13] {4}
DDR_DQS1 {4}
DDR_DQS2 {4}
DDR_DQS3 {4}
DDR_WE {4}
DDR_CS {4}
DDR_BA0 {4}
DDR_DQM0 {4}
DDR_BA1 {4}
DDR_BA2 {4}
DDR_DQM1 {4}
DDR_DQM2 {4}
DDR_RAS {4}
DDR_CAS {4}
DDR_DQM3 {4}
DDR_DQS0 {4}
DDR_CKE {4}
DDR_CLK {4}
DDR_CLKN {4}
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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SAMA5D3x-II&NOR&NAND D
SAMA5D3x-CM
A3 37Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
SAMA5D3x-II&NOR&NAND D
SAMA5D3x-CM
A3 37Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
SAMA5D3x-II&NOR&NAND D
SAMA5D3x-CM
A3 37Wednesday, September 19, 2012Zhu Xueliang
MN6
NL17SZ126
MN6
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
R20 27RR20 27R
R22 27RR22 27R
MN2E
SAMA5D3x_BGA324
MN2E
SAMA5D3x_BGA324
PE0_A0/NBS0 P13
PE1_A1 R14
PE2_A2 R13
PE3_A3 V18
PE4_A4 P14
PE5_A5 U18
PE6_A6 T18
PE7_A7 R15
PE8_A8 P17
PE9_A9 P15
PE10_A10 P18
PE11_A11 R16
PE12_A12 N16
PE13_A13 R17
PE14_A14 N17
PE15_A15_SCK3 R18
PE16_A16_CTS3 N18
PE17_A17_RTS3 P16
PE18_A18_RXD3 M18
PE19_A19_TXD3 N15
PE20_A20_SCK2 M15
PE21_A21/NANDALE N14
PE22_A22/NANDCLE M17
PE23_A23_CTS2 M13
PE24_A24_RTS2 M16
PE25_A25_RXD2 N12
PE26_NCS0_TXD2 M14
PE27_NCS1_TIOA2 M12
PE28_NCS2_TIOB2 L13
PE29_NWR1/NBS1_TCLK2 L15
PE30_NWAIT L14
PE31_IRQ_PWML1 L16
R48 0RR48 0R
C47
100nF
C47
100nF
TP21
SMD
TP21
SMD
C50 100nF
C50 100nF
R23 0RR23 0R
C51
100nF
C51
100nF C52
100nF
C52
100nF
R34 470KR34 470K
R25 0RR25 0R
MN2G
SAMA5D3x_BGA324
MN2G
SAMA5D3x_BGA324
D14 H16
D16 H18
D6 J12
D8 J14
D9 J16
D11 J17
D13 J18
NWE_NWR0 K11
D0 K12
D4 K13
D2 K14
D1 K15
D3 K16
D5 K17
D7 K18
NCS3 L12
NRD L17
NANDRDY L18
D10 J13
D12 J15
R31
10K
R31
10K
R63
200R 1%
R63
200R 1%
R28 0RR28 0R
R62 200R 1%R62 200R 1%
R50 470KR50 470K
TP13
SMD
TP13
SMD
MN7
MT29F2G08ABAEAWP
MN7
MT29F2G08ABAEAWP
WE
18
N.C6
6
VCC 37
CE
9RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
DNU1
21
DNU2
22
N.C12
23
N.C13
24
R/B
7
I/O8_N.C 26
I/O9_N.C 27
I/O10_N.C 28
I/O0 29
VCC_N.C 34
N.C14
35
VSS 36
DNU3
38
VCC_N.C 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
VSS_N.C 25
I/O11_N.C 33
I/O1 30
I/O3 32
I/O2 31
I/O15_N.C 47
I/O14_N.C 46
I/O13_N.C 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
I/O12_N.C 40
VSS_N.C 48
R24 0RR24 0R
R21 27RR21 27R
R41 0RR41 0R
R30 100KR30 100K
L13
180ohm at 100MHz
L13
180ohm at 100MHz
1 2
R58
DNP
R58
DNP
R52 470KR52 470K
R29 100KR29 100K
C48
100nF
C48
100nF
R26 0RR26 0R
MN2F
SAMA5D3x_BGA324
MN2F
SAMA5D3x_BGA324
DDR_CAS A5
DDR_A13 A6
DDR_A11 A7
DDR_A7 A8
DDR_A2 A9
DDR_D30 A10
DDR_D27 A11
DDR_CLKN A12
DDR_DQSN3 A13
DDR_D25 A14
DDR_D24 A15
DDR_DQSN2 A17
DDR_D19 A18
DDR_WE B5
DDR_BA1 B6
DDR_CKE B7
DDR_A9 B8
DDR_A4 B9
DDR_A0 B10
DDR_D28 B11
DDR_CLK B12
DDR_DQS3 B13
DDR_D23 B14
DDR_DQM2 B15
DDR_D16 B16
DDR_DQS2 B17
DDR_D17 B18
DDR_CS C8
DDR_A8 C10
DDR_A1 C11
DDR_CALN C12
DDR_VREF C13
DDR_BA0 E9
DDR_DQSN0 D18
DDR_D12 D17
DDR_D14 D16
DDR_D22 D15
DDR_DQM3 D12
DDR_A3 D11
DDR_A6 D10
DDR_A12 D9
DDR_D13 C18
DDR_D15 C17
DDR_D20 C16
DDR_D18 C15
DDR_D21 C14
DDR_A5 E10
DDR_D31 E11
DDR_D26 E12
DDR_CALP E13
DDR_BA2 F9
DDR_A10 F11
DDR_D29 F12
DDR_D8 F16
DDR_D6 F17
DDR_DQSN1 F18
DDR_RAS G11
DDR_DQM0 G12
DDR_D10 G14
DDR_D7 G15
DDR_D4 G16
DDR_D3 G17
DDR_DQS1 G18
DDR_D0 H12
DDR_D2 H13
DDR_D5 H15
DDR_D1 H17
DDR_DQM1 E15
DDR_D11 E16
DDR_D9 E17
DDR_DQS0 E18
R27 0RR27 0R
R45 470KR45 470K
C49
100nF
C49
100nF
R43 0RR43 0R
MN5
JS28F128P33TF70A
MN5
JS28F128P33TF70A
A1
29
A2
25
A3
24
A4
23
A5
22
A6
21
A7
20
A8
19
A9
8
A10
7
A11
6
A12
5
A13
4
A14
3
A15
2
A16
1
A17
55
A18
18
A19
17
A20
16
DQ0 34
DQ1 36
DQ2 39
DQ3 41
DQ4 47
DQ5 49
DQ6 51
DQ7 53
DQ8 35
DQ9 37
DQ10 40
DQ11 42
DQ12 48
DQ13 50
DQ14 52
DQ15 54
VCC 33
VCCQ 38
VPP
43 VSS 28
VSS 31
VSS 12
A21
11
NC 13
CE#
30
OE#
32
WE#
14
RST#
44
WP#
15
CLK
45
WAIT 56
A22
10
A23
9
RFU2 27
RFU1 26
ADV# 46
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR2 SDRAM
DDR_A8 DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D15
DDR_D14
DDR_A1
DDR_A9
DDR_A2 DDR_D2
DDR_A10
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_D1
DDR_VREF
DDR_D0
DDR_A6
DDR_D4
DDR_D3
DDR_A7 DDR_D6
DDR_D5
DDR_D7
DDR_D8
DDR_A0
DDR_A8
DDR_D27
DDR_D26
DDR_D25
DDR_D31
DDR_D29
DDR_D28
DDR_D30
DDR_A1
DDR_A9
DDR_A2
DDR_A10
DDR_D18
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_VREF
DDR_D17
DDR_D16
DDR_A6
DDR_D19
DDR_D20
DDR_D22
DDR_A7 DDR_D23
DDR_D21
DDR_D24
DDR_A0
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CKE
DDR_WE
DDR_CLK
DDR_RAS
DDR_CLKN
DDR_CAS
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_WE
DDR_CKE
DDR_RAS
DDR_CLK
DDR_CAS
DDR_CLKN
DDR_A13
DDR_VREF
DDR_A13
VDDIODDR
VDDIODDR VDDIODDR
VDDIODDR
VDDIODDR
DDR_CKE{3}
DDR_CLK{3} DDR_CLKN{3}
DDR_CS{3}
DDR_CAS{3} DDR_RAS{3}
DDR_WE{3}
DDR_DQS1{3}
DDR_DQS0{3}
DDR_DQM1{3} DDR_DQM0{3}
DDR_DQS3{3}
DDR_DQS2{3}
DDR_DQM3{3} DDR_DQM2{3}
DDR_A[0..13]{3}
DDR_D[0..31]{3}
DDR_VREF {3}
DDR_BA0{3} DDR_BA1{3} DDR_BA2{3}
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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4Gb DDR2 D
SAMA5D3x-CM
A3 47Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
4Gb DDR2 D
SAMA5D3x-CM
A3 47Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
4Gb DDR2 D
SAMA5D3x-CM
A3 47Wednesday, September 19, 2012Zhu Xueliang
L8
10uH/150mA
L8
10uH/150mA
C54 100nFC54 100nF
R66
1.5K 1%
R66
1.5K 1%
C76 100nFC76 100nF
C77 100nFC77 100nF
C68 100nFC68 100nF
C62 100nFC62 100nF
C79 100nFC79 100nF
C85
100nF
C85
100nF
C80 100nFC80 100nF
C73 100nFC73 100nF
C75 100nFC75 100nF
C88
100nF
C88
100nF
TP22
SMD
TP22
SMD
C58 100nFC58 100nF
C64 100nFC64 100nF
C67 100nFC67 100nF
C69 100nFC69 100nF
C61 100nFC61 100nF
C56 100nFC56 100nF
C60 100nFC60 100nF
R91 DNPR91 DNP
R101 4.7K
R101 4.7K
C57 100nFC57 100nF
C78 100nFC78 100nF
C63 100nFC63 100nF
C72 100nFC72 100nF
R98 4.7KR98 4.7K
C89
4.7uF
C89
4.7uF
R99 4.7KR99 4.7K
C55 100nFC55 100nF
C86
100nF
C86
100nF
C74 100nFC74 100nF
R92 0RR92 0R
MT47H128M16RT
DDR2 SDRAM
MN9
MT47H128M16RT
DDR2 SDRAM
MN9
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
C83 100nFC83 100nF
C59 100nFC59 100nF
C53 100nFC53 100nF
C71 100nFC71 100nF C70 100nFC70 100nF
R94 0RR94 0R
C82 100nFC82 100nF
R64
1R
R64
1R R65
1.5K 1%
R65
1.5K 1%
C84 100nFC84 100nF
MT47H128M16RT
DDR2 SDRAM
MN8
MT47H128M16RT
DDR2 SDRAM
MN8
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
R93 DNPR93 DNP
C66 100nFC66 100nF
R100 4.7K
R100 4.7K
C87
4.7uF
C87
4.7uF
C65 100nFC65 100nF
C90
100nF
C90
100nF
C81 100nFC81 100nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1-WIRE EEPROM
LED
(SPI0_MIS0)
(SPI0_MOSI)
SERIAL DATAFLASH
(SPI0_SPCK)
(SPI0_NPCS0)
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA15
PA14
PA13
PA12
PA16
PA17
PA18
PA19
PA23
PA22
PA21
PA20
PA25
PA24
PA28
PA29
PA30
PA31
PA27
PA26
PC3
PC2
PC1
PC0
PC13
PC12
PC8
PC9
PC4
PC5
PC6
PC7
PC28
PC16
PC17
PC18
PC10
PC11
PC15
PC14
PC26
PC19
PC23
PC22
PC21
PC20
PC25
PC24
PC29
PC30
PC31
PC27
PD3
PD2
PD1
PD0
PD13
PD12
PD8
PD9
PD4
PD5
PD6
PD7
PD28
PD16
PD17
PD18
PD10
PD11
PD15
PD14
PD26
PD19
PD23
PD22
PD21
PD20
PD25
PD24
PD29
PD30
PD31
PD27
PB3
PB2
PB1
PB0
PB13
PB12
PB8
PB9
PB4
PB5
PB6
PB7
PB28
PB16
PB17
PB18
PB10
PB11
PB15
PB14
PB26
PB19
PB23
PB22
PB21
PB20
PB25
PB24
PB29
PB30
PB31
PB27
PE25
PE24
PD11
PD12
PD10
PE25
PD13
OE_Dataflash
VDDIOM
VDDIOP1
VDDIOP1
VDDIOP1
VDDIOP1
VCC_3V3
PA[0..31] {7} PC[0..31] {7}
PD[0..31] {7}PB[0..31] {6,7}
PE[23..31]{3,7}
OE_Nandflash{3}
BOOT_CS_OFF{7}
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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SAMA5D3x-III&DATAFLASH&1-WIRE,LED D
SAMA5D3x-CM
A3 57Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
http://arm.embedinfo.com
SAMA5D3x-III&DATAFLASH&1-WIRE,LED D
SAMA5D3x-CM
A3 57Wednesday, September 19, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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SAMA5D3x-III&DATAFLASH&1-WIRE,LED D
SAMA5D3x-CM
A3 57Wednesday, September 19, 2012Zhu Xueliang
R75
100K
R75
100K
R69 0RR69 0R
R74
470R
R74
470R
R76
470R
R76
470R
Q1
IRLML2502
Q1
IRLML2502
1
32
R70 0RR70 0R
R68 0RR68 0R
MN2D
SAMA5D3x_BGA324
MN2D
SAMA5D3x_BGA324
PD0 K5
PD1 P1
PD2 K6
PD3 R1
PD4 L7
PD5 P2
PD6 L8
PD7 R2
PD8 K7
PD9 U2
PD10 K9
PD11 M5
PD12 K10
PD13 N4
PD14 L9
PD15 N3
PD16 L10
PD17 N5
PD18 M6
PD19 T1
PD20 N2
PD21 M3
PD22 M2
PD23 L3
PD24 M1
PD25 N1
PD26 L1
PD27 L2
PD28 K1
PD29 K2
PD30 J1
PD31 J2
R73 0RR73 0R
MN2B
SAMA5D3x_BGA324
MN2B
SAMA5D3x_BGA324
PB0_GTX0 T2
PB1_GTX1 N7
PB2_GTX2 T3
PB3_GTX3 N6
PB4_GRX0 P5
PB5_GRX1 T4
PB6_GRX2 R4
PB7_GRX3 U1
PB8_GTXCK R5
PB9_GTXEN P3
PB10_GTXER R6
PB11_GRXCK V3
PB12_GRXDV P6
PB13_GRXER V1
PB14_GCRS R7
PB15_GCOL U3
PB16_GMDC P7
PB17_GMDIO V2
PB18_G125CK V5
PB19_GTX4 T6
PB20_GTX5 N8
PB21_GTX6 U4
PB22_GTX7 M7
PB23_GRX4 U5
PB24_GRX5 M8
PB25_GRX6 T5
PB26_GRX7 N9
PB27 V4
PB28 M9
PB29 P8
PB30 M10
PB31 R9
D1
BAT54C
D1
BAT54C
32
1
MN12
DS2431P+
MN12
DS2431P+
IO
2
GND
1
NC1 3
NC2 4
NC3 5
NC4 6
R72
1.5K
R72
1.5K
C92
100nF
C92
100nF
D3 redD3 red
JP1JP1
R71
10K
R71
10K
MN10
AT25DF321A
MN10
AT25DF321A
HOLD 7
GND 4
VCC 8
CS
1SCK
6SI
5
SO
2
WP 3
MN2C
SAMA5D3x_BGA324
MN2C
SAMA5D3x_BGA324
PC0_ETX0 D8
PC1_ETX1 A4
PC2_ERX0 E8
PC3_ERX1 A3
PC4_ETXEN A2
PC5_ECRSDV F8
PC6_ERXER B3
PC7_EREFCK G8
PC8_EMDC B4
PC9_EMDIO F7
PC10 A1
PC11 D7
PC12 C6
PC13 E7
PC14 B2
PC15 F6
PC16 B1
PC17 E6
PC18 C3
PC19 D6
PC20 C4
PC21 D5
PC22 C2
PC23 G9
PC24 C1
PC25 H10
PC26 H9
PC27 D4
PC28 H8
PC29 G5
PC30 D3
PC31 E4
MN2A
SAMA5D3x_BGA324
MN2A
SAMA5D3x_BGA324
PA0_LCDDAT0 E3
PA1_LCDDAT1 F5
PA2_LCDDAT2 D2
PA3_LCDDAT3 F4
PA4_LCDDAT4 D1
PA5_LCDDAT5 J10
PA6_LCDDAT6 G4
PA7_LCDDAT7 J9
PA8_LCDDAT8 F3
PA9_LCDDAT9 J8
PA10_LCDDAT10 E2
PA11_LCDDAT11 K8
PA12_LCDDAT12 F2
PA13_LCDDAT13 G6
PA14_LCDDAT14 E1
PA15_LCDDAT15 H5
PA16_LCDDAT16 H3
PA17_LCDDAT17 H6
PA18_LCDDAT18 H4
PA19_LCDDAT19 H7
PA20_LCDDAT20 H2
PA21_LCDDAT21 J6
PA22_LCDDAT22 G2
PA23_LCDDAT23 J5
PA24_LCDPWM F1
PA25_LCDDISP J4
PA26_LCDVSYNC G3
PA27_LCDHSYNC J3
PA28_LCDPCK G1
PA29_LCDDEN K4
PA30_TWD0 H1
PA31_TWCK0 K3
R67
470K
R67
470K
C91
100nF
C91
100nF
MN11
NL17SZ126
MN11
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
D2 BlueD2 Blue
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
G125CK
GTX0
GTX1
GTX2
GTX3
GRX0
GRX1
GRX2
GRX3
GTXCK
GTX_CTL
GRXCK
GRX_CTL
GMDC
GMDIO
INT_GETHR
PB4
PB5
PB6
PB7
PB3
PB2
PB1
PB0
PB16
PB11
PB13
PB9
PB8
PB25
PB17
PB18
XI
XO
XI
XO
VDDIOP1
DVDDL
AVDDL
AVDDH
AVDDL_PLL
VDDIOP1
VDDIOP1
VCC_3V3 AVDDL_PMOS AVDDL_PLL
AVDDL
DVDDL
VDDIOP1
VDDIOP1
LED1{7} LED2{7}
PB[0..31] {5,7}
NRST {2,3,7}
ETH0_TX1+{7} ETH0_TX1-{7}
ETH0_RX1+{7} ETH0_RX1-{7} ETH0_TX2+{7} ETH0_TX2-{7}
ETH0_RX2+{7} ETH0_RX2-{7}
Title:
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ETHERNET D
SAMA5D3x-CM
A3 67Friday, September 21, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
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ETHERNET D
SAMA5D3x-CM
A3 67Friday, September 21, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
Date: Sheet: of
Draw By:
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ETHERNET D
SAMA5D3x-CM
A3 67Friday, September 21, 2012Zhu Xueliang
+
C107
10uF
+
C107
10uF
+
C96
10uF
+
C96
10uF
R84 27RR84 27R
C105
10nF
C105
10nF
R89
4.7K
R89
4.7K
R85 27RR85 27R
L10
180ohm at 100MHz
L10
180ohm at 100MHz
1 2
C101
10nF
C101
10nF
C106
10nF
C106
10nF
RR26B 27RRR26B 27R
2 7
C117
10nF
C117
10nF
R102 27RR102 27R
C115
10uF
C115
10uF C114 20pFC114 20pF
+
C104
10uF
+
C104
10uF
RR26A 27RRR26A 27R
1 8
RR25D 27RRR25D 27R
4 5
R77 27RR77 27R
R80 27RR80 27R
RR25C 27RRR25C 27R
3 6
C102
10nF
C102
10nF
C120
10nF
C120
10nF
R78 4.7KR78 4.7K
Y3
25MHz
Y3
25MHz
1
23
4
L11
180ohm at 100MHz
L11
180ohm at 100MHz
1 2
RR25B 27RRR25B 27R
2 7
R95
4.7K
R95
4.7K
C100
10nF
C100
10nF
RR25A 27R
RR25A 27R
1 8
L9
180ohm at 100MHz
L9
180ohm at 100MHz
1 2
RR24D 27RRR24D 27R
4 5
R96
4.7K
R96
4.7K
L14
LQM2HPN1R0MG0L
L14
LQM2HPN1R0MG0L
RR24C 27RRR24C 27R
3 6
L12
180ohm at 100MHz
L12
180ohm at 100MHz
1 2
+
C116
47uF
+
C116
47uF
C118
22uF
C118
22uF
+
C103
10uF
+
C103
10uF
R33
10K 1%
R33
10K 1%
R79 1KR79 1K
R32
2K 1%
R32
2K 1%
R97
4.7K
R97
4.7K
R90
4.7K
R90
4.7K
C94
10nF
C94
10nF
R81 27RR81 27R
C108
10nF
C108
10nF
C97
10nF
C97
10nF
C95
10nF
C95
10nF
C111
10nF
C111
10nF C112
10nF
C112
10nF
C109
10nF
C109
10nF
C98
10nF
C98
10nF
+
C93
10uF
+
C93
10uF
R82 27RR82 27R
C113
10nF
C113
10nF
R83 4.99K 1%R83 4.99K 1%
MN13
SC189ASKTRT
MN13
SC189ASKTRT
VIN
1
GND
2
EN
3VOUT 4
LX 5
KSZ9021RN
48-pin QFN
MN17
KSZ9021RN
KSZ9021RN
48-pin QFN
MN17
KSZ9021RN
VSS_PS
13
LED2
15
DVDDH
16
LED1
17
DVDDL
14
TXD0
19
TXD1
20
TXD2
21
TXD3
22
DVDDL
18
DVDDL
23
GTX_CLK
24
TX_EN 25
DVDDL 26
RXD3 27
VSS 29
DVDDL 30
RXD1 31
RXD0 32
RX_DV 33
DVDDH 34
RX_CLK 35
MDC 36
MDIO 37
INT_N 38
DVDDL 39
DVDDH 40
CLK125_NDO 41
RESET_N 42
LDO_O 43
XO 45
XI 46
AVDDH 47
ISET 48
AVDDH
1
TXRXP_A
2
TXRXM_A
3
TXRXP_B
5
TXRXM_B
6
TXRXP_C
7
TXRXM_C
8
TXRXP_D
10
TXRXM_D
11
AVDDH
12
RXD2 28
AVDDL_PLL 44
P_GND 49
AVDDL
4
AVDDL
9
R87 27RR87 27R
C110
10nF
C110
10nF
R88 27R
R88 27R
C119 20pFC119 20pF
C99
10nF
C99
10nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PA0
PA1
PA3
PA2
PA5
PA7
PA6
PA4
PA9
PA11
PA10
PA13
PA15
PA14
PA12
PA8
PA17
PA19
PA18
PA21
PA23
PA22
PA20
PA25
PA27
PA26
PA29
PA31
PA30
PA28
PA24
PA16
PB13
PB14
PB15
PB21
PB22
PB20
PB19
PB24
PB30
PB28
PB25
PB26
PB23
PB27
PB29
PB31
PB10
PC1
PC2
PC3
PC6
PC7
PC5
PC4
PC9
PC15
PC13
PC12
PC10
PC11
PC8
PC14
PC21
PC18
PC19
PC17
PC25
PC20
PC22
PC23
PC31
PC29
PC26
PC27
PC16
PC24
PC28
PC30
PC0
PE23
PE24
PE25
PE26
PC25
PC23
PC21
PC18
PC16
PC8
PC6
PC4
PC2
PC0
PE27
PC10
PC12
PC14
PC27
PC29
PC31
PA0
PA2
PA5
PA7
PA9
PA11
PA12
PA14
PA16
PA18
PA21
PA23
PA25
PA27
PA28
PA30
PD30
PD28
PD26
PD24
PD22
PD20
PD18
PD16
PD14
PD12
PD10
PD8
PD6
PD5
PD3
PD1
PB10
PB14
PB19
PB21
PB23
PB24
PA13
PA15
PA17
PA19
PA20
PA22
PA24
PA26
PC30
PA1
PA3
PA4
PA6
PA8
PA10
PA29
PA31
PD31
PD29
PD27
PD25
PD23
PD21
PD19
PD17
PD15
PD13
PD11
PD9
PD7
PD4
PD2
PD0
PB13
PB15
PB20
PB22
PB31
PB25
PB27
PB29
PB26
PB28
PE28
PC11
PC13
PC15
PC26
PC28
PC5
PC3
PC1
PC24
PC22
PC20
PC19
PC17
PC9
PC7
PE29
PE30
PE31
PD13
PD12
PD8
PD9
PD4
PD5
PD6
PD7
PD28
PD16
PD17
PD18
PD10
PD11
PD15
PD14
PD26
PD19
PD23
PD22
PD21
PD20
PD25
PD24
PD29
PD30
PD31
PD27
PD3
PD2
PD1
PD0
PE31
PE27
PE28
PE29
PE30
PE26
PE25
PE24
PE23
PB30
PB12
VCC_5V
VDDBU
VCC_5V
VCC_3V3 VCC_3V3
VDDIOM
VDDIOM
VDDIOP0 VDDIOP0
VDDIOP1VDDIOP1
ADVREF
VDDANA
VDDANA
PA[0..31]{5}
PB[0..31]{5,6}
PC[0..31]{5}
PWR_EN{2}
PD[0..31] {5}
PE[23..31] {3,5}
BOOT_CS_OFF {5}
HHSDMA{2} HHSDPA{2}
HHSDMB{2} HHSDPB{2}
HHSDMC{2} HHSDPC{2}
LED1{6} LED2{6}
ETH0_RX1+{6} ETH0_RX1-{6}
ETH0_RX2+{6} ETH0_RX2-{6}
NRST {2,3,6}
JTAGSEL {2}
WKUP {2}
BMS {2}
NTRST {2}
TDI {2}
TCK {2}
TMS {2}
SHDN {2}
TDO {2}
DIBP {2}
DIBN {2}
ETH0_TX1+{6} ETH0_TX1-{6}
ETH0_TX2-{6} ETH0_TX2+{6}
Title:
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200-PIN SODIMM D
SAMA5D3x-CM
A3 77Monday, September 17, 2012Zhu Xueliang
Title:
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200-PIN SODIMM D
SAMA5D3x-CM
A3 77Monday, September 17, 2012Zhu Xueliang
Title:
Size: Document Number: Rev:
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200-PIN SODIMM D
SAMA5D3x-CM
A3 77Monday, September 17, 2012Zhu Xueliang
KEY
J1
SODIMM_2
KEY
J1
SODIMM_2
PC11 52
PC4
33 PC6
31
PC27
59 PC14
57
VCC_3V3_1
41
PC13 54
PE28 50
PE27
49 NC1
47 Enable_2
45
PC10
51
Enable_1 40
PC1 38
GND1
5VCC_5V_3
3VCC_5V_1
1VCC_5V_2 2
VCC_5V_4 4
VBAT 6
Enable_0
39
VCC_3V3_3
43 VCC_3V3_4 44
Enable_3 46
ADVREF 48
VCC_3V3_2 42
GND5
53
PC12
55 PC15 56
PC26 58
PC28 60
GND4 32
PE25
11 PE23
7
PE24
9
PC8
29
VDDIOM_1
15 PE26
13
PC25
17
PC23
19
PC21
21
GND3
23
PC18
25
PC16
27
PA24 94
PC31
63
VDDIOP0_1
65
PA0
67
PA2
69
GND7
71
PA6 74
PA7
75
PA9
77
PA11
79
PA12
81
PA14
83
PA16
85
GND9
89
PA21
91
PA23
93
PA25
95
PA27
97
PA31 102
VDDANA_2 104
PD30
105
PD28
109
PD26
111
PD24
113
PD22
115
PD20
117
PD16
121
PD14
123
GND13
125
PD10
129
PD8
131
PD6
133
PD3
137
PD1
139
VDDIOP1_1
141
GND15
143
PB10
145
PB19
149
PB21
151
PB23
153
PB24
155
GND17
157
USBA_DP
159
GND18
163
USBB_DP
165
GND19
169
USBC_DP
171
USBC_DM
173
GND_ETH1
175
ETH0_TX1+
177
ETH0_TX1-
179
ETH0_RX1+
181
GND_ETH2
185 ETH0_RX1-
183
ETH0_TX2+
187
ETH0_TX2-
189
PC7 30
PE29 8
PE30 10
PE31 12
GND2 14
VDDIOM_2 16
PC24 18
PC22 20
PC20 22
PC19 24
PC17 26
PC9 28
PC5 34
PC30 64
VDDIOP0_2 66
PA1 68
PA3 70
PA4 72
PA8 76
PA10 78
GND8 80
PA13 82
PA15 84
PA17 86
PA20 90
PA22 92
PA26 96
GND10 98
PA29 100
PA30
101
VDDANA_1
103
PD31 106
PD29 108
PD27 110
PD25 112
GND12 116
PD21 118
PD19 120
PD17 122
PD15 124
PD9 130
PD7 132
GND14 134
PD4 136
PD2 138
PD0 140
PB13 144
PB12 146
PB15 148
PB20 150
PB22 152
PB25 156
PB27 158
PB29 160
PB31 162
PB30 164
GND20 170
DIBP 172
DIBN 174
GND22 176
JTAGSEL 178
WKUP 180
SHDN 182
BMS 184
nRST 186
nTRST 188
PC2
35 PC3 36
PC0
37
PC29
61 GND6 62
PA5
73
PA18
87 PA19 88
PA28
99
GND11
107
PD18
119
PD23 114
PD13 126
PD5
135
VDDIOP1_2 142
PB14
147
GND16 154
USBA_DM
161
ETH0_RX2+
191
PD12
127 PD11 128
USBB_DM
167 PB28 168
PB26 166
TDI 190
ETH0_RX2-
193
GND23
195
LED2
197
LED1
199
TCK 192
TMS 194
TDO 196
RTCK 198
GND24 200
C125
1uF
C125
1uF
C122
1uF
C122
1uF
R104 DNPR104 DNP
C123
4.7uF
C123
4.7uF
C126
1uF
C126
1uF
R105 0R
R105 0R
C124
10uF
C124
10uF
35
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.4.2 CPU Module Revision E Schematics
This section contains the following schematics:
Main sheet
SODIMM 200
Power supply
CPU power supply
DDR2 interface
FI: NAND, NOR, Serial, I2C, 1-wire
Ethernet
USB, JTAG, LEDs
Bus interface
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PIO A,...EPIO A,...E
PIO A&D
PIO B&E
PIO C
ATMEL
ARMA5 PROCESSOR
ATSAMA5D3x-CU
S
O
D
I
M
M
C
O
N
N
E
C
T
O
R
PIO
CONNECTOR PIO
CONNECTOR PIO
CONNECTOR
EBI 4Gb
DDR2
SDRAM
2Gb
NAND
FLASH
128Mb
NOR
FLASH
ONE WIRE
EEPROM
SERIAL
DATA
FLASH
TWO LED 10/100/1000 FAST
ETHERNET
USB A,B,C
DIB
3V3 INPUT
VBAT
ANALOG Reference
ICE
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
17
E
12-Nov-11CS CW
BLOCK DIAGRAM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
17
E
12-Nov-11CS CW
BLOCK DIAGRAM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
17
E
12-Nov-11CS CW
BLOCK DIAGRAM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TDO
NTRST
NRST
SHDN
WKUP
TDO
NRST
WKUP
SHDN
NTRST
TDI
TMS
TCK
PWR_EN
PWR_EN
TCK
TDI
TMS
VCC_3V3
ADVREF
VDDIOP1
VDDIOP0
VDDBU
VDDBU
VDDIOP0
VDDBU
VDDIOM
VDDIOP0
VCC_3V3
VCC_1V2
VCC_1V2
VCC_3V3VDDOSC
VDDOSC
FUSE_2V5 VCC_3V3
VDDANA
VDDPLLA
GNDUTMI
GNDUTMI
GNDUTMI
VCC_3V3
FUSE_2V5
GNDUTMI
VDDIODDR VCC_3V3
VCC_3V3
VCC_3V3
VCC_1V2
VCC_3V3
VCC_3V3
HHSDMB{7} HHSDPB{7}
HHSDMC{7} HHSDPC{7}
DIBP{7} DIBN{7}
HHSDMA{7} HHSDPA{7}
TMS{7} TCK{7} TDO{7}
NRST{3,6,7}
JTAGSEL{7} TDI{7}
NTRST{7}
BMS{7}
WKUP{7} SHDN{7}
PWR_EN
{7}
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
27
E
12-Nov-11CS CW
SAMA5D3x-I&POWER
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
27
E
12-Nov-11CS CW
SAMA5D3x-I&POWER
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
27
E
12-Nov-11CS CW
SAMA5D3x-I&POWER
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
TP11
SMD
SUP1
CA89405MF
DNP
C80
100nF
C8 20pF
TP10
SMD
C16
100nF
TP16
SMD
TP5
SMD
C60
100nF
TP2
SMD
R16 0R
R27
100K 1%
C82
100nF
TP8
SMD
MN8 RT9018B-18GSP
NC 5
EN 2
ADJ
7
VOUT
6VIN 3
GND(PAD)
9
GND
8
VDD 4
PGOOD
1
Y2
12MHz
1
23
4
C110
4.7uF
C46
100nF
TP18
SMD
C63
100nF
R25
1R
TP4
SMD
C4
100nF
C3
100nF
R33
DNP
R15 10K
L12
180ohm at 100MHz
1 2
C48
100nF
TP17
SMD
MN4H
ATSAMA5D3x-CU
GNDCORE_1
A16
VDDCORE_1 C5
VDDCORE_2 C7
GNDCORE_2
C9
VDDIODDR_1 D13
VDDCORE_3 D14
GNDIODDR_1
E14
GNDIODDR_2
F10
GNDIODDR_3
F13
VDDIODDR_2 F14
GNDIODDR_4
F15 VDDIOP0_1 G7
VDDIODDR_3 G10
VDDIODDR_4 G13
VDDIODDR_5 H11
GNDIODDR_5
H14
GNDIOP_1
J7
GNDIOM_1
J11
GNDANA
L4
ADVREF L5
VDDANA L6
VDDIOP1_1 L11
VDDIOP1_2 M4
TDO
M11 TMS
N10
GNDIOP_2
N11
GNDCORE_3
N13
GNDFUSE
P4
TCK
P9
GNDPLL
P10
NTRST
P11
GNDUTMI_1
R12
VDDFUSE R3
TDI
R8
VDDPLLA R10
VBG
R11
VDDIOM_1 P12
VDDCORE_4 T7
GNDCORE_4
T8
JTAGSEL
T9
WKUP
T10
GNDOSC
T11
SHDN
T12
GNDBU
T13
GNDCORE_5
T14
VDDCORE_5 T15
VDDIOM_2 T16
GNDIOM_2
T17
GNDIOP_3
U7
XIN
U8
BMS
U9
VDDOSC U11
VDDUTMII U13
TST
U15
XIN32
U16
VDDCORE_6 U17
VDDCORE_7 V7
XOUT
V8
NRST
V9
VDDIOP0_2 V11
VDDUTMIC V13
VDDBU V15
XOUT32
V16
GNDCORE_6
V17
GNDIOP_4
E5
HHSDMA
V10
HHSDPA
U10
HHSDMC
V14
HHSDPC
U14
HHSDPB
U12 HHSDMB
V12
DIBN
U6
DIBP
V6
C100
4.7uF
C2
4.7uF
MN11
XC6206P252MR-G
Voltage Detector
Vo
2
Vss
1Vin 3
C106
100nF
C107
1uF
C24
100nF
L10
10uH/150mA
L2
10uH/150mA
C79
100nF
L5
10uH/150mA
C91
100nF
C97
100nF
R53 100K
C14
100nF
R21
1R
R17
1R
RR4D 100K
4 5
C72
100nF
C26
10uF
TP19
SMD
C73
100nF
L62.2uH
TP3
SMD
C11 20pF
R30
100K
C89
1uF
C66
100nF
R29
47K 1%
C85
100nF
Y1 32.768 kHz
12
TP15
SMD
TP14
SMD
C5
100nF
C74
100nF
RR4C 100K
3 6
TP13
SMD
TP9
SMD
C27
10uF
C10 20pF
TP12
SMD
TP1
SMD
C17
100nF
C62
10pF
RR4B 100K
2 7
C81
100nF C101
4.7uF
C86
100nF
C13
10uF C15
22pF
R55 100K
L11
180ohm at 100MHz
1 2
R54
DNP
R28
200K 1%
C23
10uF
C6 20pF
MN7 RT8010GQW
NC
1
EN 2
VIN 3
LX
4
GND
5
FB
6
PAD
7
C19
10nF
C71
100nF
R52
5.62K 1%
C51
100nF
TP21
SMD
C75
100nF
R32
DNP
R31
27K 1%
C52
100nF
C54
100nF
RR4A 100K
1 8
C61
100nF
C90
100nF
R51
0R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A7
DDR_A12
FLASH_A2
FLASH_A7
FLASH_A8
FLASH_A15
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A13
DDR_D12
DDR_D13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D26
DDR_D27
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D30
DDR_D31
DDR_D28
DDR_D29
FLASH_A12
FLASH_A13
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A14
M_EBI_D12
M_EBI_D13
M_EBI_D8
M_EBI_D9
M_EBI_D10
M_EBI_D11
M_EBI_D14
M_EBI_D15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
FLASH_A23
NRD
NWE
NANDCE
M_EBI_D2
M_EBI_D4
M_EBI_D3
M_EBI_D6
M_EBI_D7
M_EBI_D5
M_EBI_D0
M_EBI_D1
NANDCLE
NANDALE
NANDRDY
M_EBI_D4
M_EBI_D2
M_EBI_D10
M_EBI_D5
M_EBI_D12
M_EBI_D9
M_EBI_D14
M_EBI_D15
M_EBI_D3
M_EBI_D0
M_EBI_D6
M_EBI_D7
M_EBI_D8
M_EBI_D1
M_EBI_D13
M_EBI_D11
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A15
FLASH_A14
FLASH_A13
FLASH_A16
FLASH_A18
FLASH_A17
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A22
NRD
NWE
NCS0
FLASH_A23
PE24
PE25
PE27
PE28
PE29
PE30
PE31
PE26
PE23
M_EBI_A23
M_EBI_A22
M_EBI_A21
NCS0
NANDCLE
NANDALE
NCS3
NRD
NWE
NANDRDY
NCS3
M_EBI_A0
FLASH_A1
DDR_A0
M_EBI_D0
M_EBI_D1
M_EBI_D2
M_EBI_D3
M_EBI_D4
M_EBI_D5
M_EBI_D6
M_EBI_D7
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIODDR
VDDIOM
VDDIOM
VDDIOMVCC_3V3
DDR_D[0..31] {4}
NRST{2,6,7}
DDR_VREF {4}
PE[23..31] {5,7}
OE_Nandflash{5}
DDR_A[0..13] {4}
DDR_DQS1 {4}
DDR_DQS2 {4}
DDR_DQS3 {4}
DDR_WE {4}
DDR_CS {4}
DDR_BA0 {4}
DDR_DQM0 {4}
DDR_BA1 {4}
DDR_BA2 {4}
DDR_DQM1 {4}
DDR_DQM2 {4}
DDR_RAS {4}
DDR_CAS {4}
DDR_DQM3 {4}
DDR_DQS0 {4}
DDR_CKE {4}
DDR_CLK {4}
DDR_CLKN {4}
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
37
E
12-Nov-11CS CW
SAMA5D3x-II&NOR&NAND
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
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REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
37
E
12-Nov-11CS CW
SAMA5D3x-II&NOR&NAND
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
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REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
37
E
12-Nov-11CS CW
SAMA5D3x-II&NOR&NAND
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
TP7
SMD
R39 470K
MN4E
ATSAMA5D3x-CU
PE0_A0/NBS0 P13
PE1_A1 R14
PE2_A2 R13
PE3_A3 V18
PE4_A4 P14
PE5_A5 U18
PE6_A6 T18
PE7_A7 R15
PE8_A8 P17
PE9_A9 P15
PE10_A10 P18
PE11_A11 R16
PE12_A12 N16
PE13_A13 R17
PE14_A14 N17
PE15_A15_SCK3 R18
PE16_A16_CTS3 N18
PE17_A17_RTS3 P16
PE18_A18_RXD3 M18
PE19_A19_TXD3 N15
PE20_A20_SCK2 M15
PE21_A21/NANDALE N14
PE22_A22/NANDCLE M17
PE23_A23_CTS2 M13
PE24_A24_RTS2 M16
PE25_A25_RXD2 N12
PE26_NCS0_TXD2 M14
PE27_NCS1_TIOA2 M12
PE28_NCS2_TIOB2 L13
PE29_NWR1/NBS1_TCLK2 L15
PE30_NWAIT L14
PE31_IRQ_PWML1 L16
C34
100nF
R8 27R
R12 27R
R59 100K
R7 0R
TP20
SMD
R5 470K
R35 0R
R1
DNP
R40 0R
R11 0R
R38
10K
MN1
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
C12
100nF
R36 100K
MN3
MT29F2G08ABAEAWP
WE
18
N.C6
6
VCC 37
CE
9RE
8
N.C11
20
WP
19
N.C5
5
N.C1
1
N.C2
2
N.C3
3
N.C4
4
DNU1
21
DNU2
22
N.C12
23
N.C13
24
R/B
7
I/O8_N.C 26
I/O9_N.C 27
I/O10_N.C 28
I/O0 29
VCC_N.C 34
N.C14
35
VSS 36
DNU3
38
VCC_N.C 39
VCC 12
VSS 13
ALE
17
N.C8
11 N.C7
10
N.C9
14
N.C10
15
CLE
16
VSS_N.C 25
I/O11_N.C 33
I/O1 30
I/O3 32
I/O2 31
I/O15_N.C 47
I/O14_N.C 46
I/O13_N.C 45
I/O7 44
I/O6 43
I/O5 42
I/O4 41
I/O12_N.C 40
VSS_N.C 48
L1
180ohm at 100MHz
1 2
R2 470K
MN4F
ATSAMA5D3x-CU
DDR_CAS A5
DDR_A13 A6
DDR_A11 A7
DDR_A7 A8
DDR_A2 A9
DDR_D30 A10
DDR_D27 A11
DDR_CLKN A12
DDR_DQSN3 A13
DDR_D25 A14
DDR_D24 A15
DDR_DQSN2 A17
DDR_D19 A18
DDR_WE B5
DDR_BA1 B6
DDR_CKE B7
DDR_A9 B8
DDR_A4 B9
DDR_A0 B10
DDR_D28 B11
DDR_CLK B12
DDR_DQS3 B13
DDR_D23 B14
DDR_DQM2 B15
DDR_D16 B16
DDR_DQS2 B17
DDR_D17 B18
DDR_CS C8
DDR_A8 C10
DDR_A1 C11
DDR_CALN C12
DDR_VREF C13
DDR_BA0 E9
DDR_DQSN0 D18
DDR_D12 D17
DDR_D14 D16
DDR_D22 D15
DDR_DQM3 D12
DDR_A3 D11
DDR_A6 D10
DDR_A12 D9
DDR_D13 C18
DDR_D15 C17
DDR_D20 C16
DDR_D18 C15
DDR_D21 C14
DDR_A5 E10
DDR_D31 E11
DDR_D26 E12
DDR_CALP E13
DDR_BA2 F9
DDR_A10 F11
DDR_D29 F12
DDR_D8 F16
DDR_D6 F17
DDR_DQSN1 F18
DDR_RAS G11
DDR_DQM0 G12
DDR_D10 G14
DDR_D7 G15
DDR_D4 G16
DDR_D3 G17
DDR_DQS1 G18
DDR_D0 H12
DDR_D2 H13
DDR_D5 H15
DDR_D1 H17
DDR_DQM1 E15
DDR_D11 E16
DDR_D9 E17
DDR_DQS0 E18
C9 100nF
R4 0R
R9 27R
R6 0R
R43 200R 1%
C1
100nF
MN10
JS28F128P33TF70A
A1
29
A2
25
A3
24
A4
23
A5
22
A6
21
A7
20
A8
19
A9
8
A10
7
A11
6
A12
5
A13
4
A14
3
A15
2
A16
1
A17
55
A18
18
A19
17
A20
16
DQ0 34
DQ1 36
DQ2 39
DQ3 41
DQ4 47
DQ5 49
DQ6 51
DQ7 53
DQ8 35
DQ9 37
DQ10 40
DQ11 42
DQ12 48
DQ13 50
DQ14 52
DQ15 54
VCC 33
VCCQ 38
VPP
43 VSS 28
VSS 31
VSS 12
A21
11
NC 13
CE#
30
OE#
32
WE#
14
RST#
44
WP#
15
CLK
45
WAIT 56
A22
10
A23
9
RFU2 27
RFU1 26
ADV# 46
R41 0R
MN4G
ATSAMA5D3x-CU
D14 H16
D16 H18
D6 J12
D8 J14
D9 J16
D11 J17
D13 J18
NWE_NWR0 K11
D0 K12
D4 K13
D2 K14
D1 K15
D3 K16
D5 K17
D7 K18
NCS3 L12
NRD L17
NANDRDY L18
D10 J13
D12 J15
R3 0R
R37 470K
R10 0R
C32
100nF
R18
200R 1%
C33
100nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1-WIRE EEPROM
LED
(SPI0_MIS0)
(SPI0_MOSI)
SERIAL DATAFLASH
(SPI0_SPCK)
(SPI0_NPCS0)
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA15
PA14
PA13
PA12
PA16
PA17
PA18
PA19
PA23
PA22
PA21
PA20
PA25
PA24
PA28
PA29
PA30
PA31
PA27
PA26
PC3
PC2
PC1
PC0
PC13
PC12
PC8
PC9
PC4
PC5
PC6
PC7
PC28
PC16
PC17
PC18
PC10
PC11
PC15
PC14
PC26
PC19
PC23
PC22
PC21
PC20
PC25
PC24
PC29
PC30
PC31
PC27
PD3
PD2
PD1
PD0
PD13
PD12
PD8
PD9
PD4
PD5
PD6
PD7
PD28
PD16
PD17
PD18
PD10
PD11
PD15
PD14
PD26
PD19
PD23
PD22
PD21
PD20
PD25
PD24
PD29
PD30
PD31
PD27
PB3
PB2
PB1
PB0
PB13
PB12
PB8
PB9
PB4
PB5
PB6
PB7
PB28
PB16
PB17
PB18
PB10
PB11
PB15
PB14
PB26
PB19
PB23
PB22
PB21
PB20
PB25
PB24
PB29
PB30
PB31
PB27
PE25
PE24
PD11
PD12
PD10
PE25
PD13
OE_Dataflash
VDDIOM
VDDIOP1
VDDIOP1
VDDIOP1
VDDIOP1
VCC_3V3
PA[0..31] {7} PC[0..31] {7}
PD[0..31] {7}PB[0..31] {6,7}
PE[23..31]{3,7}
OE_Nandflash{3}
BOOT_CS_OFF{7}
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
47
E
12-Nov-11CS CW
SAMA5D3x-III&DATAFLASH&1-WIRE,LED
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
47
E
12-Nov-11CS CW
SAMA5D3x-III&DATAFLASH&1-WIRE,LED
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-CM
B
C
D
47
E
12-Nov-11CS CW
SAMA5D3x-III&DATAFLASH&1-WIRE,LED
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
Q1
IRLML2502
1
32
JP1
MN4D
ATSAMA5D3x-CU
PD0 K5
PD1 P1
PD2 K6
PD3 R1
PD4 L7
PD5 P2
PD6 L8
PD7 R2
PD8 K7
PD9 U2
PD10 K9
PD11 M5
PD12 K10
PD13 N4
PD14 L9
PD15 N3
PD16 L10
PD17 N5
PD18 M6
PD19 T1
PD20 N2
PD21 M3
PD22 M2
PD23 L3
PD24 M1
PD25 N1
PD26 L1
PD27 L2
PD28 K1
PD29 K2
PD30 J1
PD31 J2
R42
470R
C123
100nF
D2 red
R70
1.5K
D1 Blue
MN4C
ATSAMA5D3x-CU
PC0_ETX0 D8
PC1_ETX1 A4
PC2_ERX0 E8
PC3_ERX1 A3
PC4_ETXEN A2
PC5_ECRSDV F8
PC6_ERXER B3
PC7_EREFCK G8
PC8_EMDC B4
PC9_EMDIO F7
PC10 A1
PC11 D7
PC12 C6
PC13 E7
PC14 B2
PC15 F6
PC16 B1
PC17 E6
PC18 C3
PC19 D6
PC20 C4
PC21 D5
PC22 C2
PC23 G9
PC24 C1
PC25 H10
PC26 H9
PC27 D4
PC28 H8
PC29 G5
PC30 D3
PC31 E4
MN12
NL17SZ126
OE
1VCC 5
GND
3OUT 4
IN
2
R76 0R
R79 0R
MN14
DS2431P+
IO
2
GND
1
NC1 3
NC2 4
NC3 5
NC4 6
C114
100nF
D3
BAT54C
32
1
MN4B
ATSAMA5D3x-CU
PB0_GTX0 T2
PB1_GTX1 N7
PB2_GTX2 T3
PB3_GTX3 N6
PB4_GRX0 P5
PB5_GRX1 T4
PB6_GRX2 R4
PB7_GRX3 U1
PB8_GTXCK R5
PB9_GTXEN P3
PB10_GTXER R6
PB11_GRXCK V3
PB12_GRXDV P6
PB13_GRXER V1
PB14_GCRS R7
PB15_GCOL U3
PB16_GMDC P7
PB17_GMDIO V2
PB18_G125CK V5
PB19_GTX4 T6
PB20_GTX5 N8
PB21_GTX6 U4
PB22_GTX7 M7
PB23_GRX4 U5
PB24_GRX5 M8
PB25_GRX6 T5
PB26_GRX7 N9
PB27 V4
PB28 M9
PB29 P8
PB30 M10
PB31 R9
R44
470R
R71
470K
R72 0R
MN13
AT25DF321A
HOLD 7
GND 4
VCC 8
CS
1SCK
6SI
5
SO
2
WP 3
R78
10K
R48
100K
R77 0R
MN4A
ATSAMA5D3x-CU
PA0_LCDDAT0 E3
PA1_LCDDAT1 F5
PA2_LCDDAT2 D2
PA3_LCDDAT3 F4
PA4_LCDDAT4 D1
PA5_LCDDAT5 J10
PA6_LCDDAT6 G4
PA7_LCDDAT7 J9
PA8_LCDDAT8 F3
PA9_LCDDAT9 J8
PA10_LCDDAT10 E2
PA11_LCDDAT11 K8
PA12_LCDDAT12 F2
PA13_LCDDAT13 G6
PA14_LCDDAT14 E1
PA15_LCDDAT15 H5
PA16_LCDDAT16 H3
PA17_LCDDAT17 H6
PA18_LCDDAT18 H4
PA19_LCDDAT19 H7
PA20_LCDDAT20 H2
PA21_LCDDAT21 J6
PA22_LCDDAT22 G2
PA23_LCDDAT23 J5
PA24_LCDPWM F1
PA25_LCDDISP J4
PA26_LCDVSYNC G3
PA27_LCDHSYNC J3
PA28_LCDPCK G1
PA29_LCDDEN K4
PA30_TWD0 H1
PA31_TWCK0 K3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR2 SDRAM
DDR_A8 DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D15
DDR_D14
DDR_A1
DDR_A9
DDR_A2 DDR_D2
DDR_A10
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_D1
DDR_VREF
DDR_D0
DDR_A6
DDR_D4
DDR_D3
DDR_A7 DDR_D6
DDR_D5
DDR_D7
DDR_D8
DDR_A0
DDR_A8
DDR_D27
DDR_D26
DDR_D25
DDR_D31
DDR_D29
DDR_D28
DDR_D30
DDR_A1
DDR_A9
DDR_A2
DDR_A10
DDR_D18
DDR_A3
DDR_A11
DDR_A4
DDR_A12
DDR_A5
DDR_VREF
DDR_D17
DDR_D16
DDR_A6
DDR_D19
DDR_D20
DDR_D22
DDR_A7 DDR_D23
DDR_D21
DDR_D24
DDR_A0
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CKE
DDR_WE
DDR_CLK
DDR_RAS
DDR_CLKN
DDR_CAS
DDR_CS
DDR_BA0
DDR_BA1
DDR_BA2
DDR_WE
DDR_CKE
DDR_RAS
DDR_CLK
DDR_CAS
DDR_CLKN
DDR_A13
DDR_VREF
DDR_A13
VDDIODDR
VDDIODDR VDDIODDR
VDDIODDR
VDDIODDR
DDR_CKE{3}
DDR_CLK{3} DDR_CLKN{3}
DDR_CS{3}
DDR_CAS{3} DDR_RAS{3}
DDR_WE{3}
DDR_DQS1{3}
DDR_DQS0{3}
DDR_DQM1{3} DDR_DQM0{3}
DDR_DQS3{3}
DDR_DQS2{3}
DDR_DQM3{3} DDR_DQM2{3}
DDR_A[0..13]{3}
DDR_D[0..31]{3}
DDR_VREF {3}
DDR_BA0{3} DDR_BA1{3} DDR_BA2{3}
REV DATEMODIF. DES.
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SAMA5D3x-CM
B
C
D
57
E
12-Nov-11CS CW
4Gb DDR2
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
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SAMA5D3x-CM
B
C
D
57
E
12-Nov-11CS CW
4Gb DDR2
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
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SAMA5D3x-CM
B
C
D
57
E
12-Nov-11CS CW
4Gb DDR2
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
C76
100nF
C57 100nF
C40
100nF
R13
1.5K 1%
C84 100nF
R45
1R
C59 100nF C94 100nF
C49 100nF
C50 100nF
C68 100nF
C37 100nF
MT47H128M16RT
DDR2 SDRAM
MN5
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
C56 100nF
R50 DNP C55 100nF
R14
1.5K 1%
MT47H128M16RT
DDR2 SDRAM
MN2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10
M2
BA0
L2
ODT
K9
DQ0 G8
DQ1 G2
DQ2 H7
DQ3 H3
DQ4 H1
DQ5 H9
DQ6 F1
DQ7 F9
UDQS
B7
UDQS
A8
LDM
F3
VDD J9
VDD M9
VDDL J1
VREF J2
VDDQ E9
VSS A3
VSS E3
VDDQ A9
VDD E1
RFU1
A2
RFU2
E2
CKE
K2
CK
J8
CK
K8
CAS
L7
RAS
K7
WE
K3
CS
L8 VDDQ C3
VDDQ C7
VDDQ C9
VSSQ D8
VSSQ E7
VSSQ F2
VSSQ F8
VDD A1
VSS J3
A11
P7
BA1
L3
A12
R2
BA2
L1
VSS N1
VSSDL J7
VSSQ B2
RFU3
R3
DQ8 C8
DQ9 C2
DQ10 D7
DQ11 D3
DQ12 D1
DQ13 D9
DQ14 B1
DQ15 B9
VDD R1
VDDQ G1
VDDQ G7
VDDQ G9
VSS P9
VSSQ D2
VSSQ A7
VSSQ B8
VSSQ H2
VSSQ H8
VDDQ G3
VDDQ C1
UDM
B3
LDQS
E8 LDQS
F7
RFU4
R7
A13
R8
C78 100nF
C95 100nF
R46 4.7K
C44 100nF
C47
4.7uF
C7
4.7uF
R49 0R
C43 100nF
C36 100nF
TP6
SMD
C65 100nF
R66 0R
C42
100nF
C69 100nF
R57 4.7K
C88 100nF
C53 100nF
R56 4.7K
C67 100nF
R67 DNP C87 100nF
R47 4.7K
C45 100nF
C39 100nF
C64 100nF
C93 100nF
C41
100nF
L3
10uH/150mA
C83 100nF
C77 100nF
C38 100nF
C35 100nF
C58 100nF
C70 100nF
C92 100nF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
G125CK
GTX0
GTX1
GTX2
GTX3
GRX0
GRX1
GRX2
GRX3
GTXCK
GTX_CTL
GRXCK
GRX_CTL
GMDC
GMDIO
INT_GETHR
PB4
PB5
PB6
PB7
PB3
PB2
PB1
PB0
PB16
PB11
PB13
PB9
PB8
PB25
PB17
PB18
XI
XO
XI
XO
VDDIOP1
DVDDL
AVDDL
AVDDH
AVDDL_PLL
VDDIOP1
VDDIOP1
VCC_3V3 AVDDL_PMOS AVDDL_PLL
AVDDL
DVDDL
VDDIOP1
VDDIOP1
LED1{7} LED2{7}
PB[0..31] {5,7}
NRST {2,3,7}
ETH0_TX1+{7} ETH0_TX1-{7}
ETH0_RX1+{7} ETH0_RX1-{7} ETH0_TX2+{7} ETH0_TX2-{7}
ETH0_RX2+{7} ETH0_RX2-{7}
REV DATEMODIF. DES.
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SAMA5D3x-CM
B
C
D
67
E
12-Nov-11CS CW
ETHERNET
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
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A
SAMA5D3x-CM
B
C
D
67
E
12-Nov-11CS CW
ETHERNET
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
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A
SAMA5D3x-CM
B
C
D
67
E
12-Nov-11CS CW
ETHERNET
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
R64
4.7K
RR3A 27R
1 8
+
C124
10uF
R68 1K
C118
10nF
RR1C 27R
3 6
C18 20pF
R61
4.7K
R22 27R
C108
10nF
+
C125
10uF
R62 27R
C105
10nF
C102
10nF
R26 27R
R74
10K 1%
RR3B 27R
2 7
C119
10nF
+
C96
10uF
R34
4.7K
C122
10nF
RR1D 27R
4 5
L4
LQM2HPN1R0MG0L
C111
10nF
R60 27R
C112
10nF
L13
180ohm at 100MHz
1 2
R63
4.7K
C116
10nF
C120
10nF
C115
10nF
RR2A 27R
1 8
C109
10nF
R19 27R
+
C20
47uF
C103
10nF
C113
10nF
KSZ9021RNI
48-pin QFN
MN6
KSZ9021RNI
VSS_PS
13
LED2
15
DVDDH
16
LED1
17
DVDDL
14
TXD0
19
TXD1
20
TXD2
21
TXD3
22
DVDDL
18
DVDDL
23
GTX_CLK
24
TX_EN 25
DVDDL 26
RXD3 27
VSS 29
DVDDL 30
RXD1 31
RXD0 32
RX_DV 33
DVDDH 34
RX_CLK 35
MDC 36
MDIO 37
INT_N 38
DVDDL 39
DVDDH 40
CLK125_NDO 41
RESET_N 42
LDO_O 43
XO 45
XI 46
AVDDH 47
ISET 48
AVDDH
1
TXRXP_A
2
TXRXM_A
3
TXRXP_B
5
TXRXM_B
6
TXRXP_C
7
TXRXM_C
8
TXRXP_D
10
TXRXM_D
11
AVDDH
12
RXD2 28
AVDDL_PLL 44
P_GND 49
AVDDL
4
AVDDL
9
L8
180ohm at 100MHz
1 2
MN9
SC189ASKTRT
VIN
1
GND
2
EN
3VOUT 4
LX 5
RR2B 27R
2 7
L9
180ohm at 100MHz
1 2
C99
10nF
R20 27R
C21 20pF
R73
2K 1%
L7
180ohm at 100MHz
1 2
R58
4.7K
RR2C 27R
3 6
C25
10uF
R75 4.99K 1%
R65 27R
C104
10nF
C22
22uF
Y3
25MHz
1
23
4
RR2D 27R
4 5
C117
10nF
R69 4.7K
+
C121
10uF
R23 27R
C98
10nF
R24 27R
+
C126
10uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PA0
PA1
PA3
PA2
PA5
PA7
PA6
PA4
PA9
PA11
PA10
PA13
PA15
PA14
PA12
PA8
PA17
PA19
PA18
PA21
PA23
PA22
PA20
PA25
PA27
PA26
PA29
PA31
PA30
PA28
PA24
PA16
PB13
PB14
PB15
PB21
PB22
PB20
PB19
PB24
PB30
PB28
PB25
PB26
PB23
PB27
PB29
PB31
PB10
PC1
PC2
PC3
PC6
PC7
PC5
PC4
PC9
PC15
PC13
PC12
PC10
PC11
PC8
PC14
PC21
PC18
PC19
PC17
PC25
PC20
PC22
PC23
PC31
PC29
PC26
PC27
PC16
PC24
PC28
PC30
PC0
PE23
PE24
PE25
PE26
PC25
PC23
PC21
PC18
PC16
PC8
PC6
PC4
PC2
PC0
PE27
PC10
PC12
PC14
PC27
PC29
PC31
PA0
PA2
PA5
PA7
PA9
PA11
PA12
PA14
PA16
PA18
PA21
PA23
PA25
PA27
PA28
PA30
PD30
PD28
PD26
PD24
PD22
PD20
PD18
PD16
PD14
PD12
PD10
PD8
PD6
PD5
PD3
PD1
PB10
PB14
PB19
PB21
PB23
PB24
PA13
PA15
PA17
PA19
PA20
PA22
PA24
PA26
PC30
PA1
PA3
PA4
PA6
PA8
PA10
PA29
PA31
PD31
PD29
PD27
PD25
PD23
PD21
PD19
PD17
PD15
PD13
PD11
PD9
PD7
PD4
PD2
PD0
PB13
PB15
PB20
PB22
PB31
PB25
PB27
PB29
PB26
PB28
PE28
PC11
PC13
PC15
PC26
PC28
PC5
PC3
PC1
PC24
PC22
PC20
PC19
PC17
PC9
PC7
PE29
PE30
PE31
PD13
PD12
PD8
PD9
PD4
PD5
PD6
PD7
PD28
PD16
PD17
PD18
PD10
PD11
PD15
PD14
PD26
PD19
PD23
PD22
PD21
PD20
PD25
PD24
PD29
PD30
PD31
PD27
PD3
PD2
PD1
PD0
PE31
PE27
PE28
PE29
PE30
PE26
PE25
PE24
PE23
PB30
PB12
VCC_5V
VDDBU
VCC_5V
VCC_3V3 VCC_3V3
VDDIOM
VDDIOM
VDDIOP0 VDDIOP0
VDDIOP1VDDIOP1
ADVREF
VDDANA
VDDANA
PA[0..31]{5}
PB[0..31]{5,6}
PC[0..31]{5}
PWR_EN{2}
PD[0..31] {5}
PE[23..31] {3,5}
BOOT_CS_OFF {5}
HHSDMA{2} HHSDPA{2}
HHSDMB{2} HHSDPB{2}
HHSDMC{2} HHSDPC{2}
LED1{6} LED2{6}
ETH0_RX1+{6} ETH0_RX1-{6}
ETH0_RX2+{6} ETH0_RX2-{6}
NRST {2,3,6}
JTAGSEL {2}
WKUP {2}
BMS {2}
NTRST {2}
TDI {2}
TCK {2}
TMS {2}
SHDN {2}
TDO {2}
DIBP {2}
DIBN {2}
ETH0_TX1+{6} ETH0_TX1-{6}
ETH0_TX2-{6} ETH0_TX2+{6}
REV DATEMODIF. DES.
DATE
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A
SAMA5D3x-CM
B
C
D
77
E
12-Nov-11CS CW
200-PIN SODIMM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
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SCALE
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REV. SHEET
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A
SAMA5D3x-CM
B
C
D
77
E
12-Nov-11CS CW
200-PIN SODIMM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
REV DATEMODIF. DES.
DATE
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SCALE
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REV. SHEET
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A
SAMA5D3x-CM
B
C
D
77
E
12-Nov-11CS CW
200-PIN SODIMM
11-Nov-11
1-Feb-12CS CW 3-Feb-12
CS 15-Mar-12 CW 16-Mar-12
28-Sep-12CS CW 30-Sep-12
CWE 15-Apr-13
R80 0R
C30
10uF
R81 DNP
C127
1uF
C28
1uF
KEY
J1
SODIMM_2
PC11 52
PC4
33 PC6
31
PC27
59 PC14
57
VCC_3V3_1
41
PC13 54
PE28 50
PE27
49 NC1
47 Enable_2
45
PC10
51
Enable_1 40
PC1 38
GND1
5VCC_5V_3
3VCC_5V_1
1VCC_5V_2 2
VCC_5V_4 4
VBAT 6
Enable_0
39
VCC_3V3_3
43 VCC_3V3_4 44
Enable_3 46
ADVREF 48
VCC_3V3_2 42
GND5
53
PC12
55 PC15 56
PC26 58
PC28 60
GND4 32
PE25
11 PE23
7
PE24
9
PC8
29
VDDIOM_1
15 PE26
13
PC25
17
PC23
19
PC21
21
GND3
23
PC18
25
PC16
27
PA24 94
PC31
63
VDDIOP0_1
65
PA0
67
PA2
69
GND7
71
PA6 74
PA7
75
PA9
77
PA11
79
PA12
81
PA14
83
PA16
85
GND9
89
PA21
91
PA23
93
PA25
95
PA27
97
PA31 102
VDDANA_2 104
PD30
105
PD28
109
PD26
111
PD24
113
PD22
115
PD20
117
PD16
121
PD14
123
GND13
125
PD10
129
PD8
131
PD6
133
PD3
137
PD1
139
VDDIOP1_1
141
GND15
143
PB10
145
PB19
149
PB21
151
PB23
153
PB24
155
GND17
157
USBA_DP
159
GND18
163
USBB_DP
165
GND19
169
USBC_DP
171
USBC_DM
173
GND_ETH1
175
ETH0_TX1+
177
ETH0_TX1-
179
ETH0_RX1+
181
GND_ETH2
185 ETH0_RX1-
183
ETH0_TX2+
187
ETH0_TX2-
189
PC7 30
PE29 8
PE30 10
PE31 12
GND2 14
VDDIOM_2 16
PC24 18
PC22 20
PC20 22
PC19 24
PC17 26
PC9 28
PC5 34
PC30 64
VDDIOP0_2 66
PA1 68
PA3 70
PA4 72
PA8 76
PA10 78
GND8 80
PA13 82
PA15 84
PA17 86
PA20 90
PA22 92
PA26 96
GND10 98
PA29 100
PA30
101
VDDANA_1
103
PD31 106
PD29 108
PD27 110
PD25 112
GND12 116
PD21 118
PD19 120
PD17 122
PD15 124
PD9 130
PD7 132
GND14 134
PD4 136
PD2 138
PD0 140
PB13 144
PB12 146
PB15 148
PB20 150
PB22 152
PB25 156
PB27 158
PB29 160
PB31 162
PB30 164
GND20 170
DIBP 172
DIBN 174
GND22 176
JTAGSEL 178
WKUP 180
SHDN 182
BMS 184
nRST 186
nTRST 188
PC2
35 PC3 36
PC0
37
PC29
61 GND6 62
PA5
73
PA18
87 PA19 88
PA28
99
GND11
107
PD18
119
PD23 114
PD13 126
PD5
135
VDDIOP1_2 142
PB14
147
GND16 154
USBA_DM
161
ETH0_RX2+
191
PD12
127 PD11 128
USBB_DM
167 PB28 168
PB26 166
TDI 190
ETH0_RX2-
193
GND23
195
LED2
197
LED1
199
TCK 192
TMS 194
TDO 196
RTCK 198
GND24 200
C31
1uF
C29
4.7uF
43
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
4.5 Ronetix Schematics
This section contains the schematics for the CM board manufactured by Ronetix:
Main sheet
SODIMM200
Power supply
CPU power supply
DDR2 interface
FI: NAND, NOR, Serial, I2C, 1-wire
Ethernet
USB, JTAG, LEDs
Bus interface
POWER SUPPLY
CPU-POWER SUPPLY
DDR2 INTERFACE
BUS INTERFACE
Fl: NAND/NOR/SERIAL/I2C/1-WIRE
USB/JTAG/LEDS
ETHERNET
SODIM200
4
5
6
A
2
3
1
2
D
B
3
A
B
1
D
C
6
C
5
4
ISSUED
DROWN
A4
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
Z6
Drill No plated 0.85mm
Z7
Drill No plated 0.85mm
Z10
Drill No plated 1.65mm
Z5
Drill No plated 1.65mm
Z8
Drill No plated 1.65mm
Z9
Drill No plated 1.65mm
Z2
Drill No plated 1.8 mm
Z1
Drill No plated 1.8 mm
Z3
Drill No plated 3.2 mm
Z4
Drill No plated 3.2 mm
Z11
Passer 0.7 mm
Z12
Passer 0.7 mm
Z13
Passer 0.7 mm
Z14
Passer 0.7 mm
1
SAMA5D3x-CM
MAIN
20.9.2012
development tool
9
www.ronetix.at
SHEET #
Mechanical
SCHEMATICS: SAMA5D3x-CM
9
8
7
6
5
4
1
MAIN
SHEET NAME
2
3
OPEN
STATUS
REVISION
DESCRIPTION
DATE:
SAMA5D3x-CM v2.0
15.03.2012
Note: To each Signal Reference have one or more digits.
These are the numbers of sheets
to which is connected this signal.
SAMA5D3x-CM v2.0f.scm
CLOSE
2.0
2.0
SAMA5D3x-CM v2.0
20.09.2012
1. SoDIMM200 change:
* PB13 pin 144 with 0R DNP
* PB12 pin 146 with 0R populated
2. VDD_CORE from 1.20V to 1.25V
Changes Rev2.0
7. R4 - Changed attribute Note from DNP to "empty"
5. Q1 from BSS138W(SOT323) to BSS138(SOT23)
6. C74 - from 47uF Tant to 22uF 0805
Added - C128 22uF 0805
C78 - from 47uF Tant to 22uF 0805
Added - C129 22uF 0805
C81 - from 47uF Tant to 22uF 0805
Added - C130 22uF 0805
C75 - from 47uF Tant to 22uF 0805
Added - C131 22uF 0805
C80 - from 47uF Tant to 22uF 0805
Added - C132 22uF 0805
C92 - from 10u Tant to 10u 0805
3. US1 - From TPS71712DCKR to BU12TD3WG-TR and attribute DNP
10. U8 changed to HY27UF082G2B-TPCB
9. U6 changed to EN29GL128H-70BAIP
8. Y1 changed to CM200C-32.768KDZF-UT
4. Replaced Q2 with U15 SC189ASKTRT 1V0
4
5
C
6
C
D
1
B
A
3
B
D
2
1
3
2
A
6
5
4
REV
DATE
DESCRIPTION FILE
SHEET NO
PROJECT TITLE
SHEET TITLE
FILE
SIZE
OF
A4
DROWN
ISSUED
USBC_DM
8
PD5/MCI0_DA4/TIOA0/PWMH2
9
PD1/MCI0_DA0
9
PD8/MCI0_DA7//PWML3
9
PD6/MCI0_DA5/TIOB0/PWML2
9
PB10/GTXER/RF1
7
PB14/GCRS/CANRX1
7
PB19/MCI1_CDA/GTX4
7
PB21/MCI1_DA1/GTX6
7
PB23/MCI1_DA3/GRX4
7
PB24/MCI1_CK/GRX5
7
USBA_DM
8
USBA_DP
8
USBB_DM
8
USBB_DP
8
USBC_DP
8
ETH0_TX1+
7
ETH0_TX1-
7
ETH0_RX1+
7
ETH0_RX1-
7
ETH0_TX2+
7
ETH0_TX2-
7
ETH0_RX2+
7
ETH0_RX2-
7
LED2
7
LED1
7
PD28/AD8
9
PC10/MCI2_CDA//LCDDAT20
9
PC27/SPI1_NPCS2/TWCK1/ISI_D10
9
PD12/SPI0_SPCK
6;9
PD10/SPI0_MISO
6;9
PD3/MCI0_DA2
9
PA30/TWD0/URXD1/ISI_VSYNC
9
PA21/LCDDAT21/PWML0/ISI_D5
9
PA23/LCDDAT23/PWML1/ISI_D7
9
PA28/LCDPCK
9
PA12/LCDDAT12
9
PA9/LCDDAT9
9
PA7/LCDDAT7
9
PA18/LCDDAT18/TWD2/ISI_D2
9
PC29/URXD0/PWMFI2/ISI_D8
9
PC14/MCI2_DA3/TCLK1/LCDDAT16
9
PC12/MCI2_DA1/TIOA1/LCDDAT18
9
PE27/NCS1/TIOA2/LCDDAT22
6
PA0/LCDDAT0
9
PC31/FIQ/PWMFI1
9
PA27/LCDHSYNC
9
PA25/LCDDISP
9
PA16/LCDDAT16/ISI_D0
9
PA14/LCDDAT14
9
PA5/LCDDAT5
9
PA2/LCDDAT2
9
PD30/AD10
9
PD26/AD6
9
PD24/AD4
9
PD22/AD2
9
PD18/TXD0
9
PD20/AD0
9
PA11/LCDDAT11
9
PD16/RTS0/SPI0_NPCS3/PWMFI3
9
PD14/SCK0/SPI0_NPCS1/CANRX0
9
PB31/DTXD
7
PB29/TXD1
7
PB27/RTS1/PWMH1
7
PB25/SCK1/GRX6
7
PB30/DRXD
7
PB26/CTS1/GRX7
7
PB28/RXD1
7
PD0/MCI0_CDA
9
PD9/MCI0_CK
9
DIBP
8
DIBN
8
JTAGSEL
8
WKUP
8
SHDN
8
BMS
8
NRST
6;7;8
NTRST
8
TDI/SWD
8
TCK/SWCLK
8
TMS/SWDIO
8
TDO
8
PA10/LCDDAT10
9
PA8/LCDDAT8
9
PA4/LCDDAT4
9
PA3/LCDDAT3
9
PA1/LCDDAT1
9
PA24/LCDPWM
9
PA17/LCDDAT17/ISI_D1
9
PA19/LCDDAT19/TWCK2/ISI_D3
9
PA22/LCDDAT22/PWMH1
9
PA29/LCDDEN
9
PA31/TWCK0/UTXD1/SI_HSYNC
9
PA26/LCDVSYNC
9
PA13/LCDDAT13
9
PA20/LCDDAT20/PWMH0
9
PC30/UTXD0//ISI_PCK
9
PA6/LCDDAT6
9
ADVREF
4
PD15/CTS0/SPI0_NPCS2/CANTX0
9
PC11/MCI2_DA0//LCDDAT19
9
PC13/MCI2_DA2/TIOB1/LCDDAT17
9
PC15/MCI2_CK/PCK2/LCDDAT21
9
PC26/SPI1_NPCS1/TWD1/ISI_D11
9
PC28/SPI1_NPCS3/PWMFI0/ISI_D9
9
PD25/AD5
9
PE28/NCS2/TIOB2/LCDDAT23
6
PA15/LCDDAT15
9
PD31/AD11
9
PD29/AD9
9
PD27/AD7
9
PD23/AD3
9
PD21/AD1
9
PD19/ADTRG
9
PD13/SPI0_CS0
6;9
PD2/MCI0_DA1
9
PD7/MCI0_DA6/TCLK0/PWMH3
9
PD11/SPI0_MOSI
6;9
PD17/RXD0
9
PD4/MCI0_DA3
9
PC8/EMDC/TCLK5
9
POWER_ENABLE
3
PC0/ETX0/TIOA3
9
PC2/ERX0/TCLK3
9
PC4/ETXEN/TIOB4
9
PC6/ERXER/TIOA5
9
PE25/RXD2/1-Wire
6;8
PE23/A23_NOR/CTS2
6
PC21/RD0
9
PE26/NCS0/TXD2
6
PE24/RTS2
6;8
PC25/SPI1_NPCS0
9
PC23/SPI1_MOSI
9
PC16/TK0
9
PC18/TD0
9
PC1/ETX1/TIOB3
9
PC3/ERX1/TIOA4
9
CS_BOOT_DISABLE
6
PE31/IRQ/PWML1
6
PE30/NWAIT
6
PE29/NWR1(NBS1)/TCLK2
6
PC22/SPI1_MISO
9
PC24/SPI1_SPCK
9
PC20/RF0
9
PC5/ECRSDV/TCLK4
9
PC7/EREFCK/TIOB5
9
PC19/RK0
9
PC17/TF0
9
PC9/EMDIO
9
PB15/GCOL/CANTX1
7
PB20/MCI1_DA0/GTX5
7
PB22/MCI1_DA2/GTX7
7
PB12/RX_DV
7
PB13/GRXER/PWML3
7
3V3 3V3
VDD_IOP1
VDD_ANA
VDD_IOP0
VDD_ANA
VDD_IOP0
VDD_IOM VDD_IOM
VDD_IOP1
GND
GND
GND
GND
Vbat
C1
100n/10V
C2
100n/10V
0402
R74
0R
0402
R78
0R
DNP
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15
16
17
18
19
20
21
22
23 24
25
26
27
28
29
30
31
32
33 34
35
36
37
38
39
40
41
42
43 44
45
46
47
48
49
50
51
52
53 54
55
56
57
58
59
60
61
62
63 64
65
66
67
68
69
70
71
72
73 74
75
76
77
78
79
80
81
82
83 84
85
86
87
88
89
90
91
92
93 94
95
96
97
98
99
100
101
102
103 104
105
106
107
108
109 110
111
112
113 114
115
116
117
118
119 120
121
122
123 124
125
126
127
128
129 130
131
132
133 134
135
136
137
138
139 140
141
142
143 144
145
146
147
148
149 150
151
152
153 154
155
156
157
158
159 160
161
162
163 164
165
166
167
168
169 170
171
172
173 174
175
176
177
178
179 180
181
182
183 184
185
186
187
188
189 190
191
192
193 194
195
196
197
198
199
200
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17
A18
B18
A19
B19
A20
B20
A21
B21
A22
B22
A23
B23
A24
B24
A25
B25
A26
B26
A27
B27
A28
B28
A29
B29
A30
B30
A31
B31
A32
B32
A33
B33
A34
B34
A35
B35
A36
B36
A37
B37
A38
B38
A39
B39
A40
B40
A41
B41
A42
B42
A43
B43
A44
B44
A45
B45
A46
B46
A47
B47
A48
B48
A49
B49
A50
B50
A51
B51
A52
B52
A53
B53
A54
B54
A55
B55
A56
B56
A57
B57
A58
B58
A59
B59
A60
B60
A61
B61
A62
B62
A63
B63
A64
B64
A65
B65
A66
B66
A67
B67
A68
B68
A69
B69
A70
B70
A71
B71
A72
B72
A73
B73
A74
B74
A75
B75
A76
B76
A77
B77
A78
B78
A79
B79
A80
B80
A81
B81
A82
B82
A83
B83
A84
B84
A85
B85
A86
B86
A87
B87
A88
B88
A89
B89
A90
B90
A91
B91
A92
B92
A93
B93
A94
B94
A95
B95
A96
B96
A97
B97
A98
B98
A99
B99
A100
B100
CN1
SODIM200_PCB_PADS
Power Supply 2.5V
9
development tool
20.9.2012
SAMA5D3x-CM
SAMA5D3x-CM v2.0f.scm
MECHANICAL KEYING SODDIM200 :
Power Supply 2.5V -> distance between pin 39 and center notch = 1.80mm
Power Supply 1.8V -> distance between pin 39 and center notch = 2.70mm
SODIM200
2
www.ronetix.at
RTCK
VDDIOP1
VDDIOP1
Enable_3
Enable_2
Enable_1
Enable_0
VCC 5V
VCC 5V
VCC 5V
VCC 5V
4
5
6
A
2
3
1
2
D
B
3
A
B
1
D
C
6
C
5
4
ISSUED
DROWN
A4
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
POWER_ENABLE
2;3
POWER_ENABLE
2;3
3V3
3V3
3V3
3V3
3V3
3V3
VDDIODDR
VDD_IOP0
VDD_IOP1
VDD_IOM
VDD_ANA
VDD_CORE
VDD_IOP0
VDD_IOM
VDD_IOP1
VDD_ANA
VDDIODDR
VDD_CORE
VDDFUSE
VDD_CORE
VDD_PLL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND
GND
GND
3V3
1
2
3
4
5
VIN
GND
STBY
NC
VOUT
US1
BU12TD3WG-TR
OR BU10TD3WG-TR
C9
1uF/10V
C123
1uF/10V
C124
1uF/10V
C10
1uF/10V
C5
10n/25V
C8
10n/25V
C11
10n/25V
C6
22u/6V3
C7
22u/6V3
C3
22u/6V3
C4
22u/6V3
L2
LQM2HPN1R0MG0L
L1
LQM2HPN1R0MG0L
3
GND
In
Out
1
2
U13
MCP1700T-2502E/TT
0402
RS1
2k49/1%
0402
R3
5k1/1%
0402
R2
6k34/1%
0402
RS2
10k/1%
0603
R7
0R
0603
R8
0R
0603
R5
0R
0603
R6
0R
0603
R4
0R
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U2
SC189ASKTRT 1V0
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U1
SC189ASKTRT 1V0
0402
R1
100k
TP1
3V3
TP9
POWER_ENABLE
TP2
VDD_CORE
TP8
GND
TP6
VDD_IOM
TP3
VDDIODDR
TP5
VDD_IOP1
TP4
VDD_IOP0
TP7
VDD_ANA
SEE TABLE 1
POWER SUPPLY
SEE TABLE 1
SEE TABLE 1
20.9.2012
SAMA5D3x-CM
9
Close to SODIM200
SAMA5D3x-CM v2.0f.scm
3
2k49ohm 1%
RS1
2k5ohm 1%
RS1=(Vout-1)xRS2
10kOhm 1%
1.25V
BU10TD3WG-TR
1.2V
BU12TD3WG-TR
2kOhm 1%
RS1
RS2
VDD_CORE
development tool
www.ronetix.at
GND pins are provided and should be
connected as shortly as possible
to the system ground plane.
SODIM200 (103-104)
SODIM200 (15-16)
SODIM200 (65-66)
SODIM200 (141-142)
TABLE 1
10kOhm 1%
0R (JUMP)
US1
1.0V
DNP
Typ
us
100
V
0.4
V
1.2
Max
EN Input Low Threshold
Min
EN Input High Threshold
Soft-Start Time
0.3
EN Input High Threshold
Min
EN Input Low Threshold
Max
1.2
V
50
V
Start Time
us
Typ
DNP
4
5
6
A
2
3
1
2
D
B
3
A
B
1
D
C
6
C
5
4
ISSUED
DROWN
A4
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
ADVREF
2;4
ADVREF
2;4
3V3
3V3
AGND
VDD_IOP0
VDD_IOP1
VDD_PLL
VDD_CORE
VDD_IOM
UTMI_GND
UTMI_GND
VDD_PLL
VDDFUSE
VDDIODDR
UTMI_GND
VDD_ANA
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Vbat
L4
BLM15AG121SN1D
L5
BLM15AG121SN1D
L6
BLM15AG121SN1D
L3
BLM15AG121SN1D
C14
100n/10V
C16
100n/10V
C15
100n/10V
C18
100n/10V
C17
100n/10V
C19
100n/10V
C23
100n/10V
C12
100n/10V
C13
100n/10V
C20
100n/10V
C22
100n/10V
C21
100n/10V
C24
100n/10V
C25
100n/10V
C40
100n/10V
C105
100n/10V
C26
100n/10V
C28
100n/10V
C27
100n/10V
C30
100n/10V
C29
100n/10V
C38
470n/16V/Y5V
C35
470n/16V/Y5V
C32
470n/16V/Y5V
C42
470n/16V/Y5V
C33
470p/50V
C34
470p/50V
C39
470p/50V
C43
470p/50V
C36
4u7/6V3/X5R
C31
4u7/6V3/X5R
C37
4u7/6V3/X5R
C41
4u7/6V3/X5R
C5
C7
D14
T15
U17
V7
T7
C9
N13
T8
T14
V17
A16
D13
F14
G10
G13
H11
E14
F10
F13
F15
H14
P12
T16
J11
T17
G7
V11
L11
M4
E5
J7
N11
U7
V15
T13
L6
L4
R3
P4
R10
P10
U11
T11
V13
U13
R12
L5
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
GNDCORE
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
GNDIODDR
VDDIOM
VDDIOM
GNDIOM
GNDIOM
VDDIOP0
VDDIOP0
VDDIOP1
VDDIOP1
GNDIOP
GNDIOP
GNDIOP
GNDIOP
VDDBU
GNDBU
VDDANA
GNDANA
VDDFUSE
GNDFUSE
VDDPLLA
GNDPLL
VDDOSC
GNDOSC
VDDUTMIC
VDDUTMII
GNDUTMI
ADVREF
U3-A
SAMA5D3x
0603
R57
0R
0603
R9
0R
TP10
ADVREF
TP11
GND
4
SAMA5D3x-CM
CPU-POWER SUPPLY
20.9.2012
9
www.ronetix.at
development tool
SAMA5D3x-CM v2.0f.scm
A cooper for UTMI_GND net
cover all USB Components
top/bot
top/bot top/bot
top/bot
(3V3)
top/bot
DDR_A3
DDR_A6
DDR_A13
DDR_A12
DDR_A11
DDR_A2
DDR_A1
DDR_A0
DDR_A8
DDR_A5
DDR_A4
DDR_A10
DDR_A7
DDR_A9
DDR_A13
DDR_A11
DDR_A7
DDR_A6
DDR_A8
DDR_A0
DDR_A1
DDR_A4
DDR_A3
DDR_A5
DDR_A10
DDR_A9
DDR_A12
DDR_A2
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D27
DDR_D28
DDR_D31
DDR_D29
DDR_D30
DDR_D15
DDR_D20
DDR_D24
DDR_D22
DDR_D21
DDR_D23
DDR_D19
DDR_D18
DDR_D17
DDR_D16
DDR_D26
DDR_D25
DDR_D9
DDR_D11
DDR_D12
DDR_D4
DDR_D2
DDR_D10
DDR_D8
DDR_D7
DDR_D3
DDR_D6
DDR_D5
DDR_D0
DDR_D1
DDR_D13
DDR_D14
DDR_D1
DDR_D0
DDR_D12
DDR_D2
DDR_D9
DDR_D10
DDR_D11
DDR_D6
DDR_D5
DDR_D4
DDR_D3
DDR_D7
DDR_D8
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D31
DDR_D30
DDR_D24
DDR_D23
DDR_D22
DDR_D21
DDR_D18
DDR_D19
DDR_D20
DDR_D27
DDR_D26
DDR_D29
DDR_D28
DDR_D25
DDR_A[0-13]
DDR_A[0-13]DDR_A[0-13]
DDR_D[0-31]
DDR_D[0-15]
DDR_D[16-31]
DDR_ADDR
DDR_ADDRDDR_ADDR
DDR_DATA
DDR_DATA DDR_DATA
4
5
6
A
2
3
1
2
D
B
3
A
B
1
D
C
6
C
5
4
ISSUED
DROWN
A4
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
DDR_BA2
5
DDR_BA1
5
DDR_BA0
5
DDR_DQM2
5
DDR_DQS2
5
DDR_DQS3
5
DDR_WE#
5
DDR_CAS#
5
DDR_RAS#
5
DDR_CKE
5
DDR_DQM3
5
DDR_DQM1
5
DDR_DQM0
5
DDR_DQS1
5
DDR_DQS0
5
DDR_CK#
5
DDR_CK
5
DDR_CS#
5
DDR_RAS#
5
DDR_CAS#
5
DDR_WE#
5
DDR_BA0
5
DDR_BA2
5
DDR_BA1
5
DDR_VREF
5
DDR_DQM1
5
DDR_DQM0
5
DDR_BA0
5
DDR_BA1
5
DDR_RAS#
5
DDR_CS#
5
DDR_WE#
5
DDR_CAS#
5
DDR_BA2
5
DDR_CK
5
DDR_CK#
5
DDR_DQS1
5
DDR_DQS0
5
DDR_DQS2
5
DDR_DQS3
5
DDR_DQM3
5
DDR_DQM2
5
DDR_VREF
5
DDR_VREF
5
DDR_VREF
5
DDR_CKE
5
DDR_CKE
5
DDR_CK#
5
DDR_CK
5
DDR_VREF
5
DDR_CS#
5
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR
VDDIODDR VDDIODDR
GND
GND
GND
GNDGND GND
GND
GND GND
GND GND
GND GND
GNDGND
GND
L7
BLM15AG121SN1D
C60
100n/10V
C63
100n/10V
C55
100n/10V
C58
100n/10V
C59
100n/10V
C51
100n/10V
C50
100n/10V
C54
100n/10V
C46
100n/10V
C47
100n/10V
C62
100n/10V
C65
100n/10V
C56
100n/10V
C44
100n/10V
C48
100n/10V
C45
100n/10V
C52
100n/10V
C49
100n/10V
C57
100n/10V
C53
100n/10V
C76
100n/10V
C77
100n/10V
C79
100n/10V
C108
100n/10V
C109
100n/10V
C110
100n/10V
C111
100n/10V
C112
100n/10V
C113
100n/10V
C114
100n/10V
C115
100n/10V
C116
100n/10V
C117
100n/10V
C118
100n/10V
C119
100n/10V
C120
100n/10V
C61
100n/10V
C64
4u7/6V3/X5R
B10
C11
A9
D11
B9
E10
D10
A8
C10
B8
F11
A7
D9
A6
H12
H17
H13
G17
G16
H15
F17
G15
F16
E17
G14
E16
D17
C18
D16
C17
B16
B18
C15
A18
C16
C14
D15
B14
A15
A14
E12
A11
B11
F12
A10
E11
G12
E15
B15
D12
E18
G18
B17
B13
D18
F18
A17
A13
C8
B12
A12
B7
G11
A5
B5
E9
B6
F9
C12
E13
C13
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQSN0
DDR_DQSN1
DDR_DQSN2
DDR_DQSN3
DDR_CS
DDR_CLK
DDR_CLKN
DDR_CKE
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA0
DDR_BA1
DDR_BA2
DDR_CALN
DDR_CALP
DDR_VREF
U3-H
SAMA5D3x
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K3
L7
K7
L8
K9
K2
J8
K8
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
F7
E8
B7
A8
F3
B3
A2
E2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
RFU(A13)
RFU
RFU
BA0
BA1
BA2
WE#
CAS#
RAS#
CS#
ODT
CKE
CK
CK#
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS#/NU
UDQS
UDQS#/NU
LDM
UDM
NC
NC
VREF
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
U4
MT47H128M16RT-3:C
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
R3
R7
L2
L3
L1
K3
L7
K7
L8
K9
K2
J8
K8
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
F7
E8
B7
A8
F3
B3
A2
E2
J2
A1
E1
J9
M9
R1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
J1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
RFU(A13)
RFU
RFU
BA0
BA1
BA2
WE#
CAS#
RAS#
CS#
ODT
CKE
CK
CK#
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS#/NU
UDQS
UDQS#/NU
LDM
UDM
NC
NC
VREF
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
U5
MT47H128M16RT-3:C
0402
R12
1k5/1%
0402
R14
1k5/1%
0402
R51
0R
0402
R50
0R
DNP
0402
R52
0R
DNP
0402
R53
0R
0402
R11
1R
0402
R72
4k7
0402
R73
4k7
0402
R70
4k7
0402
R71
4k7
0402
R13
200R
0402
R10
200R
TP13
TP12
SAMA5D3x-CM
development tool
9
12.09.2012
DDR2 INTERFACE
20.9.2012
SAMA5D3x-CM v2.0f.scm
www.ronetix.at
5
group 1AB
group 1AB
A
top/bot
Differential
100 ohms
top/bot
top/bot
group 1AB
group 1AB
group 1AB
group 1AB
group 1AB
Zo=50 ohms
keeping propagation delay equal
(between 2A & 2B too)
DQS-4w-DQ-3w-DQM-4w-DQS
group 2B
L3 & L8
Data traces may not exceed 1.3 inches (33.0 mm).
Data traces must be length-matched to within 0.1 inch (2.54 mm).
Data traces must match the data group trace lengths to within
0.25 inches (6.35 mm).
DQS-4w-DQ-3w-DQM-4w-DQS
Zo=50 ohms
keeping propagation delay equal
(between 2A & 2B too)
L3 & L8
group 2A
minimizing crosstalk with [DQ, DQS, DQM]
Zo=50 ohms
B
Keep nets as short as possible, therefore, DDR2 devices have to be placed close as possible of MIURA.
The layout EBI DDR2 should use controlled impedance traces of ZO = 50Ohm characteristic impedance.
Trace width = 0.13mm: target 50Ohm impedance.
Trace space = 0.30 to 0.38 mm.
Address and control traces may not exceed 1.3 inches (33.0 mm).
Address and control traces must be length-matched to within 0.1 inch (2.54 mm).
Address and control traces must match the data group trace lengths to within 0.25 inches (6.35 mm).
L3 & L8
group 3AB
Chenged U4 and U5
From MT47H64M16HR-25H to MT47H128M16RT-3:C
B
C
A
D
E
F
2
1
2
1
6
D
E
F
C
B
5
4
3
7
8
A
8
7
6
5
4
3
ISSUED
DROWN
A3
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
NAND_CS/NCS3
6
PD13/SPI0_CS0
2;6;9
CS_BOOT_DISABLE
2
NAND_CS/NCS3
6
PD13/SPI0_CS0
2;6;9
NAND_CS_R/NCS3
6
PD12/SPI0_SPCK
2;6;9
PD10/SPI0_MISO
2;6;9
PD11/SPI0_MOSI
2;6;9
NAND_RD/BY
6
PD11/SPI0_MOSI
2;6;9
PD10/SPI0_MISO
2;6;9
PD12/SPI0_SPCK
2;6;9
NAND_RD/BY
6
D7
6
D6
6
NRD_NOR/NAND_OE
6
NWE_NOR/NAND_WE
6
A22_NOR/NAND_CLE
6
A21_NOR/NAND_ALE
6
D0
6
D3
6
D2
6
D1
6
NAND_CS_R/NCS3
6
D5
6
D4
6
PE23/A23_NOR/CTS2
2;6
A22_NOR/NAND_CLE
6
A21_NOR/NAND_ALE
6
A3_NOR
6
D6
6
D7
6
A1_NOR
6
A2_NOR
6
A6_NOR
6
A5_NOR
6
A4_NOR
6
NRD_NOR/NAND_OE
6
NWE_NOR/NAND_WE
6
NRST
2;7;8
PE26/NCS0/TXD2
2;6
D3
6
D2
6
D1
6
A13_NOR
6
D0
6
A12_NOR
6
A15_NOR
6
A19_NOR
6
A20_NOR
6
A18_NOR
6
A17_NOR
6
A16_NOR
6
A8_NOR
6
A11_NOR
6
A7_NOR
6
A9_NOR
6
A10_NOR
6
D9
6
D8
6
D15
6
D14
6
D11
6
D10
6
D13
6
D12
6
A14_NOR
6
D5
6
D4
6
A11_NOR
6
A12_NOR
6
A4_NOR
6
A3_NOR
6
A2_NOR
6
A1_NOR
6
A10_NOR
6
A9_NOR
6
A8_NOR
6
A7_NOR
6
A6_NOR
6
A5_NOR
6
A13_NOR
6
A14_NOR
6
A19_NOR
6
A16_NOR
6
A15_NOR
6
A17_NOR
6
A18_NOR
6
D3
6
D1
6
D0
6
D2
6
D4
6
NWE_NOR/NAND_WE
6
D9
6
NRD_NOR/NAND_OE
6
D15
6
NAND_RD/BY
6
NAND_CS/NCS3
6
D8
6
D12
6
D13
6
D14
6
D10
6
D11
6
A22_NOR/NAND_CLE
6
A21_NOR/NAND_ALE
6
A20_NOR
6
PE29/NWR1(NBS1)/TCLK2
2
PE31/IRQ/PWML1
2
PE25/RXD2/1-Wire
2;6;8
PE23/A23_NOR/CTS2
2;6
PE27/NCS1/TIOA2/LCDDAT22
2
PE30/NWAIT
2
PE28/NCS2/TIOB2/LCDDAT23
2
PE26/NCS0/TXD2
2;6
PE24/RTS2
2;8
D7
6
D6
6
D5
6
PE25/RXD2/1-Wire
2;6;8
VDD_IOP0
VDD_IOM
VDD_IOP0
VDD_IOM
VDD_IOP0
VDD_IOP0
VDD_IOP0
VDD_IOM
VDD_IOM
VDD_IOM
VDD_IOM
VDD_IOM
VDD_IOM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
3
4
5
6
7
8
CS#
SO (SOI)
WP#
GND
SI (SIO)
SCK
HOLD#
VCC
U10
AT25DF321A-SH
D1
BAT54CWT1G
C68
100n/10V
C72
100n/10V
C69
100n/10V
C73
100n/10V
C70
100n/10V
C71
100n/10V
C67
100n/10V
C66
100n/10V
1
2
3
4
5
6
GND
IO
NC
NC
NC
NC
U7
DS2431P
1
2
J1
HEADER SMD 2x1/2mm/90dgr
1
2
J2
HEADER TH 2x1/2mm/90dgr
P13
R14
R13
V18
P14
U18
T18
R15
P17
P15
P18
R16
N16
R17
N17
R18
N18
P16
M18
N15
M15
N14
M17
M13
M16
N12
M14
M12
L13
L15
L14
L16
K12
K15
K14
K16
K13
K17
J12
K18
J14
J16
J13
J17
J15
J18
H16
H18
L12
L18
L17
K11
PE0/A0(NBS0)
PE1/A1
PE2/A2
PE3/A3
PE4/A4
PE5/A5
PE6/A6
PE7/A7
PE8/A8
PE9/A9
PE10/A10
PE11/A11
PE12/A12
PE13/A13
PE14/A14
PE15/A15/SCK3
PE16/A16/CTS3
PE17/A17/RTS3
PE18/A18/RXD3
PE19/A19/TXD3
PE20/A20/SCK2
PE21/A21(NANDALE)
PE22/A22(NANDCLE)
PE23/A23/CTS2
PE24/A24/RTS2
PE25/A25/RXD2
PE26/NCS0/TXD2
PE27/NCS1/TIOA2/LCDDAT22
PE28/NCS2/TIOB2/LCDDAT23
PE29/NWR1(NBS1)/TCLK2
PE30/NWAIT
PE31/IRQ/PWML1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
NCS3
NANDRDY
NRD
NWE(NWR0)
U3-G
SAMA5D3x
0402
R18
1k5/1%
0402
R22
0R
0402
R25
0R
DNP
0402
R19
0R
0402
R20
0R
0402
R27
10k
0402
R21
10k
0402
R24
10k
0402
R65
22R
0402
R16
22R
0402
R26
100k
NAND_WP
0402
R23
100k
0402
R17
100k
0402
R15
100k
5
OE
2
Y
VCC
A
4
1
3
GND
U11
SN74LVC1G126DBVT
5
OE
2
Y
VCC
A
4
1
3
GND
U9
SN74LVC1G126DBVT
E3
H3
E4
H4
H5
E5
H6
E6
F3
G3
F4
G4
F5
G6
F6
G7
E2
D2
C2
A2
B2
D3
C3
A3
B6
A6
C6
D6
B7
A7
C7
D7
E7
B3
C4
D5
D4
C5
B8
A5
F2
G2
B5
F7
A4
B4
D8
F1
G5
A1
A8
B1
C1
C8
D1
E1
F8
G1
G8
H1
H8
E8
H2
H7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15/A-1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
W#
E#
G#
RP#
BYTE#
R/B#
VPP/WP#
VCCQ
VCCQ
VCC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSS
VSS
VSS
U6
EN29GL128H-70BAIP
M29W128GL70ZA6E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
NC
NC
NC
NC
NC
RD/BY#
RE#
CE#
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP#
NC
NC
NC
NC
NC
VSS!
NC
NC
NC
DQ0
DQ1
DQ2
DQ3
NC
VCC!
NC
VSS
VCC
DNU
VCC!
NC
DQ4
DQ5
DQ6
DQ7
NC
NC
DNU
VSS!
U8
HY27UF082G2B-TPCB
MT29F2G08ABAEAWP-IT
TP19
PD12/SPI0_SPCK
TP18
PD11/SPI0_MOSI
TP14
NAND_RD/BY
TP15
NAND_CS/NCS3
TP16
PD13/SPI0_CS0
TP20
GND
TP17
PD10/SPI0_MISO
SAMA5D3x-CM
9
6
Fl: NAND/NOR/SERIAL/I2C/1-WIRE
L3 & L8
Static Memory Controller and External Bus Interface
split up (close as possible to microcontroller)
each trace into X traces according to the number of device targets:
in this case NAND Flash and NOR Flash
Zo=60 ohms +/-10%
20.9.2012
SAMA5D3x-CM v2.0f.scm
development tool
www.ronetix.at
Alternative component : M29W128GL70ZA6E
NOR FLASH
L3 & L8
top/bot
SERIAL FLASH
1-Wire EEPROM
NAND FLASH
Alternative component : MT29F2G08ABAEAWP-IT
Zo=60 ohms +/-10%
Populate either R25 or J1 /J2/
ETH_V1
B
C
A
D
E
F
2
1
2
1
6
D
E
F
C
B
5
4
3
7
8
A
8
7
6
5
4
3
ISSUED
DROWN
A3
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
PB10/GTXER/RF1
2
PB5/GRX1
7
PB6/GRX2
7
PB4/GRX0
7
PB7/GRX3
7
PB11/RX_CLK
7
PB8/GTX_CLK
7
PB9/GTXEN
7
PB1/GTX1
7
PB0/GTX0
7
PB2/GTX2
7
PB3/GTX3
7
LED2
2
LED1
2
ETH0_TX1+
2
ETH0_TX1-
2
ETH0_RX1+
2
ETH0_RX1-
2
ETH0_TX2+
2
ETH0_TX2-
2
ETH0_RX2+
2
ETH0_RX2-
2
PB18/CLK125_NDO
7
PB12/RX_DV
2;7
PB25/SCK1/GRX6
2;7
PB16/GMDC
7
PB17/GMDIO
7
PB11/RX_CLK
7
PB7/GRX3
7
PB12/RX_DV
2;7
PB5/GRX1
7
PB6/GRX2
7
PB8/GTX_CLK
7
PB3/GTX3
7
PB4/GRX0
7
PB2/GTX2
7
PB0/GTX0
7
PB9/GTXEN
7
PB1/GTX1
7
NRST
2;6;8
PB13/GRXER/PWML3
2
PB18/CLK125_NDO
7
PB24/MCI1_CK/GRX5
2
PB17/GMDIO
7
PB16/GMDC
7
PB27/RTS1/PWMH1
2
PB28/RXD1
2
PB25/SCK1/GRX6
2;7
PB26/CTS1/GRX7
2
PB29/TXD1
2
PB30/DRXD
2
PB31/DTXD
2
PB19/MCI1_CDA/GTX4
2
PB23/MCI1_DA3/GRX4
2
PB21/MCI1_DA1/GTX6
2
PB22/MCI1_DA2/GTX7
2
PB20/MCI1_DA0/GTX5
2
PB15/GCOL/CANTX1
2
PB14/GCRS/CANRX1
2
ETH_DVDDH
ETH_DVDDH
ETH_AVDDL
ETH_AVDDL_PLL
ETH_AVDDH
ETH_DVDDH
ETH_DVDDL
ETH_DVDDH
ETH_AVDDH
VDD_IOP1
ETH_AVDDL_PLL
ETH_AVDDL
ETH_DVDDL
ETH_DVDDH
ETH_DVDDH
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GNDGNDGND GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
D2
BAS316
L14
BLM15AG121SN1D
L13
BLM15AG121SN1D
L8
BLM21PG221SN1D
L9
BLM21PG221SN1D
L11
BLM21PG221SN1D
L12
BLM21PG221SN1D
C99
1uF/10V
C96
10n/25V
C98
10n/25V
C95
10n/25V
C97
10n/25V
C87
10n/25V
C90
10n/25V
C91
10n/25V
C121
10n/25V
C85
10n/25V
C83
10n/25V
C84
10n/25V
C88
10n/25V
C89
10n/25V
C93
10n/25V
C106
10n/25V
C94
10n/25V
C127
10n/25V
C86
22p/50V
C82
22p/50V
C122
100n/10V
C107
100n/10V
C92
10u/6V3
C74
22u/6V3
C128
22u/6V3
C78
22u/6V3
C129
22u/6V3
C81
22u/6V3
C130
22u/6V3
C75
22u/6V3
C131
22u/6V3
C132
22u/6V3
Y4
CPX32-25.000MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46 47
48
49
AVDDH
TXRXP_A
TXRXM_A
AVDDL
TXRXP_B
TXRXM_B
TXRXP_C
TXRXM_C
AVDDL
TXRXP_D
TXRXM_D
AVDDH
VSS_PS
DVDDL
LED2/PHYAD1
DVDDH
LED1/PHYAD0
DVDDL
TXD0
TXD1
TXD2
TXD3
DVDDL
GTX_CLK
TX_EN
DVDDL
RXD3/MODE3
RXD2/MODE2
VSS
DVDDL
RXD1/MODE1
RXD0/MODE0
RX_DV/CLK125_EN
DVDDH
RX_CLK/PHYAD2
MDC
MDIO
INT_N
DVDDL
DVDDH
CLK125_NDO/LED_MODE
RESET_N
LDO_O
AVDDL_PLL
XO
XI
AVDDH
ISET
P_GND
U12
KSZ9021RN
L10
LQM2HPN1R0MG0L
T2
N7
T3
N6
P5
T4
R4
U1
R5
P3
R6
V3
P6
V1
R7
U3
P7
V2
V5
T6
N8
U4
M7
U5
M8
T5
N9
V4
M9
P8
M10
R9
PB0/GTX0/PWMH0
PB1/GTX1/PWML0
PB2/GTX2/TK1
PB3/GTX3/TF1
PB4/GRX0/PWMH1
PB5/GRX1/PWML1
PB6/GRX2/TD1
PB7/GRX3/RK1
PB8/GTXCK/PWMH2
PB9/GTXEN/PWML2
PB10/GTXER/RF1
PB11/GRXCK/RD1
PB12/GRXDV/PWMH3
PB13/GRXER/PWML3
PB14/GCRS/CANRX1
PB15/GCOL/CANTX1
PB16/GMDC
PB17/GMDIO
PB18/G125CK
PB19/MCI1_CDA/GTX4
PB20/MCI1_DA0/GTX5
PB21/MCI1_DA1/GTX6
PB22/MCI1_DA2/GTX7
PB23/MCI1_DA3/GRX4
PB24/MCI1_CK/GRX5
PB25/SCK1/GRX6
PB26/CTS1/GRX7
PB27/RTS1/PWMH1
PB28/RXD1
PB29/TXD1
PB30/DRXD
PB31/DTXD
U3-D
SAMA5D3x
0402
RS3
2k/1%
0402
R38
4k99/1%
0402
RS4
10k/1%
0402
R75
0R
DNP
0402
R40
0R
DNP
0402
R77
0R
DNP
0402
R36
1k
0402
R55
4k7
0402
R54
4k7
0402
R45
4k7
0402
R58
4k7
0402
R56
4k7
0402
R35
4k7
0402
R37
4k7
0402
R28
4k7
0402
R31
4k7
0402
R32
4k7
0402
R69
22R
0402
R68
22R
0402
R67
22R
0402
R66
22R
0402
R29
22R
0402
R34
22R
0402
R59
22R
0402
R30
22R
0402
R76
22R
0402
R60
22R
0402
R61
22R
0402
R62
22R
0402
R33
22R
0402
R39
100k
1
2
3
4
5
VIN
GND
EN
VOUT
LX
U15
SC189ASKTRT 1V0
C80
22u/6V3
7
20.9.2012
place close
to U3
RGMII Routing Constraints (Reduced Gigabit Media Independent Interface):
The RGMII signals must be length-matched by TX and RX groups.
That is, the TX group should be matched within 0.25 inch (6.35 mm),
and the RX group should be matched within 0.25 inch (6.35 mm).
Total length should not exceed 1.75 inch (44.5 mm).
There is no requirement to match the TX and RX groups
because their clocks are not related.
SAMA5D3x-CM
9
SAMA5D3x-CM v2.0f.scm
ETHERNET
development tool
www.ronetix.at
place close to CPU
0.5A !
max ?mA-->
max ?mA-->
top/bot
max ?mA-->
top/bot
place close
to KSZ9021RN
2A !
top/bot
top/bot
max 205mA-->
top/bot
max 345mA-->
2A !
2A !
max 563mA-->
place close to KSZ9021RN
top/bot
top/bot
top/bot
2A !
top/bot
top/bot
Cl=Cs+[C1xC2]/[C1+C2]
if C1=C2 =>
C1,2=2[Cl-Cs] !!!
Cl is load capacitance of the cristal.
CS is the stray capacitance on the
printed circuit board,
typically a value of 5pf can be used
for calculation
max 13mA-->
top/bot
top/bot
top/bot
4
5
6
A
2
3
1
2
D
B
3
A
B
1
D
C
6
C
5
4
ISSUED
DROWN
A4
OF
SIZE
FILE
SHEET TITLE
PROJECT TITLE
SHEET NO
DESCRIPTION FILE
DATE
REV
DIBP
2
DIBN
2
TDO
2
PE24/RTS2
2;6
PE25/RXD2/1-Wire
2;6
TMS/SWDIO
2
TCK/SWCLK
2
TDI/SWD
2
JTAGSEL
2
NRST
2;6;7
WKUP
2
BMS
2
SHDN
2
NTRST
2
USBA_DP
2
USBB_DM
2
USBB_DP
2
USBC_DM
2
USBA_DM
2
USBC_DP
2
VDD_IOP0
VDD_IOM VDD_IOM
UTMI_GND
GND
GND
GND
Vbat
GND
S
D
G
Q1
BSS138
C104
10p/50V
C102
18p/50V
C103
18p/50V
C101
27p/50V
C100
27p/50V
Y3
CPX32-12.000MHz
RA1
4x100k
DL2
LED 0603 - BLUE - LTST-C193TBKT-5A
DL1
LED 0603 - RED - LTST-C190CKT
U8
V8
U16
V16
U15
U9
T12
T10
V9
P11
R8
M11
N10
P9
T9
V6
U6
XIN
XOUT
XIN32
XOUT32
TST
BMS
SHDN
WKUP
NRST
NTRST
TDI/SWD
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
DIBP
DIBN
U3-B
SAMA5D3x
R11
U14
V14
U12
V12
U10
V10
VBG
HHSDPC
HHSDMC
HHSDPB
HHSDMB
HHSDPA
HHSDMA
U3-I
SAMA5D3x
Y2
NX3215SA-32.768K
DNP
0402
R48
5k62/1%
0402
R42
0R
DNP
0402
R46
1M
0402
R43
10k
0402
R44
10k
0402
R41
100k
0402
R47
200R
0402
R49
200R
Y1
CM200C-32.768KDZF-UT
20.9.2012
Oscillators
USB
9
USB/JTAG/LEDS
8
Cl=Cs+[C1xC2]/[C1+C2]
if C1=C2 =>
C1,2=2[Cl-Cs] !!!
Cl is load capacitance of the cristal
CS is the stray capacitance on the printed circuit board,
typically a value of 5pf can be used for calculation
top/bot
SAMA5D3x-CM v2.0f.scm
top/bot
top/bot
top/bot
SAMA5D3x-CM
JTAG
top/bot
Max trace-length mismatch
between USB signal pairs
should be no greater than 3.8mm
90 ohms differential trace
impedance
90 ohms differential trace
impedance
90 ohms differential trace
impedance
development tool
www.ronetix.at
top/bot
top/bot
SOFT MODEM
top/bot
top/bot
top/bot
LEDS
4
5
C
6
C
D
1
B
A
3
B
D
2
1
3
2
A
6
5
4
REV
DATE
DESCRIPTION FILE
SHEET NO
PROJECT TITLE
SHEET TITLE
FILE
SIZE
OF
A4
DROWN
ISSUED
PD2/MCI0_DA1
2
PD3/MCI0_DA2
2
PD15/CTS0/SPI0_NPCS2/CANTX0
2
PD14/SCK0/SPI0_NPCS1/CANRX0
2
PD13/SPI0_CS0
2;6
PD11/SPI0_MOSI
2;6
PD5/MCI0_DA4/TIOA0/PWMH2
2
PD4/MCI0_DA3
2
PD8/MCI0_DA7//PWML3
2
PD6/MCI0_DA5/TIOB0/PWML2
2
PD7/MCI0_DA6/TCLK0/PWMH3
2
PD16/RTS0/SPI0_NPCS3/PWMFI3
2
PD0/MCI0_CDA
2
PD1/MCI0_DA0
2
PD31/AD11
2
PD28/AD8
2
PD30/AD10
2
PD29/AD9
2
PD27/AD7
2
PD24/AD4
2
PD23/AD3
2
PD17/RXD0
2
PD20/AD0
2
PD22/AD2
2
PD21/AD1
2
PD19/ADTRG
2
PD18/TXD0
2
PD10/SPI0_MISO
2;6
PD25/AD5
2
PD26/AD6
2
PA31/TWCK0/UTXD1/SI_HSYNC
2
PA21/LCDDAT21/PWML0/ISI_D5
2
PA22/LCDDAT22/PWMH1
2
PA18/LCDDAT18/TWD2/ISI_D2
2
PA19/LCDDAT19/TWCK2/ISI_D3
2
PA23/LCDDAT23/PWML1/ISI_D7
2
PA20/LCDDAT20/PWMH0
2
PA25/LCDDISP
2
PA26/LCDVSYNC
2
PA30/TWD0/URXD1/ISI_VSYNC
2
PA29/LCDDEN
2
PA27/LCDHSYNC
2
PA24/LCDPWM
2
PA8/LCDDAT8
2
PA10/LCDDAT10
2
PA9/LCDDAT9
2
PA7/LCDDAT7
2
PA6/LCDDAT6
2
PA15/LCDDAT15
2
PA12/LCDDAT12
2
PA14/LCDDAT14
2
PA11/LCDDAT11
2
PA13/LCDDAT13
2
PA4/LCDDAT4
2
PA5/LCDDAT5
2
PA3/LCDDAT3
2
PA0/LCDDAT0
2
PA1/LCDDAT1
2
PA2/LCDDAT2
2
PA17/LCDDAT17/ISI_D1
2
PA16/LCDDAT16/ISI_D0
2
PC31/FIQ/PWMFI1
2
PC30/UTXD0//ISI_PCK
2
PC28/SPI1_NPCS3/PWMFI0/ISI_D9
2
PC29/URXD0/PWMFI2/ISI_D8
2
PC25/SPI1_NPCS0
2
PC22/SPI1_MISO
2
PC26/SPI1_NPCS1/TWD1/ISI_D11
2
PC23/SPI1_MOSI
2
PC27/SPI1_NPCS2/TWCK1/ISI_D10
2
PC14/MCI2_DA3/TCLK1/LCDDAT16
2
PC11/MCI2_DA0//LCDDAT19
2
PC13/MCI2_DA2/TIOB1/LCDDAT17
2
PC10/MCI2_CDA//LCDDAT20
2
PC12/MCI2_DA1/TIOA1/LCDDAT18
2
PC7/EREFCK/TIOB5
2
PC1/ETX1/TIOB3
2
PC0/ETX0/TIOA3
2
PC2/ERX0/TCLK3
2
PC9/EMDIO
2
PC8/EMDC/TCLK5
2
PC4/ETXEN/TIOB4
2
PC6/ERXER/TIOA5
2
PC5/ECRSDV/TCLK4
2
PC3/ERX1/TIOA4
2
PC19/RK0
2
PC18/TD0
2
PC17/TF0
2
PC16/TK0
2
PC20/RF0
2
PC21/RD0
2
PD9/MCI0_CK
2
PC15/MCI2_CK/PCK2/LCDDAT21
2
PC24/SPI1_SPCK
2
PA28/LCDPCK
2
PD12/SPI0_SPCK
2;6
D8
A4
E8
A3
A2
F8
B3
G8
B4
F7
A1
D7
C6
E7
B2
F6
B1
E6
C3
D6
C4
D5
C2
G9
C1
H10
H9
D4
H8
G5
D3
E4
PC0/ETX0/TIOA3
PC1/ETX1/TIOB3
PC2/ERX0/TCLK3
PC3/ERX1/TIOA4
PC4/ETXEN/TIOB4
PC5/ECRSDV/TCLK4
PC6/ERXER/TIOA5
PC7/EREFCK/TIOB5
PC8/EMDC/TCLK5
PC9/EMDIO
PC10/MCI2_CDA//LCDDAT20
PC11/MCI2_DA0//LCDDAT19
PC12/MCI2_DA1/TIOA1/LCDDAT18
PC13/MCI2_DA2/TIOB1/LCDDAT17
PC14/MCI2_DA3/TCLK1/LCDDAT16
PC15/MCI2_CK/PCK2/LCDDAT21
PC16/TK0
PC17/TF0
PC18/TD0
PC19/RK0
PC20/RF0
PC21/RD0
PC22/SPI1_MISO
PC23/SPI1_MOSI
PC24/SPI1_SPCK
PC25/SPI1_NPCS0
PC26/SPI1_NPCS1/TWD1/ISI_D11
PC27/SPI1_NPCS2/TWCK1/ISI_D10
PC28/SPI1_NPCS3/PWMFI0/ISI_D9
PC29/URXD0/PWMFI2/ISI_D8
PC30/UTXD0//ISI_PCK
PC31/FIQ/PWMFI1
U3-E
SAMA5D3x
E3
F5
D2
F4
D1
J10
G4
J9
F3
J8
E2
K8
F2
G6
E1
H5
H3
H6
H4
H7
H2
J6
G2
J5
F1
J4
G3
J3
G1
K4
H1
K3
PA0/LCDDAT0
PA1/LCDDAT1
PA2/LCDDAT2
PA3/LCDDAT3
PA4/LCDDAT4
PA5/LCDDAT5
PA6/LCDDAT6
PA7/LCDDAT7
PA8/LCDDAT8
PA9/LCDDAT9
PA10/LCDDAT10
PA11/LCDDAT11
PA12/LCDDAT12
PA13/LCDDAT13
PA14/LCDDAT14
PA15/LCDDAT15
PA16/LCDDAT16/ISI_D0
PA17/LCDDAT17/ISI_D1
PA18/LCDDAT18/TWD2/ISI_D2
PA19/LCDDAT19/TWCK2/ISI_D3
PA20/LCDDAT20/PWMH0
PA21/LCDDAT21/PWML0/ISI_D5
PA22/LCDDAT22/PWMH1
PA23/LCDDAT23/PWML1/ISI_D7
PA24/LCDPWM
PA25/LCDDISP
PA26/LCDVSYNC
PA27/LCDHSYNC
PA28/LCDPCK
PA29/LCDDEN
PA30/TWD0/URXD1/ISI_VSYNC
PA31/TWCK0/UTXD1/SI_HSYNC
U3-C
SAMA5D3x
K5
P1
K6
R1
L7
P2
L8
R2
K7
U2
K9
M5
K10
N4
L9
N3
L10
N5
M6
T1
N2
M3
M2
L3
M1
N1
L1
L2
K1
K2
J1
J2
PD0/MCI0_CDA
PD1/MCI0_DA0
PD2/MCI0_DA1
PD3/MCI0_DA2
PD4/MCI0_DA3
PD5/MCI0_DA4/TIOA0/PWMH2
PD6/MCI0_DA5/TIOB0/PWML2
PD7/MCI0_DA6/TCLK0/PWMH3
PD8/MCI0_DA7//PWML3
PD9/MCI0_CK
PD10/SPI0_MISO
PD11/SPI0_MOSI
PD12/SPI0_SPCK
PD13/SPI0_NPCS0
PD14/SCK0/SPI0_NPCS1/CANRX0
PD15/CTS0/SPI0_NPCS2/CANTX0
PD16/RTS0/SPI0_NPCS3/PWMFI3
PD17/RXD0
PD18/TXD0
PD19/ADTRG
PD20/AD0
PD21/AD1
PD22/AD2
PD23/AD3
PD24/AD4
PD25/AD5
PD26/AD6
PD27/AD7
PD28/AD8
PD29/AD9
PD30/AD10
PD31/AD11
U3-F
SAMA5D3x
0402
R63
22R
0402
R64
22R
SAMA5D3x-CM
9
BUS INTERFACE
20.9.2012
SAMA5D3x-CM v2.0f.scm
top/bot
9
top/bot
top/bot
top/bot
development tool
www.ronetix.at
top/bot
53
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5. Main Board (MB)
5.1 Main Board Overview
The SAMA5D3 series main board (MB) hosts any of the SAMA5D31/33/34/35/36 CPU module boards (CM). The main
board features all necessary peripheral devices and interfaces for processor evaluation.
Figure 5-1. Main Board Top View
54
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 5-2. Annotated MB Layout
55
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.1.1 Equipment List
The SAMA5D3 series MB is a full-featured motherboard. It can be used with all available SAMA5D3 series CM boards.
5.1.2 Technical Specifications
Note: Some of the features mentioned in the above feature summary table are optional. Check the article number of
your module and compare it to the option information list on Table 3-1 “Evaluation Kit Features” of this user
guide to determine which options are available with your particular module.
Table 5-1. MB Technical Specifications
Characteristic Specifications
Supported Module All SAMA5D3 series computer modules
Expansion Slots One 200-pin SODIMM socket
Mass Storage Interfa ce Two high-speed memo ry card hosts
1 x SD card slot (can also read MMC cards)
1 x micro SD card slot
I/O
3 x 20 pin header
1 x 20 + 1 x 15 pin header LCD connector
1 x 10 pin header ISI connector (Image Sensor)
One 1-Wire EEPROM DS28EC20
One power LE D
Communication
1 x Gigabit Ethernet
1 x 10/100 MHz Ethernet
2 x USB High-speed 2.0 Host
1 x USB High-speed 2.0 Host/Device
1 x USARTs, 1 x DBGU
2 x CAN connectors
1 x 10-pin header ZigBee connector
1 x Smart DAA (Softmodem interface)
Sound Wolfson's 8904 Mic in, Headphone out signals
Video 1 x HDMI
LCD LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color
space conversion
ISI ITU-R BT. 601/656 Image Sensor Interface
Debug 1 x On-board SAM-ICE™
1 x Bridge USB/UART DBGU
CMOS Battery On-board Lithium Battery for CMOS backup
Power System power: +5V DC +/-5%
Backup: +1.65V to 3.6V DC
RoHS status Compliant
CE and FCC Part 15 status Compliant
Dimensions 165 * 135 * 20 mm
56
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.1.3 Devices
List of the MB board peripherals:
Two EMAC PHY
One audio CODEC
Two high-speed MCI card interfaces
Two CAN transceivers
One RS232 port with level translator features USART1
One Smart DAA port
Two USB host ports
One USB host/device port
On-board power regulation
LCD/ISI extension interface
HDMI interface
ZigBee® interface
One-wire device
5.1.4 Board Interface Connection
Main power supply (J4)
200 positions socket (as defined in SODIMM 200), 0.6mm pitch (J12)
USB A Host/Device, support USB host/device using a micro AB connector (J20)
USB B Host, support USB host using a type A connector (J19, upper)
USB C Host, support USB host using a type A connector (J19, lower)
USB-to-serial bridge on DBGU, and JTAG-OB functionality (J14)
USART1 (RX, TX, RTS, CTS) connected to a 9-way male RS232 connector (J8)
JTAG, 20-pin IDC connector (J9)
MicroSD connector (J6)
SD/MMC connector (J7)
Gigabit Ethernet ETH0 (J17)
Ethernet ETH1 (J24)
Headphone (J15), line (J13)
Image sensor connector (J11)
HDMI connector (J25)
Expansion connector with all LCD controller signals for DM board connection (QTouch, TFT LCD display with
touchscreen and backlight (J21, J22))
DAA connecter RJ11 6P4C type (J16)
CAN bus connectors RJ12 6P6C type (J18, J27)
ZigBee connector (J10)
Battery socket (J5)
Three expansion connectors with PIO signals (J1, J2, J3)
Test points; various test points are located throughout the board
57
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 5-3. MB Archit ec tu re
Connector SoDIMM200
oooooooooooooooo
oooooooooooooooo
PIO
PIO
RJ45
oooooooo
oooooooo
OnB JTAG
USB/DBGU
O
n
B
J
T
A
G
U
S
B
/
D
B
G
U
OnB JTAG
USB/DBGU
ZIGBEE
Z
I
G
B
E
E
ZIGBEE
Micro
HeadPh
Audio
output
Codec
Codec
Micro
input
Modem
Modem
RJ12
RJ12RJ12
RJ11RJ11
oooooo
oooooo
oooooooooooooo
oooooooooooooo
USART
RS232
U
S
A
R
T
R
S
2
3
2
USART
RS232
4 bits
interface
4
b
i
t
s
i
n
t
e
r
f
a
c
e
4 bits
interface
RJ45
LCD Part 2
LCD Part 2
USB
H/Device ISI HDMI PIO LCDLCD
USB
Host * 2
Ethernet
RGMII
Ethernet
RMII USB
H/Device ISI HDMI PIO LCDLCD
USB
Host * 2
Ethernet
RGMII
Ethernet
RMII
SAM3U
SAM3U
USART1
USART1
Can0
C
a
n
0
Can0
8 bits
interface
8
b
i
t
s
i
n
t
e
r
f
a
c
e
8 bits
interface
MCI0
MCI0 Can1
C
a
n
1
Can1
MCI1
M
C
I
1
MCI1
VCC 5V Jack Audio
Out
Audio
In
ModemZIGBEE
On Board JTAG
Bridge
USB/DBGU
COM1 or
DBGU
RS232
CAN0 & 1MCI0 MIC1
VCC 5V Jack Audio
Out
Audio
In
ModemZIGBEE
On Board JTAG
Bridge
USB/DBGU
COM1 or
DBGU
RS232
CAN0 & 1MCI0 MIC1
SAMA5D3x-MB
ISI
ISI
oooooooo
oooooooo
Ethernet
RGMII ETH0
Ethernet
RGMII ETH0
Ethernet
RMII ETH1
Ethernet
RMII ETH1 LCD Part 1
LCD Part 1
LCD interface
L
C
D
i
n
t
e
r
f
a
c
e
LCD interface
USB
USB
Host
Host Host
Device
H
o
s
t
D
e
v
i
c
e
Host
Device
System
Power
System
Power
CONEXANT
CONEXANT
DBGU
MUX
1-Wire
1-Wire
58
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2 Function Blocks
5.2.1 Processor
The SAMA5D3 series MB board may be used with any of the SAMA5D31/D33/D34/D35/SAMA5D36 CPU modules.
Figure 5-4. SODIMM Interface on MB
PD5
PE23
PC0
PE24
PC2
PE25
PC4
PE26
PC25
PC8
PC23
PC16
PC21
PC18
PE27
PC10
PC29
PC12
PC27
PC14
PA0
PA30
PA2
PA28
PA5
PA27
PA7
PA25
PA23
PA11
PA21
PA12
PA18
PA14
PA16
PD30
PD28
PD6
PD14
PD22
PD8
PD20
PD26
PD24
PD3
PD1
PE29
PE30
PE31
PC24
PC22
PC20
PC19
PC17
PC9
PC7
PC5
PC3
PC1
PE28
PC11
PC13
PC15
PC26
PC28
PC30
PA1
PA3
PA4
PA6
PA8
PA10
PA13
PA15
PA17
PA19
PA20
PA22
PA26
PA29
PA31
PD31
PD29
PD27
PD23
PD21
PD19
PD17
PD15
PD9
PD7
PD4
PD2
PD0
PA9
PA24
PB14
PB19
PB21
PB23
PB24
PB15
PB20
PB22
PB27
PB29
PB31
PC6PC6
BMS
PD18
PD25
PD16
PB10 PB12
PB25
PC31
PB30
BMS
PB26
PB28
PD10
PD12
PD13
PD11
5V 5V
VDDIOP0
3V3 3V3
VDDIOP0
VDDANA
VDDIOP1 VDDIOP1
VDDANA
VDDIOP0
VDDIOM VDDIOM
PD4 5
USBB_DM11
USBB_DP11
USBA_DM11
USBA_DP11
USBC_DP11
USBC_DM11
TDO 14
TDI 14
TCK 14
TMS 14
RTCK 14
NTRST 14
NRST 10,12,14
WAKE UP 12
PA31 7,9,13
PA1 9,13
PA09,13
PA29,13
PA59,13
PA79,13
PA99,13
PA119,13
PA129,13
PA14
9,13
PA1613
PA1813
PA2113
PA2313
PA3 9,13
PA4 9,13
PA6 9,13
PA8 9,13
PA10 9,13
PA13 9,13
PA15 9,13
PA17 13
PA19 13
PA20 13
PA22 13
PA2513
PA279,13
PA289,13
PA24 13
PA26 9,13
PA29 9,13
PA307,9,13
SHDN 4
VBAT 4,12
PD15
PD35
PD65
PD85
PD55
PD2 5
PD0 5
PD7 5
PD9 5
PB245
PB195
PB235
PB215
PB20 5
PB22 5
PB29 6
PB27 6
PD15 6
PD146
PB146,13 PB15 6,13
PC236,13
PC24 6,13
PC22 6,13
PC187,9
PC167,9
PC217PC20 7
PC17 7,9
PC19 7
PD307
PC26 13
PC28 6,13
PC30 13
PC2713
PC2913
ADVREF 12
PB31 6,14
PC010
PC210
PC410
PC6
10
PC810
PC1 10
PC3 10
PC5 10
PC7 10
PC9 10
PC109,13
PC129,13
PC149,13
PC11 9,13
PC13 9,13
PC15 9,13
PE28 6,9,13
PE279,12,13
PD17 5
PD185
PD2611
PD27 11
PD25 11
PE31 6,9,13
PE30 6,10,13
PE29 6,13
PD167
PD2811
PD29 11
PD2013
PD2213
PD2413
PD21 13
PD23 13
PWR_EN4CS_BOOT_DISABLE 12
PD31 9
PB105PB12 5
PE2512,13
PB30 6,14
DIBN 8
DIBP 8
PB28 6
PB26 6
ETH0_GND10
ETH0_TX1-10
ETH0_TX1+10
ETH0_RX1-10
ETH0_RX1+10
ETH0_GND10
ETH0_TX2-10
ETH0_TX2+10
ETH0_RX2-10
ETH0_RX2+10
ETH0_LED210
ETH0_LED110
PD19 13
PC319
LCDD0
JP9 for BMS Cong:
When Open,BMS=1: Boot on embeded ROM
When Close,BMS=0: Boot on External memory
LCDD2
LCDD5
LCDD7
LCDD9
LCDD11
LCDD12
LCDD14
LCDD16
LCDD18 LCDD21
LCDD23
LCDD1
LCDD3
LCDD4
LCDD6
LCDD8
LCDD10
LCDD13
LCDD15
LCDD17
LCDD19LCDD20
LCDD22
LCDDISP
LCDHSYNC
LCDPCK
LCDPWM
LCDVSYNC
LCDDEN
TWCK0 ISI_HSYNCTWD0ISI_VSYNC
MCI0_D7
MCI0_D5
MCI0_D4
MCI0_D2
MCI0_D0 MCI0_D1
MCI0_D3
MCI0_D6
MCI0_CK
MCI0_CDA
MCI1_DA0
MCI1_DA2
MCI1_CDA
MCI1_DA1
MCI1_DA3
MCI1_CK RTS1
TXD1
CTS1
RXD1
CANTX0CANRX0
CANTX1CANRX1
SPI1_MISOSPI1_MOSI SPI1_SPCK
RFRD
TD
PCK0
TK
RK
TF
ISI_D1
ISI_D3
ISI_MCK
ISI_D5
ISI_D7
ISI_D9
ISI_PCK
ISI_D11
ISI_D2
ISI_D0
ISI_D4
ISI_D6
ISI_D8
ISI_D10
DRXD
DTXD
SPI1_NPCS3
MCI0_CD
MCI1_CD
ZB_IRQ0
ZB_IRQ1
ZB_RSTN
ZB_SLPTR
ONE_WIRE
TWCK1 TWD1
AD2_YP
AD0_XP AD1_XM
AD3_YM
HDMI_INT
PCK1(HDMI)
VBUS_SENSE
EN5V_HDC#
EN5V_HDA#
OVCUR_USB
EN5V_HDB#
AD4_LR
PB_USER1
INT_ETH1
E1_MDC
E1_RXER
E1_TXEN
E1_RX0
E1_TX0
E1_MDIO
E1_TXCK
E1_CRSDV
E1_RX1
E1_TX1
INT_AUDIO
PWR_MCI0 PWR_MCI1
RESET_HDMI
R83
4.7k
R83
4.7k
KEY
J12
1612618-1
KEY
J12
1612618-1
PC11 52
PC4
33 PC6
31
PC27
59 PC14
57
VCC3V3_1
41
PC13 54
PE28 50
PE27
49 NC1
47 Enable_2
45
PC10
51
Enable_1 40
PC1 38
GND1
5VCC5V_3
3VCC5V_1
1VCC5V_2 2
VCC5V_4 4
VBAT 6
Enable_0
39
VCC3V3_3
43 VCC3V3_4 44
Enable_3 46
ADVREF 48
VCC3V3_2 42
GND3
53
PC12
55 PC15 56
PC26 58
PC28 60
GND14 32
PE25
11
PE23
7
PE24
9
PC8
29
VDDIOM_1
15 PE26
13
PC25
17
PC23
19
PC21
21
GND2
23
PC18
25
PC16
27
PA24 94
PC31
63
VDDIOP0_1
65
PA0
67
PA2
69
GND4
71
PA6 74
PA7
75
PA9
77
PA11
79
PA12
81
PA14
83
PA16
85
GND5
89
PA21
91
PA23
93
PA25
95
PA27
97
PA31 102
VDDANA_2 104
PD30
105
PD28
109
PD26
111
PD24
113
PD22
115
PD20
117
PD16
121
PD14
123
GND7
125
PD10
129
PD8
131
PD6
133
PD3
137
PD1
139
VDDIOP1_1
141
GND8
143
PB14
147
PB21
151
PB23
153
PB24
155
PB26 166
PB28 168
PB30 164
DIBP 172
DIBN 174
USBA_DM
161 USBA_DP
159
GND10
163
USBB_DM
167 USBB_DP
165
GND11
169
USBC_DM
173 USBC_DP
171
GND12
195
ETH0_RX1+
181
ETH0_RX1-
183
PC7 30
PE29 8
PE30 10
PE31 12
GND13 14
VDDIOM_2 16
PC24 18
PC22 20
PC20 22
PC19 24
PC17 26
PC9 28
PC5 34
PC30 64
VDDIOP0_2 66
PA1 68
PA3 70
PA4 72
PA8 76
PA10 78
GND16 80
PA13 82
PA15 84
PA17 86
PA20 90
PA22 92
PA26 96
GND17 98
PA29 100
PA30
101
VDDANA_1
103
PD31 106
PD29 108
PD27 110
PD25 112
GND18 116
PD21 118
PD19 120
PD17 122
PD15 124
PD9 130
PD7 132
GND19 134
PD4 136
PD2 138
PD0 140
NC2 144
PB15 148
PB20 150
PB22 152
GND20 154
PB27 158
PB29 160
PB31 162
GND21 176
JTAGSEL 178
BMS 184
nRST 186
nTRST 188
TDI 190
TCK 192
TMS 194
TDO 196
RTCK 198
GND22 200
ETH0_TX1+
177
PC2
35 PC3 36
PC0
37
PC29
61 GND15 62
PA5
73
PA18
87 PA19 88
PA28
99
GND6
107
PD18
119
PD23 114
PD13 126
PD5
135
VDDIOP1_2 142
PB19
149
PB25 156
GND9 170
ETH0_RX2+
191
PD12
127 PD11 128
GND23
157
SHDN 182
WKUP 180
ETH0_TX1-
179
ETH0_RX2-
193
PB10
145
LED1
199
GND_ETH1
175
ETH0_TX2+
187
ETH0_TX2-
189
PB12 146
LED2
197
GND_ETH2
185
R6 22R DNPR6 22R DNP
JP9
SIP2
JP9
SIP2
12
R51 22RDNP R51 22RDNP
R120 22RDNP R120 22RDNP
R50 22R DNPR50 22R DNP
59
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.2 Power Supplies
The SAMA5D3 series MB is supplied with a simple external 5 VCC power supply. The MB features one adjustable low-
dropout regulator (LDO). It accepts DC in 5V power and outputs a regulated +3.3V to most other circuits on the board
through four 3.3V rails.
5.2.2.1 Supply Group Configuration
The LDO is enabled through a dual FET scheme. The processor can assert SHDN (which is a VDDBU powered I/O) to
shut down the LDO to enter backup mode. The regulators on the CM board are also shut down by the action of the
SHDN signal.
If the 3V battery is mounted on J5, both the CM and the MB can be woken up by action on the BP2 button, which drives
the WKUP signal that is also a VDDBU powered I/O.
Figure 5-5. MB Power Management
5V_INPUT
POWER_EN
PWR_EN#
PWR_EN
5V
5V
3V3 3V3
5V
3V3
SHDN
VDDISI 13
PWR_EN 3
5V/2A Input
FORCE
POWER
ON
VOUT =
0.8V x (Rtop + Rbottom)/Rbottom
Place C22 near MN3.pin2
R7
10k
R7
10k
Q6
IRLML2402
Q6
IRLML2402
1
3
2
R4
100k
R4
100k
C3
100n
C3
100n
C6
10u
C6
10u
JP5
SIP2
JP5
SIP2
12
C7
1u
C7
1u
MN2
BNX002-01
MN2
BNX002-01
B
1
PSG
3
CB 2
CG1 4
CG2 5
CG3 6
R25
10k
R25
10k
R8
10k
R8
10k C22
1u
C22
1u
MN3
RT9018A
MN3
RT9018A
PGOOD
1
EN
2
VIN
3
VDD
4NC 5
VOUT 6
ADJ 7
GND 8
EP
9
C9
10u
C9
10u
C1
100n
C1
100n
C5 10nC5 10n
D2
Red
D2
Red
12
MN1
ZEN056V230A16LS
MN1
ZEN056V230A16LS
1
2
3
R3
470R
R3
470R
+
C2
33u
+
C2
33u
C8
1u
C8
1u
R5
15k
R5
15k
L1
220ohm at 100MHz
L1
220ohm at 100MHz
1 2
C10
15p
C10
15p
R2 47kR2 47k
Q1
Si1563EDH
Q1
Si1563EDH
1 3
2
456
R1
100k
R1
100k
C120
1u
C120
1u
C57
100n
C57
100n
J4
DC POWER JACK
J4
DC POWER JACK
1
2
3
3V3
VBAT 3,12
J5J5
JP4
SIP2
JP4
SIP2
1 2
D1
BAT54CLT1G
D1
BAT54CLT1G
1
3
2
C4
100n
C4
100n
5V
3V3
VDDIOP0
VDDIOP1
VDDIOM
VDDANA
TP4TP4
TP2TP2
TP8TP8
TP1TP1
TP7TP7
TP3TP3
TP5TP5
TP6TP6
60
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.3 Debug JTAG/ICE and DBGU
The MB includes a built-in SEGGER J-Link-on-Board device. The functionality is implemented with an ATSAM3U4C
microcontroller in an LQFP100 package.
The ATSAM3U4C provides the functions of JTAG and a bridge USB/Serial DBGU port.
Two LEDs D13 and D14 that are mounted on the main board signal the status of the J-Link-on-Board device.
The J-Link-OB-ATSAM3U4C was designed in order to provide an efficient, on-board alternative to the general J-Link.
J-Link-OB-ATSAM3U4C supports the following target interfaces:
JTAG
DBGU
An optional 20-pin header is provided on the board to allow for the JTAG connection. In order to use this functionality,
RR6 and RR7 must be removed and JP15 jumper must be in place.
Figure 5-6. MB JTAG-OB
VDDOUT
DRXD
DTXD
VDDBU ADVREF
VDDPLL VDDCORE
VDDANA VDDIN VDDUTMI VDDIO VDDIO
JTAG Enabled, close to disable
ICE INTERFACE
RXDaux
TXDaux
CDC Enabled, close to disable
500mA capability
TDO_3U
TDIOUT
TCK_3U
TMSOUT
TMS_3U
TRSTIN
TCKOUT
TRSTOUT
TRESOUT
TRESIN
LED1_3U
TRESOUT
TDIIN
TX_3U
TMSIN
VDDOUT_3U
TCKOUT
TMSOUT
TDOIN
TDIOUT
TCKIN
ENSPI
VDDOUT_3U
TCKOUT
LED2_3U
RTCKIN
TRSTOUT
ERASE_3U
VDDOUT_3U
NRST_3U
ENSPI
TDI_3U
VDDOUT_3U
RX_3U
NTRST
DHSDM
XIN_3U
XOUT_3U
TRSTIN
TDIIN
TMSIN
TCKIN
TDI
RTCK
TDO
TMS
TCK
NTRST
NRST
TDI
TMS
TCK
TDOIN
RTCK
NRST
TDO
RTCKIN
TMS_3U
TCK_3U
NRST_3U
TDI_3U
TDO_3U
DHSDP
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VDDIOP0
VDDIOP0
VDDIOP0
EARTH_USB2
EARTH_USB2
VCC_3V3_DEBUG
VCC_3V3_DEBUG
5V VCC_3V3_DEBUG
VCC_3V3_DEBUG
VBUS_DEBUG
VBUS_DEBUG
3V3
VCC_3V3_DEBUG
PB30 3,6
PB31 3,6
NRST 10,12,3
NTRST 3
RTCK 3
TDI 3
TMS 3
TCK 3
TDO 3
C156
100n
C156
100n
R1284.7k R1284.7k
R182 150RR182 150R
R630R/0805
DNP
R630R/0805
DNP
C166
100n
C166
100n
R106
100k
DNP
R106
100k
DNP
C96
100n
C96
100n
C153
100n
C153
100n
R64 0RR64 0R
C154
100n
C154
100n
R45 0RR45 0R
JP16JP16
12
R131 0RR131 0R
C163
100n
C163
100n
R179 150RR179 150R
C155
100n
C155
100n
C117 10pC117 10p
R107
100k
DNP
R107
100k
DNP
JP15JP15
12
R183 150RR183 150R
J9
BR20-H
DNPJ9
BR20-H
DNP
12
34
56
78
910
1112
13
15
17
19
14
16
18
20
C152
100n
C152
100n
R109
100k
DNP
R109
100k
DNP
R66 6.8 k/1%R 66 6.8k/1%
C121 15pC121 15p
D12
TVS
DNP
D12
TVS
DNP
R65 0RR65 0R
D11
TVS
DNP
D11
TVS
DNP
R110 0R
DNP
R110 0R
DNP
MN18
SPX3819
MN18
SPX3819
VIN
1
GND
2
EN
3BYP 4
VOUT 5
R54 0R DNPR54 0R DNP
T1T1
C160
100n
C160
100n
R181 150RR181 150R
R111
0R
DNP
R111
0R
DNP
T3T3
C98
100n
C98
100n
R44 0RR44 0R
C147
4.7u
C147
4.7u
R1304.7k R1304.7k
C116 10nC116 10n
R112 0R
DNP
R112 0R
DNP
J23
TC2050-IDC
J23
TC2050-IDC
VCC
1
TMS
2
GND1
3
TCK
4
GND2
5TDO 6
NC1 7
TDI 8
NC2 9
RESET 10
C159
100n
C159
100n
R43 100kR43 100k
T4T4
R62 0RR62 0R
R113 0R
DNP
R113 0R
DNP
C47
2.2u
C47
2.2u
R185 0RR185 0R
C165
100n
C165
100n
R67 39RR67 39R
R145
47k
R145
47k
C158
100n
C158
100n
R180 150RR180 150R
R61 0RR61 0R
R186 0R
DNP
R186 0R
DNP
MN17
SAM3U_LQFP100
MN17
SAM3U_LQFP100
VDDANA
1
ADVREF
2
GNDANA
3
AD12BVREF
4
PA22/PGMD12 5
PA30 6
PB3 7
PB4 8
VDDCORE_3
9
PA13/PGMD5 10
GND2
61
PA15/PGMD7 12
PA16/PGMD8 13
PA17/PGMD9 14
PB16 15
PB15 16
PA18/PGMD10 17
PA19/PGMD11 18
PA20/PGMD12 19
PA21/PGMD13 20
PA23/PGMD15 21
XIN32
50
PA24 23
PA25 24
PA26 25
PA0/PGMNCMD 26
PA1/PGMRDY 27
PA2/PGMNOE 28
PA3/PGMNVALID 29
PA4/PGMM0 30
PA5/PGMM1 31
PA6/PGMM2 32
NRST
57
VDDCORE_4
34
GND1
35
VDDIO_3
36
VDDCORE_5
59
DFSDM
80
GND3
89
VDDUTMI
79
VDDIN
53
FWUP
42
ERASE
43
TEST
44
XIN
75
XOUT32
49
VDDIO_4
22
TDI
51
VDDOUT
52
PA12/PGMD4 41
TDO/TRACESWO
54
TMS/SWDIO
55 TCK/SWCLK
56
PA7/PGMM3 33
PB24 58
PA8/PGMD0 37
VDDIO_2
60
PA14/PGMD6 11
PB23 62
PB22 63
PB14 69
PB10 70
PB9 71
GNDPLL
72
PB8 100
PB7 99
PB6 98
PB13 95
PB12 94
PB11 93
PB2 92
PB1 91
PB0 90
PA10/PGMD2 39
VDDIO_1
88
VDDCORE_1
87
PA31 86
PA29 85
PA28 84
VDDCORE_2
83
GNDUTMI
82
DFSDP
81
DHSDM
77
DHSDP
76
NRSTB
47
XOUT
74
VDDPLL
73
PA11/PGMD3 40
PA9/PGMD1 38
PB20 65
PB19 66
PB18 67
PB17 68
PB5 97
PA27 96
PB21 64
VDDBU
45
GNDBU
46
VBG
78
JTAGSEL
48
R68 39RR68 39R
C161
100n
C161
100n
C146
4.7u
C146
4.7u
L24
220ohm at 100MHz
L24
220ohm at 100MHz
12
D14 GreenD14 Green
12
RR7
0R
RR7
0R
1
2
3
4 5
6
7
8
C94
10u
C94
10u
C167
100n
C167
100n
Y4
12MHz
Y4
12MHz
1 3
24
R70 1kR70 1k
C131
100n
C131
100n
C157
100n
C157
100n
C92100n C92100n
R1294.7k R1294.7k
D13 RedD13 Red
12
C164
100n
C164
100n
C119 15pC119 15p
C95
10u
C95
10u
RR6
0R
RR6
0R
1
2
3
4 5
6
7
8
C162
100n
C162
100n
R69 1kR69 1k
SHD
J14
105017-0001
SHD
J14
105017-0001
1
2
3
4
5
7
8
6
9
10
11
R79
100k
DNP
R79
100k
DNP
61
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.3.1 Disabling J-Link-OB-ATSAM3U4C
Jumper JP15 disables the J-Link-OB-ATSAM3U4C JTAG functionality. When the jumper is installed, it grounds Pin 25 of
the ATSAM3U4C that is normally pulled high. This signals to the microcontroller it must not provide JTAG support.
Jumper JP15 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional
Jumper JP15 installed: JTAG functionality is disabled
Jumper J15 disables only J-Link functionality. The debug serial port (DBGU) that is emulated through a communication
device class (CDC) of the same USB connector remains operational.
The built-in JTAG controller does not have to be explicitly disabled to use an external JTAG controller through the 20-pin
JTAG port. The internal J-Link-OB connects to a target only after it receives a first command; otherwise, it remains
disabled.
5.2.3.2 Hardware UART via CDC
In addition to J-Link-OB functionality, the ATSAM3U4C microcontroller LAO provides a bridge to a debug serial port
(DBGU) of the processor on a CM board. The port is made accessible over the same USB connection used by JTAG by
implementing communication device class (CDC), which allows terminal communication with the target device.
This feature is enabled only if the microcontroller Pin 24 is not grounded. The pin is normally pulled high and controlled
by jumper JP16.
Jumper JP16 not installed: the device is enabled
Jumper JP16 installed: the CDC device is disabled
5.2.4 USART
The USART1 is used as a user serial communication port. This USART provides an RS-232 interface with transceiver
TXD, RXD lines and hardware flow control CTS/RTS lines. The device uses a DB-9 male connector. The software must
drive the appropriate PIO pins to enable the USART function.
Figure 5-7. USART1 Com Port
RTSC1
TXDC1
CTSC1
RXDC1
EARTH_RS232
VDDIOP1
VDDIOP1
PB27
PB29
PB28
PB26
PB31
PB30
USART1
RTS1
TXD1
CTS1
RXD1
DRXD
DTXD
R23
47k
R23
47k
C19 100nC19 100n
J8J8
5
4
3
2
1
9
8
7
6
10
11
R132 0R
DNP
R132 0R
DNP
C15 100nC15 100n C17 100nC17 100n
R28 0RR28 0R
C14
100n
C14
100n
C13
4.7u
C13
4.7u
C18 100nC18 100n
R31 0RR31 0R
R133 0R
DNP
R133 0R
DNP
R30 0RR30 0R
L5
220ohm at 100MHz
L5
220ohm at 100MHz
1 2
MN4
ADM3312EARU
MN4
ADM3312EARU
V+
1C2+ 2
VCC
3
C2- 4
EN
5
C1+ 6
T1IN
7
T2IN
8
T3IN
9
R1OUT
10
R2OUT
11
R3OUT
12 R3IN 13
R2IN 14
R1IN 15
T3OUT 16
T2OUT 17
T1OUT 18
SD
19
C1- 20
V-
21
C3- 22
GND
23
C3+ 24
R27 0RR27 0R
R22
47k
R22
47k
C16 100nC16 100n
R29 0RR29 0R
R24
47k
R24
47k
62
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.5 USB Ports
The SAMA5D3 series MB features three USB communication ports:
Port A High-speed (EHCI) and full-speed (OHCI) host multiplexed with USB Device
High-speed micro AB connector, J20
Port B High-speed (EHCI) and full-speed (OHCI) host
Standard type A connector, J19 upper port
Port C Full-speed (OHCI) only host
Standard type A connector, J19 lower port
All three USB host ports are equipped with 500 mA high-side power switch for self-powered and bus-powered
applications. The USB device port feature VBUS insert detection function through the resistor ladder R138 and R139.
Refer to the embedded MPU product datasheet for detailed programming information, available on www.atmel.com.
Figure 5-8. USB Port A
Figure 5-9. USB Ports B and C
OVCUR_USB
(VBUS_SENSE)
USB A HOST/DEVICE INTERFACE
(IDUSBA)
EN5V_HDA
OPEN:Enable LCD for D31,D33,D34
CLOSE:Disable LCD for D35
PD28
5V
3V3
EARTH_USB
EARTH_USB
3V3
3V3
3V3
PD29 3
USBA_DM 3
USBA_DP 3
5V_LCD13
EN_PWRLCD 13
PD25 3
LCD_DETECT# 13
SHD
J20
47589-0001
SHD
J20
47589-0001
1
2
3
4
5
7
8
6
9
10
11
L15
220ohm at 100MHz
L15
220ohm at 100MHz
1 2
C107
100n
C107
100n
C109
100n
C109
100n
L14
220ohm at 100MHz
L14
220ohm at 100MHz
12
R140 47kR140 47k
MN15
AIC1526-1GS
MN15
AIC1526-1GS
ENA 1
FLGA 2
ENB 4
OUTA
8
GNG
6FLGB 3
IN
7
OUTB
5
R139
82k
R139
82k
R138 47kR138 47k
+
C106
33u
+
C106
33u C108
100n
C108
100n
C111
15p
C111
15p
JP17
SIP2
JP17
SIP2
12
R163
47k
R163
47k
1A1Y
2A
GND
VCC
2Y
MN21
SN74LVC2GU04
1A1Y
2A
GND
VCC
2Y
MN21
SN74LVC2GU04
1
2
34
5
6
C75
10u
C75
10u
R137
47k
R137
47k
C99
100n
C99
100n
OVCUR_USB
USB HOST B&C INTERFACE
EN5V_HDB
EN5V_HDC
PD28
EARTH_USB
5V
EARTH_USB
3V3
USBC_DM 3
USBC_DP 3
PD28 3
USBB_DP 3
USBB_DM 3
PD26 3
PD27 3
fi
fl
J19
Dual USB A
fi
fl
J19
Dual USB A
A1
A4
A2
A3
1 2
B1
B2
B3
B4
3 4
C101
100n
C101
100n
C105
100n
C105
100n
1A1Y
2A
GND
VCC
2Y
MN19
SN74LVC2GU04
1A1Y
2A
GND
VCC
2Y
MN19
SN74LVC2GU04
1
2
34
5
6
L21
220ohm at 100MHz
L21
220ohm at 100MHz
1 2
+
C103
33u
+
C103
33u
+
C104
33u
+
C104
33u
C97
100n
C97
100n
L12
220ohm at 100MHz
L12
220ohm at 100MHz
12
L13
220ohm at 100MHz
L13
220ohm at 100MHz
12
MN14
AIC1526-1GS
MN14
AIC1526-1GS
ENA 1
FLGA 2
ENB 4
OUTA
8
GNG
6FLGB 3
IN
7
OUTB
5
C102
100n
C102
100n
63
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.6 Ethernet 10/100 (EMAC) Port
The main board contains a MICREL PHY device (KSZ8051) handling Ethernet connectivity at 10/100 Mbps. The device
supports MII and RMII interface modes.
There are two independent PHY devices placed on CM and MB boards that connect to two separate RJ-45 connectors
and that contain built-in magnetics and status LEDs. The LEDs are driven by PHY devices to indicate activity, link and
speed status for the respective Ethernet ports.
Figure 5- 10 . ET H0 Port
ETH0
10Base-T/100Base-TX/1000BASE-T
VDDIOP1
EARTH_ETH0
EARTH_ETH0
ETH0_GND
ETH0_GND
ETH0_GND
ETH0_GND
ETH0_GND
ETH0_RX2-3
ETH0_RX2+3
ETH0_RX1-3
ETH0_RX1+3
ETH0_LED23
ETH0_LED13
ETH0_TX2+3
ETH0_TX2-3
ETH0_TX1+3
ETH0_TX1-3
ETH0_GND3
2
1
6
3
5
4
8
7
1NF,2KV
1:1
75 OHM
T4/A T4/B
1:1
T3/A T3/B
75 OHM
1:1
T2/A T2/B
75 OHM
1:1
T1/A T1/B
75 OHM
TRD4+
TRCT4
TRD4-
TRD3+
TRCT3
TRD3-
TRD2+
TRCT2
TRD2-
TRD1+
TRCT1
TRD1-
TRP4+
TRP4-
TRP3-
TRP2+
TRP2-
TRP1+
TRP1-
TRP3+
(SHIELD)
YELLOW LED
GREEN LED
GREEN LED
J17
J0G-0003NL
2
1
6
3
5
4
8
7
1NF,2KV
1:1
75 OHM
T4/A T4/B
1:1
T3/A T3/B
75 OHM
1:1
T2/A T2/B
75 OHM
1:1
T1/A T1/B
75 OHM
TRD4+
TRCT4
TRD4-
TRD3+
TRCT3
TRD3-
TRD2+
TRCT2
TRD2-
TRD1+
TRCT1
TRD1-
TRP4+
TRP4-
TRP3-
TRP2+
TRP2-
TRP1+
TRP1-
TRP3+
(SHIELD)
YELLOW LED
GREEN LED
GREEN LED
J17
J0G-0003NL
5
6
4
2
1
3
7
9
8
12
14
11
13
10
15
16
17
18
19
R175 0RR175 0R
C126 100nC126 100n
R165 470RR165 470R
C128 100nC128 100n
R168 470RR168 470R
L23
220ohm at 100MHz
L23
220ohm at 100MHz
12
C125 100nC125 100n
C127 100nC127 100n
64
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
Figure 5-11. ETH1 Port
ETH1_XI
ETH1_XO
EARTH_ETH1 GND_ETH1
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0 GND_ETH1
E1_AVDDT
VDDIOP0
GND_ETH1
GND_ETH1
VDDIOP0
E1_AVDDT
VDDIOP0
EARTH_ETH1
EARTH_ETH1
PC0
PC4
PC8
PC9
PE30
PC6
PC5
PC2
PC3
PC7
PC1
NRST3,12,14
ETH1
E1_TXCK
E1_RX1
E1_RX0
E1_CRSDV
E1_TX1
E1_TX0
E1_TXEN
E1_MDC
E1_MDIO
INT_ETH1
E1_RXER
At the De-Assertion of Reset:
PHY ADD[2 :0]:001
CONFIG[2:0]:001,Mode:RMII
Duplex Mode:Half Duplex
Isolate Mode:Disable
Speed Mode:100Mbps
Nway Auto-Negotiation:Enable
10Base-T/100Base-TX
KSZ 8041NL:R162,R170,R171,R172,R176,R177,C122, C123 a re needed.
KSZ 8051NL:R162,R170,R171,R172,R176,R177,C122, C123 a re not needed.
L20
220ohm at 100MHz
L20
220ohm at 100MHz
12
R136 0RR136 0R
RR20
10k
RR20
10k
1
2
3
4 5
6
7
8
L2
220ohm at 100MHz
L2
220ohm at 100MHz
1 2
R60 1kR60 1k
C91
22p
C91
22p
C100
10u
10V
C100
10u
10V
C88
22p
C88
22p
R177 0R DNPR177 0R DNP
RR21
10k
RR21
10k
1
2
3
4 5
6
7
8
R59 1kR59 1k
Y2
25MHz
Y2
25MHz
1 3
24
C31
10u
C31
10u
C124 100nC124 100n
C32
100n
C32
100n
RR17
22R
RR17
22R
1
2
3
45
6
7
8
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J24
J00-0061NL
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J24
J00-0061NL
1
2
7
8
3
6
5
4
15
16
D8 GreenD8 Green
1
2
D9 YellowD9 Yellow
12
C118
100n
C118
100n
RR18
22R
RR18
22R
1
2
3
45
6
7
8
C34
10u
C34
10u
R134 470RR134 470R
C123
100n
DNP
C123
100n
DNP
C129
100n
C129
100n
C122
100n
DNP
C122
100n
DNP
C38
100n
C38
100n
RR22
10k
RR22
10k
1
2
3
4 5
6
7
8
R135 470RR135 470R
R171
49.9R
DNP
R171
49.9R
DNP
R176 0R DNPR176 0R DNP
R162
49.9R
DNP
R162
49.9R
DNP
R173 6.49k/1%R173 6.49k/1%
C39 2.2uC39 2.2u
RR19
22R
RR19
22R
1
2
3
45
6
7
8
R172
49.9R
DNP
R172
49.9R
DNP
R170
49.9R
DNP
R170
49.9R
DNP
MN20
KSZ8051RNL
MN20
KSZ8051RNL
REF_CLK/B-CAST_OFF
19
CONFIG1
29
CONFIG0
28
TXD1
25
TXD0
24
TXEN
23
PHYAD0
13
PHYAD1
14
RXD1/PHYAD2
15
RXD0/DUPLEX
16
CRS_DV/CONFIG2
18
RXER/ISO
20
MDC
12
MDIO
11
INTRP/NAND
21
VDDA_3V3
3
VDDIO
17
RESET
32
TXP 7
TXM 6
RXP 5
RXM 4
VDD_1V2 2
GND 1
PADDLE 33
NC1 22
NC2 26
NC3 27
REXT 10
XO 8
XI 9
LED0/NWAYEN 30
LED1/SPEED 31
65
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.7 Audio
The MB includes a WM8904 CODEC that provides route to handle audio in the digital domain. The interface includes
audio jacks for line input (J13) and headphone line output (J15). It also connects to an electret microphone, which is
conveniently installed on the main board.
This interface can be used to play and record audio. The WM8904 chip has left and right channel line inputs, a
microphone input and an on-board microphone, as well as a left and right headphone output. The line in and headphones
can be connected through two 2.5 mm J13 and J15 audio jacks. A stereo microphone input (or a second left/right line
input) and left/right line outputs are connected to a 5-pin header (J26). The header is not installed normally.
The SAMA5D3 series processor is configured in IIS slave mode to interface with the WM8904 CODEC.
Figure 5- 12 . Aud io Interface
HEADPHONE
LINE IN
TWD0
TWCK0
PCK0
TK
RK
TF
RF
RD
TD
150mA capability
INT_AUDIO
MIC1
MIC
AUDIO_GND AUDIO_GND
AVDD1V8
AUDIO_GND AUDIO_GNDAUDIO_GND
AUDIO_GND
AUD_1V8 AVDD1V8
AUD_1V8
3V3
AUDIO_GND
3V3
AUDIO_GND
AUDIO_GND
AUDIO_GND
AUDIO_GND
AUDIO_GND
AUDIO_GND
AUD_1V83V3
AUDIO_GND
VDDIOP0
AUDIO_GND
AUDIO_GND
AUDIO_GND
PD30 3,9
PC17 3,9
PC20 3
PC16 3,9
PC18 3,9
PA30 13,3,9
PA31 13,3,9
PC21 3
PC19 3
PD16 3
L4
220ohm at 100MHz
L4
220ohm at 100MHz
1 2
C140
4.7u
C140
4.7u
R84
20R
R84
20R
J15
STEREO_3.5mm
J15
STEREO_3.5mm
1
34
25
C143 4.7uC143 4.7u
C42
470p
C42
470p
R233 0RR233 0R
R232 0RR232 0R
C43
470p
C43
470p
R85
20R
R85
20R
C35
100n
C35
100n
R87
2K2
R87
2K2
R228 0RR228 0R
C36
2.2u
C36
2.2u
R231 0RR231 0R
L26
220ohm at 100MHz
L26
220ohm at 100MHz
12
R229 0RR229 0R
R122
1.5k
R122
1.5k
C138
10u
C138
10u
C145
100n
C145
100n
R230 0R DNPR230 0R DNP
C135
100n
C135
100n
R178 0RR178 0R
R234 0RR234 0R
C139
100n
C139
100n
R86
2K2
R86
2K2
L27
220ohm at 100MHz
L27
220ohm at 100MHz
1 2
J26
MD1x5 DNP
J26
MD1x5 DNP
1
2
3
4
5
R227 33RR227 33R
L7
220ohm at 100MHz
L7
220ohm at 100MHz
1 2
MN7
SPX5205M5-L-1-8
MN7
SPX5205M5-L-1-8
VIN
1
GND
2
EN
3BYP 4
VOUT 5
R226 0RR226 0R
J13
STEREO_3.5mm
J13
STEREO_3.5mm
1
3
4
2
5
L6
220ohm at 100MHz
L6
220ohm at 100MHz
1 2
MN10
WM8904
MN10
WM8904
IRQ/GPIO1 1
SCLK 2
SDA 3
DBVDD 4
DGND
5
DCVDD 6
CPVDD 7
CPCA 8
CPGND
9
CPCB 10
CPVOUTP 11
CPVOUTN 12
HPOUTL
13
HPOUTFB
14
HPOUTR
15
LINEOUTL
16
LINEOUTFB
17
LINEOUTR
18
MICVDD 19
MICBIAS
20
VMIDC
21
AGND
22
AVDD 23
IN2R
24
IN1R/DMICDAT2
25
IN2L
26
IN1L/DMICDAT1
27
MCLK 28
BCLK/GPIO4 29
LRCLK 30
ADCDAT 31
DACDAT 32
PAD
33
C46 2.2uC46 2.2u
C30
4.7u
C30
4.7u
R119 20R
DNP
R119 20R
DNP
C37
100n
C37
100n
R80
47k
DNP
R80
47k
DNP
GND
OUT
MIC1
MP6027P
GND
OUT
MIC1
MP6027P
1
2
C62
470p
C62
470p
C45 2.2uC45 2.2u
R126 2K2R126 2K2
R81
47k
DNP
R81
47k
DNP
R123
1.5k
R123
1.5k
R118 20R
DNP
R118 20R
DNP
C90 100n
DNP
C90 100n
DNP
C28 1uC28 1u
C61
470p
C61
470p
C137
10u
C137
10u
C76 1uC76 1u
C141
100n
C141
100n
C44
2.2u
C44
2.2u
C142
100n
C142
100n
C41
2.2u
C41
2.2u
C144
100n
C144
100n
L3
220ohm at 100MHz
L3
220ohm at 100MHz
1 2
C136 4.7uC136 4.7u
C33
4.7u
C33
4.7u
C29 1uC29 1u
C89 100n
DNP
C89 100n
DNP
66
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.8 HDMI Transmitter Interface
The Main Board (MB) is equipped with an HDMI transmitter interface.
The SiI9022/9024 HDMI Tx provides a complete solution for transmitting HDMI compliant digital audio/video. Specialized
audio/video processing is available within the transmitter to easily and cost-effectively add HDMI capability to consumer
electronics devices.
The user must use an HDMI cable to connect to a monitor. This cable is not provided with the SAMA5D3 series-EK. A
standard HDMI cable can be used.
Important: Do not plug in the HDMI connector to a display with the evaluation kit powered on. Be certain that the EK
board is not powered, plug in the cable to the display and then power on the SAMA5D3 series EK board.
Figure 5- 13 . HD MI Interface
To keep TMDS pair impedance maintain at 100 ohm ,
pls share common choke pad with shunted resistor
IO_SEL:
LOW=3.3V
,HIGH=1.8V
Close to SiI902x
LOW:72h(Defult)
HDMI Spec.
+4.8V < PVDD5 < +5.3V
Close to Chip
LCDDAT7
LCDDAT9
LCDDAT11
LCDDAT3
LCDDAT1
LCDDAT5
LCDDEN
LCDDAT22
LCDDAT16
LCDDAT18
LCDDAT20
LCDVSYNC
LCDDAT17
LCDDAT19
LCDDAT21
LCDPCK
LCDDAT23
LCDHSYNC
LCDDAT0
LCDDAT2
LCDDAT4
LCDDAT6
LCDDAT8
LCDDAT10
LCDDAT12
LCDDAT13
LCDDAT14
LCDDAT15
PCK0
BCLK
LRCLK
DAT
TWD0
TWCK0
HDMI_INT
Type A connector
RESET_HDMI
TX0-
TXC+
TXC-
TX1+
TX1-
TX0+
TX2+
TX2-
TXC+TXC+
TX0+TX0+
TX1+TX1+
TX2-TX2-TX2-TX2-
TX2+TX2+
TX1-TX1-TX1-TX1-
AVCC12
CLK_HDMI
TXC-TXC-
TX0-TX0-
HSYNC_HDMI
TSPDIFTSPDIFTSPDIFTSPDIFTSPDIFTSPDIF
HPD_SiI
TX_1-
TX_C+
TX_C-
TX_0-
TX_2+
TX_2-
TX_1+
TX_0+
RST#
EXT_SW TX_0+
TX_2+ TX2+TX2+
TX2-TX2-TX2-TX2-
TX0+TX0+
TX0-TX0-
TXC+TXC+
TX_1- TX1-TX1-TX1-TX1-
TX_C+
TX_1+ TX1+TX1+
TX_0-
TX_2-
TXC-TXC-TX_C-
TX0+TX0+
TXC+
TX0-
TXC+
TX0-
TXC- TXC-
TX2+TX2+
TX1+
TX2-
TX1-
TX2-
TX1-
TX1+
DE_HDMI
VSYNC_HDMI
BLUE0
RED7
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
RED0
RED1
RED2
RED3
RED4
RED5
RED6
IOVCC3V3
CVCC12
DDCSCL
DDCSDA
PVDD5
HPD
RST#
3V3
3V3
3V3
1V2
1V2
3V3 1V2
5V
3V3
3V3
PA1
13,3
PA3
13,3
PA5
13,3
PA7
13,3
PA9
13,3
PA11
13,3
PA29
13,3
PC14
13,3
PC12
13,3
PC10
13,3
PE27
12,13,3
PA26
13,3
PA0
13,3
PA2
13,3
PA4
13,3
PA6
13,3
PA8
13,3
PA10
13,3
PA12
13,3
PA13
13,3
PA14
13,3
PA15
13,3
PC13
13,3
PC11
13,3
PC15
13,3
PE28
13,3,6
PA27
13,3
PA28
13,3
PC31
3
PC16
3,7
PC17
3,7
PC18
3,7
PD30
3,7
PA30
13,3,7
PA31
13,3,7
PC29
13,3
R42 1k DNPR42 1k DNP
L22
EBMS321611A520
L22
EBMS321611A520
1 2
F1
1812L160/12
F1
1812L160/12
1 2
C58
100n
C58
100n
RR29
22R
RR29
22R
1
2
3
45
6
7
8
R266 33R
DNP
R266 33R
DNP
R284 0RR284 0R
R272 0RR272 0R
MN12 RClamp0514MMN12 RClamp0514M
NC1 2
VCC 3
LINE3 4
NC2 5
LINE1 1
LINE4
6
NC4
7
GND
8
LINE2
9
NC3
10
R282 0RR282 0R
C59
100n
C59
100n
C48
100n
C48
100n
R104
2K2
R104
2K2
R184 10kR184 10k
L18
EBMS321611A520
L18
EBMS321611A520
1 2
C53
100n
C53
100n
C87
100n
C87
100n
L39 NCMS20C900DNP L39 NCMS20C900DNP
1
4 3
2
C55
100n
C55
100n
C51
1n
C51
1n
C84
100n
C84
100n
C60
100n
C60
100n
R164
47k
R164
47k
RR25
22R
RR25
22R
1
2
3
4 5
6
7
8
R285 0RR285 0R
C79
100n
C79
100n
R273 0RR273 0R
R90
4.7k
R90
4.7k
C56
100n
C56
100n
MN8
RT9013-12PB
MN8
RT9013-12PB
VIN
1
GND
2
EN
3BYP 4
VOUT 5
C81
10u
C81
10u
C49
1n
C49
1n
R105
2K2
R105
2K2
T2T2
R78 0RR78 0R
RR26
22R
RR26
22R
1
2
3
4 5
6
7
8
C80
100n
C80
100n
J25
HDM19SW -4-1R-H
J25
HDM19SW -4-1R-H
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
G1 G2
G4G3
R270 33RR270 33R
R77 0RR77 0R
C85
10u
C85
10u
R88
4.7k
R88
4.7k
R260 22RR260 22R
R76 0RR76 0R
MN9
SiI9022ACUN
MN9
SiI9022ACUN
D0
32
D1
31
D2
30
D3
29
D4
28
D5
27
D23
4
D6
25
D7
24
D8
23
D9
20
D10
19
D11
18
D12
17
D13
16
D14
15
D15
14
D16
13
D17
11
D18
10
D19
9
D20
8
D21
7
D22
6
CLK
22
VSYNC
35
HSYNC
34
DE
33
INT 52
HPD 54
SCL 1
SDA 2
EXT_SWING 56
IOVCC18_2 21
IOVCC18_1 3
TXC+ 59
TXC- 58
TX0+ 62
TX0- 61
TX1+ 65
TX1- 64
TX2+ 68
TX2- 67
SCLK
45
SPDIF
36
CVCC12_1 5
CVCC12_2 12
CVCC12_4 42
TMODE
55
MCLK
38
LRCLK
44
DDCSCL 49
DDCSDA 48
I2S0
41
I2S1
40
I2S2
39
I2S3
37
AGND_1 57
AVCC_2 66
AVCC_1 60
IOVCC18_3 46
CEC_D 50
CEC_A 71
CI2CA 72
VDDQ
70
AGND_2 63
IO_SEL 69
CVCC12_5 47
CVCC12_6 53
CGND 43
RESETN
51
CVCC12_3 26
ePAD
73
R75 0RR75 0R
C77
100n
C77
100n
C54
100n
C54
100n
D18
TVS
D18
TVS
R74 0RR74 0R
C83
10u
C83
10u
C52
1n
C52
1n
D17
TVS
D17
TVS
R73 0RR73 0R
R264 22RR264 22R
R72 0RR72 0R
RR27
22R
RR27
22R
1
2
3
4 5
6
7
8
D15
TVS
D15
TVS
R71 0RR71 0R
R91 2K2R91 2K2
L38
NCMS20C900
DNPL38
NCMS20C900
DNP
1
4 3
2
R265 4.3K/1%R265 4.3K/1%
MN13 RClamp0514MMN13 RClamp0514M
NC1 2
VCC 3
LINE3 4
NC2 5
LINE1 1
LINE4
6
NC4
7
GND
8
LINE2
9
NC3
10
L40
NCMS20C900
DNPL40
NCMS20C900
DNP
1
4 3
2
D7
RB160M-60
D7
RB160M-60
C86
10u
C86
10u
RR28
22R
RR28
22R
1
2
3
4 5
6
7
8
R89 4.7k
DNP
R89 4.7k
DNP
RR30
22R
RR30
22R
1
2
3
4 5
6
7
8
R41 1kR41 1k
C82
10u
C82
10u
RR24
22R
RR24
22R
1
2
3
4 5
6
7
8
C78
100n
C78
100n
L41 NCMS20C900DNP L41 NCMS20C900DNP
1
4 3
2
L19
EBMS321611A520
L19
EBMS321611A520
1 2
C50
1n
C50
1n
R108 0RR108 0R
67
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.9 1-Wire EEPROM
The MB also features a 1-wire device as a “software identification label” to store information such as chip type,
manufacture name, production date, etc.
Figure 5-14 . 1-Wire on MB
5.2.10 CAN Bus
The MB offers two CPU-controlled Controller Area Network (CAN) interfaces with transceivers available through
connectors J18 and J27.
Figure 5-15. CAN on MB
3V3
PE25
ONE WIRE EEPROM
ONE_WIRE
R144
1.5k
DNP
R144
1.5k
DNP
MN16
DS28EC20P
MN16
DS28EC20P
I/O
2
GND
3
NC1 1
NC2 4
NC3 5
NC4 6
5V
3V3
5V
3V3
VDDIOP0
VDDIOP0
VDDIOP1
VDDIOP1
PB143,13
PB153,13
PD14
PD15
CAN INTERFACE
CAN0
CAN1
CANTX0
CANRX0
CANTX1
CANRX1
R37 0RR37 0R
MN6
SN65HVD234DR
MN6
SN65HVD234DR
RS
8
D
1
EN
5
R
4
CANH 7
CANL 6
VCC 3
GND 2
R40 10kR40 10k
MN5
SN65HVD234DR
MN5
SN65HVD234DR
RS
8
D
1
EN
5
R
4
CANH 7
CANL 6
VCC 3
GND 2
JP7
SIP2
JP7
SIP2
12
R34
120R
R34
120R
J18
MJM0606GE06-H
J18
MJM0606GE06-H
1
2
3
4
5
6
R33 0RR33 0R
C21
10u
C21
10u
R32 10kR32 10k
JP8
SIP2
JP8
SIP2
1 2
R21 10kR21 10k
C23
100n
C23
100n
J27
MJM0606GE06-H
J27
MJM0606GE06-H
1
2
3
4
5
6
R35 10kR35 10k
R19
120R
R19
120R
C24
10u
C24
10u
C20
100n
C20
100n
R20 0RR20 0R
68
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.11 Smart DAA
The SAMA5D3 series MB features a Smart DAA chip to drive an analog telephone line on RJ11 6P4C port (J16).
Figure 5-16. Smart DA A
DVDD
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DIBN
DIBP
RJ11
0R can be replaced by
bead to improve EMI
0805
0805
1% 1% 1% 1%
1206 1206 1206 1206
100V
1% 1%
1%
1206
R94,C68 should be placed near Pin6(RXI),
and should be no vias on the RXI Net.
R99 100RR99 100R
MMBD3004S-7-FD5 MMBD3004S-7-FD5
1
3
2
MMBAT42
Q5
MMBAT42
Q5
1
2 3
MMBD3004S-7-FD3 MMBD3004S-7-FD3
1
3
2
L9
220ohm at 100MHz
L9
220ohm at 100MHz
12
MMBAT42
Q3
MMBAT42
Q3
1
2 3
MMBAT42
Q2
MMBAT42
Q2
1
2 3
R100
3.01R
R100
3.01R
C69
10n
C69
10n
C73
100n
C73
100n
R101
3.01R
R101
3.01R
C66
100n
C66
100n
R96
280R
R96
280R
R167 0RR167 0R
C68 47nC68 47n
C67 100nC67 100n
C70
47pF
C70
47pF
MMBAT42
Q4
MMBAT42
Q4
1
2 3
C64
470p
C64
470p
12
R102
110R
R102
110R
C63
470p
C63
470p
12
L8
220ohm at 100MHz
L8
220ohm at 100MHz
1 2
R92 6.81MR92 6.81M
R97
280R
R97
280R
C65
100n
C65
100n
LAN0066-50
TX1
LAN0066-50
TX1
1
2 3
4
J16
MJM0606GE06-H
J16
MJM0606GE06-H
1
2
3
4
5
6
MN11
CX20548-11Z
MN11
CX20548-11Z
RAC 4
TAC 5
EIC 11
RXI 6
EIO 10
EIF 9
TXO 8
TXF 7
GPIO 13
VC
3
EP
17
DVDD
1
DIBP
14
DIBN
16
PWR
15
AVDD
2
TEST
12
C71
150pF
C71
150pF
R98
280R
R98
280R
R95
280R
R95
280R
R166 0RR166 0R
R94
237K
R94
237K
C74
100n
C74
100n
C72
150pF
C72
150pF
R103
9R1
R103
9R1
R93 6.81MR93 6.81M
D4
TB3100M-13-F
D4
TB3100M-13-F
69
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.12 SD/MMC Interface
SD/MMC is a standard Secure Digital/MultiMedia Card interface.
The MB has two high-speed Multimedia Card Interfaces (MCI).
The first interface is used as an 8-bit interface (MCI0), connected to an SD/MMC card slot.
The second interface is used as a 4-bit interface (MCI1), connected to a MicroSD card slot.
Each power line is on by default and is connected to a MOSFET controlled by a PIO to switch on or off the SD card
power.
Note: The power is connected to VCC, which is 3.3V.
Figure 5-17 . SD /MMC Interface
VDDIOP1 VDD_MCI1
VDD_MCI0 VDD_MCI0
VDDIOP1
VDD_MCI0
VDD_MCI1
VDDIOP1
VDDIOP1
PD2
PB213
PB203
PB243
PB193
PB233
PB223
PD1
PD9
PD0
PD4
PD3
PD183
PD6
PD7
PD8
PD5
PD17
PB10 3
PB12 3
MCI1
RR1,RR2 near SO DIMM place
(MCI1_DA1)
(MCI1_DA0)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
(MCI1_CD)
MCI0
Micro S D
(MCI0_CD)
(MCI0_WP)
SD/MMCPlus CARD INTERFACE - MCI0
RR4,RR5,RR42 near SODIMM place
(MCI0_DA1)
(MCI0_DA0)
(MCI0_CK)
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
(MCI0_DA4)
(MCI0_DA5)
(MCI0_DA7)
(MCI0_DA6)
R10
68k
R10
68k
R47
4.7k
R47
4.7k
RR4
27R
RR4
27R
1
2
3
4 5
6
7
8
R9
10k
R9
10k
Q9
IRLML6402
Q9
IRLML6402
1
3 2
R121
0R
DNP
R121
0R
DNP
R49
10k
R49
10k
R17
68k
R17
68k
SW1
SW2
J6
PJS008-2110-0
SW1
SW2
J6
PJS008-2110-0
8
5
7
6
4
3
2
1
9
13
12
11
10
14
R39
68k
R39
68k
R13
68k
R13
68k
C93
10u
C93
10u
R11
68k
R11
68k
R58
0R
DNP
R58
0R
DNP
R38
68k
R38
68k
R18
68k
R18
68k
RR2 27RRR2 27R
1
2
3
45
6
7
8
J7
7SDMM-B0-2211
J7
7SDMM-B0-2211
8
5
7
6
4
3
2
1
9
14
15
16
13
12
11
10
R14
10k
R14
10k
JP6
SIP2
JP6
SIP2
1 2
R36
68k
R36
68k
C40 10uC40 10u
C12 100nC12 100n
Q8
IRLML6402
Q8
IRLML6402
1
3 2
R26
68k
R26
68k
C11
100n
C11
100n
RR3
10k
RR3
10k
1
2
3
4 5
6
7
8
R15
68k
R15
68k
R48
4.7k
R48
4.7k
RR42 27R
RR42 27R
1
2
3
45
6
7
8
R16
68k
R16
68k
RR5 27RRR5 27R
1
2
3
4 5
6
7
8
RR1 27RRR1 27R
1
2
3
4 5
6
7
8
R12
68k
R12
68k
70
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
5.2.13 ZigBee
The MB has a 10-pin male connector for the Atmel RZ600 ZigBee module.
Not populated (DNP) 0 Ohm resistors have been implemented in series with the PIO lines that are used elsewhere in the
design This ensures that in case of a conflict in the user application, the lines can be disconnected individually.
Figure 5-18. ZigBee Interface
5.2.14 LED Indicators
The main board has one red LED (D2) that is on when the board is powered.
There are two additional LEDs on the main board that are associated with on-board JTAG port. See Section 5.2.3
“Debug JTAG/ICE and DBGU”.
5.2.15 Pushbutton Switches
One reset, board reset (BP1)
One wake-up, pushbutton to bring the processor out of low-power mode (BP2)
One user momentary pushbutton
One boot memory Chip Select (CS), disabling the pushbutton (refer to Section 4.2.4.1 “Boot Configuration”).
5.2.15.1 Reset
When pressed and released, this pushbutton causes a power-on reset of the SAMA5D3 series EK (MB, CM and DM
boards).
ZIGBEE INTERFACE
3V3
PC22
PC28
PE29
PE30
SPI1_NPCS3
SPI1_MISO SPI1_MOSI
SPI1_SPCK
ZB_RSTN
ZB_IRQ1 ZB_IRQ0
ZB_SLPTR
DNPDNP
R82 0R
DNP
R82 0R
DNP
C26
2.2n
C26
2.2n
R55 0R
DNP
R55 0R
DNP
R57 0R
DNP
R57 0R
DNP
C27
2.2u
C27
2.2u
C25
15p
C25
15p
R53 0R
DNP
R53 0R
DNP
R56 0RR56 0R
DNP
R52 0RR52 0R
DNP
J10
BD10-H
J10
BD10-H
12
34
56
78
910
JP10
DNP
JP10
DNP
1
2
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11180B–ATARM–29-Oct-13
5.2.15.2 CS_BOOT Button
The CS_BOOT can be used to prevent the system from booting out of external memories (NANDFlash, SPI Flash). The
purpose is mainly to execute the SAM-BA part of the ROM code.
Two methods can be used:
1. Press the CS_BOOT and power-cycle the board.
2. Press the CS_BOOT and then press the NRST button.
Figure 5-19. Pushbutton
5.2.16 An a lo g Refe ren c e
The 3V voltage reference is based on an LM4040 (Precision Micropower Shunt Voltage Reference).
This ADVREF level can be set as 3V or 3.3V via the jumper JP14.
Figure 5-20. Analo g Reference
3V3
NRST 3,10,14
WAKE UP 3
VBAT
PE27 3,9,13
CS_BOOT_DISABLE 3
WAKE UP
NRST
PUSH BUTTON
PB_USER1
PB_USER1
CS_BOOT
PB1PB1
PB2PB2
R142
1.5k
R142
1.5k
PB3PB3
R141
100k
R141
100k
PB4PB4
R46 0RR46 0R
VDDANA 5V
ADVREF
3V
ANALOG Reference 3V
JP14JP14
1
2
3
C112
100n
C112
100n
D6
LM4040BIM3-3.0+T
D6
LM4040BIM3-3.0+T
R143
1.5k
R143
1.5k
C113
2.2u
C113
2.2u
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11180B–ATARM–29-Oct-13
5.2.17 Expansion Ports
Three 40-pin headers (J1, J2, J3) are provided on the board to allow for the PIO connection of various expansion cards
that could be developed by the users or other sources. Due to multiplexing, different signals can be provided on each pin.
Figure 5- 21 . I/O Expansion
Two connectors (J21, J22) are provided on-board to interface the optional LCD and touchscreen display module (DM)
board.
PA19
PA10
PA28
PA4
PA11
PA20
PA5
PA12
PA27
PA13
PA21
PA14
PA26
PA15
PA22
PA25
PA24
PA23
PA0
PA1
PA2
PA16
PA3
PA31
PA17
PA30
PA6
PA8
PA18
PA29
PA7
PA9
5V
VDDIOP0
VDDIOP0 VDDIOP0
JP1JP1
1
2
3
J1
MD2X20-H
J1
MD2X20-H
1 2
3 4
5 6
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
PC19
PC10
PC28
PC4
PC11
PC20
PC5
PC12
PC27
PC13
PC21
PC14
PC26
PC15
PC22
PC25
PC24
PC23
PC0
PC1
PC2
PC16
PC3
PC31
PC17
PC30
PC6
PC8
PC18
PC29
PC7
PC9
5V
VDDIOP0
VDDIOP0
J2
MD2X20-H
J2
MD2X20-H
1 2
3 4
5 6
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
JP2JP2
1
2
3
PB25
PD14
PB19
PB26
PB20
PB27
PD13
PB28
PB29
PD12
PB30
PD11
PD10
PB10
PB12
PB14
PB31
PB15
PD31
PE23
PD19
PB21
PB23
PE24
PD15
PB22
PB24
PE25
PE31
PE26
PE29
PE30
5VVDDIOP1
VDDIOM VDDIOM
JP3JP3
1
2
3
J3
MD2X20-H
J3
MD2X20-H
12
3 4
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
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11180B–ATARM–29-Oct-13
Figure 5- 22 . LCD Expansion
All I/Os of the SAMA5D3 series Image Sensor Interface (ISI) are routed to connectors J11.
Figure 5-23 . ISI Expansion
LCD
LCD/TSC
LCDDAT0
LCDDAT17
LCDDAT2
LCDDEN
LCDDAT4
LCDDAT7
LCDDAT19
LCDDAT9
LCDDAT21
LCDDAT11
LCDDAT12
LCDDAT22
LCDDAT14
MWPDCLPSIDDCL
LCDDAT3
LCDDAT1
LCDPCK
6TADDCL5TADDCL LCDDAT8
LCDDAT10
LCDDAT13
LCDDAT15
LCDDAT16
LCDDAT18
LCDDAT20 LCDDAT23
LCDVSYNC
AD0_XP
AD2_YP
AD4_LR
AD1_XM
AD3_YM
ISOM_1IPSOSIM_1IPS
SPI1_SPCK
ZB_IRQ0
SPI1_NPCS3
ZB_IRQ1
TWCK1(SPI1_NPCS2) TWD1(SPI1_NPCS1)
EN_PWRLCD
ONE_WIRE
LCDHSYNC
5V_LCD
3V3
PE30 10,3,6
PE31
3,6
PC27
13,3
PA1
3,9
PA3
3,9
PA5
3,9
PA7
3,9
PA9
3,9
PA11
3,9
PC26 13,3
PA15 3,9
PA13 3,9
PA14 3,9
PA12 3,9
PA0 3,9
PA2 3,9
PA4 3,9
PA6 3,9
PA8 3,9
PA10 3,9
PC13 3,9
PC11 3,9
PC15 3,9
PE28 3,6,9
PA24 3
PA27 13,3,9
PA28 3,9
PD21 3
PD23 3
PE25 12,3
PC23 3,6
PC28 13,3,6
PC14
3,9
PC22
3,6
PC24
3,6
PC12
3,9
PC10
3,9
PE27
12,3,9
PA25
3
PA26
3,9
PA29
3,9
PD20
3
PD22
3
PD24
3
EN_PWRLCD
11
5V_LCD
11
LCD_DETECT# 11
PB15 3,6
PB14
3,6
PA27 13,3,9
PD19
3
R158 0RR158 0R
RR23
22R
RR23
22R
1
2
3
4 5
6
7
8
R127 0R
DNP
R127 0R
DNP
R160 0RR160 0R
R159 0RR159 0R
J21
ESW-115-33-L-D
J21
ESW-115-33-L-D
1 2
3 4
5 6
7 8
910
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
R150 0RR150 0R
R169 0RR169 0R
R153 0RR153 0R
R148 0RR148 0R
RR16
22R
RR16
22R
1
2
3
4 5
6
7
8
RR43DRR43D
4
5
R157 0RR157 0R
R174 0RR174 0R
RR12
22R
RR12
22R
1
2
3
4 5
6
7
8
J22
ESW-120-33-L-D
J22
ESW-120-33-L-D
1 2
3 4
5 6
7 8
910
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
RR43CRR43C
3
6
R151 0RR151 0R
R152 0RR152 0R
RR14
22R
RR14
22R
1
2
3
4 5
6
7
8
R154 0RR154 0R
R156 0RR156 0R
R146 0RR146 0R
RR43BRR43B
2
7
RR13
22R
RR13
22R
1
2
3
4 5
6
7
8
RR15
22R
RR15
22R
1
2
3
4 5
6
7
8
RR11
22R
RR11
22R
1
2
3
4 5
6
7
8
RR43ARR43A
1
8
R149 0RR149 0R
R161 0RR161 0R
R155 0RR155 0R
R147 0RR147 0R
VDDIOP0
VDDIOP0
VDDISI4
PA173
PA193
PA213
PA233
PC283,6
PC263
PC15 3,9
PA30 3,7,9
PA31 3,7,9
PC30 3
PA16 3
PA18 3
PA20 3
PA22 3
PC29 3
PC27 3
PE283,6,9 PE29 3,6
PC273PC26 3
ISI
ISI_D1
ISI_D3
ISI_D5
ISI_D7
ISI_D9
ISI_D11
ISI_D2
ISI_D0
ISI_D4
ISI_D6
ISI_D8
ISI_D10
ISI_MCK
ISI_VSYNC
ISI_HSYNC
ISI_PCK
ZB_RSTNZB_SLPTR 1DWT1KCWT
R125
1.5k
R125
1.5k
R124 1.5kR124 1.5k
J11
TSW-115-07-L-D
J11
TSW-115-07-L-D
1 2
34
5 6
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
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11180B–ATARM–29-Oct-13
5.3 Configuration
Table 5-2 describes the PIO usage, the jumpers, the test points and the solder drops of a SAMA5D3 series EK board.
Table 5-2. Jumpers and Solderd rops
Reference Default Function
JP1 1-2 VDDIOP0 or 5V selection for J1
JP2 1-2 VDDIOP0 or 5V selection for J2
JP3 1-2 VDDIOP0 or 5V selection for J3
JP4 CLOSE Backup supply on/off
JP5 CLOSE Force power on function
JP6 CLOSE MCI0 write protect select
JP7 CLOSE CAN0 diff termination select
JP8 CLOSE CAN1 diff termination select
JP9 OPEN Default boot on embedded ROM, close boot on external memory
JP10 OPEN ZigBee power on/off select
JP11 —
JP12 —
JP13 —
JP14 1-2 ADVREF input selection
JP15 OPEN JTAG ena ble
JP16 OPEN CDC enable
JP17 OPEN
CLOSE Enable LCD for D31, D33, D34
Disable LCD for D35
JP18 1-2 SAM3U powered by main 3V3
Table 5-3. Default Not Populated Parts
Page Reference Function
3 R6,R51,R50,R120 Optional PD10, PD11, PD12, PD13 from MB
5R58 Optional for MCI0 power supply mode
R121 Optional for MCI1 power supply mode
6R52,R53,R55,R56,R57,R82,JP10 Optional ZigBee
R132,R133 Debug or USART1 option
7
C89,C90,R118,R119,J26 Optional Audio Line out, MIC in
R80,R81 Optional MIC level settin g
R230 Optional audio TK
9
L38,L39,L40,L41 Optional HDMI EMI filter
R89 HDMI chip I2C address setting
R266 Optional for I2S PCLK
R42 Optional for LCD PCLK
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10 R162,R170,R171,R172,R176,R17
7,C122,C123 Optional for KSZ8041 NL
12 R144 Optional pull up for DS28EC20P
13 R127 Optional for ADC trigger
14
R79,R106,R107,R109,R113,R110,
R112,R111,J9 Optional JTAG
R54 SAM3U JTAG selection
R63 5V option
D11,D12 USB ESD protect option
R186 Main 3V3 optional for VCC_3V3_DEBUG
Table 5-3. Default Not Populated Parts
Page Reference Function
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11180B–ATARM–29-Oct-13
5.4 PIO Usage and Interface Connectors Details
5.4.1 Power Supply
Figure 5-24. Power Supply Connector J4
Table 5-4. Power Supply Connector J4 Sig nal Description
Pin Mnemonic Signal Description
1 Center +5V
2GND
3 Floating
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11180B–ATARM–29-Oct-13
5.4.2 JTAG/ICE Connector
Figure 5- 25 . JTA G J9
Table 5-5. JTAG/ICE Connector J9 Signal Descriptions
Pin Mnemonic Signal Description
1VT
ref 3.3V power
This is the target reference voltage. It is used to check if the target has
power, to create the logic-level reference for the input comparators, and
to control the output logic levels to the target. It is normally fed from VDD
on the target board and must not have a series resistor.
2V
supply 3.3V power This pin is not connected in SAM-ICE. It is reserved for compatibility with
other equipment. Connect to VDD or leave open in target system.
3nTRST Target Reset - Active-low
output signal that resets the target.
JTAG Reset. Output from SAM-ICE to the Reset signal on the target
JTAG port. Typically connected to nTRST on the target CPU. This pin is
normally pulled High on the target to avoid unintentional resets when
there is no connection.
4 GND Common ground
5TDI Test Data Input - Serial data
output line, sampled on the rising
edge of the TCK signal.
JTAG data input of target CPU. It is recommended that this pin is pulled
to a defined state on the target board. Typically connected to TDI on
target CPU.
6 GND Common ground
7 TMS Test Mode Select.
JTAG mode set input of target CPU. This pin should be pulled up on the
target. Typically connected to TMS on target CPU. Output signal that
sequences the target's JTAG state machine, sampled on the rising edge
of the TCK signal.
8 GND Common ground
9TCK Test Clock - Output timing
signal, for synchronizing test logic
and control register access.
JTAG clock signal to target CPU. It is recommended that this pin is
pulled to a defined state on the target board. Typically connected to TCK
on target CPU.
10 GND Common ground
11 RTCK - Input Return Test Clock
signal from the target.
Some targets must synchronize the JTAG inputs to internal clocks. To
assist in meeting thi s requiremen t, a returned and retimed TCK can be
used to dynamically control the TCK rate. SAM-ICE supports adaptive
clocking which waits for TCK changes to be echoed correctly before
making further changes. Connect to RTCK if available, otherwise to
GND.
12 GND Common ground
13 TDO JTAG Test Data Output -
Serial data input from the target. JTAG data output from target CPU. Typically connected to TDO on
target CPU.
14 GND Common ground
15 nSRST RESET Active-low reset signal. Target CPU reset signal.
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11180B–ATARM–29-Oct-13
5.4.3 USB Type A Dual Port
Figure 5-26. USB Type A Dual Port J19
16 GND Common ground
17 RFU This pin is not connected in SAM-ICE.
18 GND Common ground
19 RFU This pin is not connected in SAM-ICE.
20 GND Common ground
Table 5-5. JTAG/ICE Connector J9 Signal Descriptions
Pin Mnemonic Signal Description
Table 5-6. USB Type A Dual Port J19 Signal Descriptions
Pin Mnemonic PIO Signal Description
A1 Vbus - USB_A 5V power
A2 DM - USB_A Data minus
A3 DP - USB_A Data plus
A4 GND Common gr ou n d
B1 Vbus - USB_A 5V power
B2 DM - USB_A Data minus
B3 DP - USB_A Data plus
B4 GND Common gr ou n d
Mechanical
pins Shield
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11180B–ATARM–29-Oct-13
5.4.4 USB MicroAB
Figure 5-27. USB Host/Device MicroAB Connector J20
5.4.5 JTAG OB USB MicroAB
Figure 5-28. USB JTAG OB MicroAB connector J14
Table 5-7. USB Host/Device Micro AB Connector J20 Signal Descriptions
Pin Mnemonic PIO Signal Description
1 V bus 5V power
2 DM Data mi n us
3 DP Dat a p lu s
4 ID On the Go identification
5 GND Common ground
Table 5-8. USB JTAG OB MicroAB connecto r J14 Signal Descriptions
Pin Mnemonic PIO Signal description
1 V bus 5V power
2 DM Data minus
3 DP Data plus
4 ID On the Go Identification
5 GND Common grou nd
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11180B–ATARM–29-Oct-13
5.4.6 HDMI Connector
Figure 5-29. HDMI Female Type A Connector J25
Table 5-9. HDMI Type A Female Connector J25
LCD Pin Num LCD
TMDS Data 2+ 1 2 TMDS Data 2 Shield
TMDS Data 2- 3 4 TMDS Data 1+
TMDS Data 1 Shield 5 6 TMDS Data 1-
TMDS Data 0+ 7 8 TMDS Data 0 Shield
TMDS Data 0- 9 10 TMDS Clock +
TMDS Clock Shield 11 12 TMDS Clock -
NC 13 14 NC
SCL 15 16 SDA
GND 17 18 +5V
Hot Plus Detect 19
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11180B–ATARM–29-Oct-13
5.4.7 RS232 Connector with RTS/CTS Handshake Support
Figure 5- 30 . USA R T1 Connecto r J8
5.4.8 DAA RJ11 Socket (6P4C)
Figure 5-31. DAA RJ11 Socket J16
Table 5-10. USART Connector J8 Signal Descriptions
Pin Mnemonic PIO Signal Description
1, 4, 6, 9 No connection
2 RXD (Received Data) PB28 RS232 serial data output signal
3 TXD (Transmitted Data) PB29 RS232 serial data input signal
5 GND Common ground
7 RTS (Request To Send) PB27 Active-positive RS232 input signal
8 CTS (Clear To Send) PB26 Active-positive RS232 output signal
Mechanical
pins Shield
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5.4.9 CAN RJ12 Socket (6P6C)
Figure 5-32. CAN RJ12 Socket J18, J27
Table 5-11. DAA RJ11 Socket J16 Signal Descriptions
Pin Mnemonic Signal Description
1, 2, 5, 6 No connection
3 RAC RING side of ordinary telephone line
4 TAC TIP side of ordinary telephone line
Table 5-12. CAN RJ12 Socket Signal Descriptions
Pin Mnemonic Sig nal Description
1 3V3 Power pin
2 5V Power pin
4 CANL CAN bus differential pair
5 CANH CAN bus diff erential pair
3, 6 GND Common ground
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11180B–ATARM–29-Oct-13
5.4.10 SD/ MM C Plu s MCI0
Figure 5- 33 . SD Soc ket J7
Table 5-13. MicroSD Socket J7 Signal Descriptions
Pin Mnemonic PIO Signal Description
1DAT3 PD4Data bit
2 CMD PD0 Command line
3 VSS Command line
4 VCC Supply voltage 3.3V
5 CLK PD9 Clock / command line
6 CD PD17 Card detect
7DAT0 PD1Data bit
8DAT1 PD2Data bit
9DAT2 PD3Data bit
10 DAT4 PD5 Data bit
11 DAT5 PD6 Data bit
12 DAT6 PD7 Data bit
13 DAT7 PD8 Data bit
14 WP JP6 Protect
15 VSS Common ground
16 VSS Common ground
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11180B–ATARM–29-Oct-13
5.4.11 MicroSD MCI1
Figure 5-34. MicroSD Socket J6
Table 5-14. MicroSD Socket J6 Signal Descriptions
Pin Mnemonic PIO Sign al Description
1 DAT 2 PB22 Data bit 2
2 CD/DAT3 PB23 Card detect / data bit 3
3 CMD PB19 C ommand line
4 VCC Supp ly voltage 3.3V
5 CLK PB24 Clock / command line
6 VSS Common ground
7 DAT 0 PB20 Data bit 0
8 DAT 1 PB21 Data bit 1
9 SW1 Not used, groun ded
10 CARD DETECT PD18 Card detect
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11180B–ATARM–29-Oct-13
5.4.12 Gigabit Ethernet ETH0 RJ45 Socket J17
Figure 5-35. Gigabit Ethernet RJ45 So cket J17
5.4.13 Ethernet ETH1 RJ45 Socket J24
Figure 5-36. Ethernet RJ45 Socket J24
5.4.14 ZigBee Socket J10
Figure 5-37. ZigBee Socket J10
Table 5-15. ZigBee Socket J10 Signal Descriptions
Function Signal
Name Port Pin Pin Port Signal
Name Function Option on Misc. Port Set
by OR or Solder Shunts
Reset /RST 1 2 Misc.
EEPROM for MAC address, cap array
settings and serial number
TST: test mode acti vation
CLKM: RF chip clock output
Interrupt
Request IRQ 3 4 SLP_TR SLP_TR
SPI chip
select /SEL 5 6 MOSI SPI MOSI
SPI MISO MISO 7 8 SCLK SPI CLK
Power
Supply GND GND 9 10 VCC VCC VCC Voltage range: 1.8V to 5.5V,
regulated to 3.3V
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11180B–ATARM–29-Oct-13
5.4.15 LCD Socket J21
Figure 5- 38 . LCD Soc ket J21
Table 5-16. LCD Socket J21 HE10 Female LCD 2*15p
LCD Pin Number LCD
VDD3V3 1 2 GND
VDD3V3 3 4 GND
ZB_IRQ0 5 6 ZB_IRQ1
TWCK1 7 8 TWD1
GND 9 10 LCDDAT15
GND 11 12 LCDDAT13
GND 13 14 LCDDAT14
GND 15 16 LCDDAT12
GND 17 18 LCDDAT0
LCDDAT1 19 20 LCDDAT2
LCDDAT3 21 22 LCDDAT4
LCDDAT5 23 24 LCDDAT6
LCDDAT7 25 26 LCDDAT8
LCDDAT9 27 28 LCDDAT10
LCDDAT11 29 30 GND
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11180B–ATARM–29-Oct-13
5.4.16 LCD/TSC Socket J22
Figure 5-39 . LCD/TSC Socket J2 2
Table 5-17. LCD/TSC Socket J22 HE10 Female LCD/TS C/QT 2*20p
LCD Pin Number LCD
5V 5V_LCD 1 2 GND GND
5V 5V_LCD 3 4 GND GND
LCDDAT16 5 6 LCDDAT17
LCDDAT18 7 8 LCDDAT19
LCDDAT20 9 10 LCDDAT21
LCDDAT22 11 12 LCDDAT23
GND GND 13 14 GND GND
LCDDISP 15 16 LCDPWM
LCDCSYNC 17 18 LCDHSYNC
LCDDEN 19 20 LCDPCK
GND GND 21 22 GND GND
AD0_XP TSC 23 24 TSC AD1_XM
AD2_YP TSC 25 26 TSC AD3_YM
AD4_LR TSC 27 28 ONE_WIRE
GND1 GND 29 30 GND GND
SPI1_MISO 31 32 SPI1_MOSI
SPI1_SPCK 33 34 SPI1_NPCS3
EN_PWRLCD 35 36 LCD_DETECT LCD_DETECT#
PB14 37 38 PB15
GND GND 39 40 GND GND
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11180B–ATARM–29-Oct-13
5.4.17 ISI Socket J11
Figure 5-40. ISI Soc ket J11
Table 5-18. ISI Socket J11 HE10 Female ISI 2*15p
ISI Pin Number ISI
VDDISI 1 2 GND
VDDISI 3 4 GND
ZB_SLPTR 5 6 ZB_RST
TWCK1 7 8 TWD1
GND 9 10 ISI_MCK
GND 11 12 ISI_VSYNC
GND 13 14 ISDI_HSYNC
GND 15 16 ISI_PCK
GND 17 18 ISI_D0
ISI_D1 19 20 ISI_D2
ISI_D3 21 22 ISI_D4
ISI_D5 23 24 ISI_D6
ISI_D7 25 26 ISI_D8
ISI_D9 27 28 ISI_D10
ISI_D11 29 30 GND
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11180B–ATARM–29-Oct-13
5.4.18 PIO Usage
Table 5-19. PIO A Pin Assignment and Signal Description
Power Rail Signal Signal Signal Signal SAMA5-CM SAMA5-MB
VDDIOP0 PA0 LCDDAT0 PIO PU – LCDDAT0
VDDIOP0 PA1 LCDDAT1 PIO PU – LCDDAT1
VDDIOP0 PA2 LCDDAT2 PIO PU – LCDDAT2
VDDIOP0 PA3 LCDDAT3 PIO PU – LCDDAT3
VDDIOP0 PA4 LCDDAT4 PIO PU – LCDDAT4
VDDIOP0 PA5 LCDDAT5 PIO PU – LCDDAT5
VDDIOP0 PA6 LCDDAT6 PIO PU – LCDDAT6
VDDIOP0 PA7 LCDDAT7 PIO PU – LCDDAT7
VDDIOP0 PA8 LCDDAT8 PIO PU – LCDDAT8
VDDIOP0 PA9 LCDDAT9 PIO PU – LCDDAT9
VDDIOP0 PA10 LCDDAT10 PIO PU – LCDDAT10
VDDIOP0 PA11 LCDDAT11 PIO PU – LCDDAT11
VDDIOP0 PA12 LCDDAT12 PIO PU – LCDDAT12
VDDIOP0 PA13 LCDDAT13 PIO PU – LCDDAT13
VDDIOP0 PA14 LCDDAT14 PIO PU – LCDDAT14
VDDIOP0 PA15 LCDDAT15 PIO PU – LCDDAT15
VDDIOP0 PA16 LCDDAT16 ISI_D0 PIO – ISI_D0
VDDIOP0 PA17 LCDDAT17 ISI_D1 PIO – ISI_D1
VDDIOP0 PA18 LCDDAT18 TWD2 ISI_D2 – ISI_D2
VDDIOP0 PA19 LCDDAT19 TWCK2 ISI_D3 – ISI_D3
VDDIOP0 PA20 LCDDAT20 PWMH0 ISI_D4 – ISI_D4
VDDIOP0 PA21 LCDDAT21 PWML0 ISI_D5 – ISI_D5
VDDIOP0 PA22 LCDDAT22 PWMH1 ISI_D6 – ISI_D6
VDDIOP0 PA23 LCDDAT23 PWML1 ISI_D7 – ISI_D7
VDDIOP0 PA24 LCDPWM PIO PU – LCDPWM
VDDIOP0 PA25 LCDDISP PIO PU – LCDDISP
VDDIOP0 PA26 LCDVSYNC PIO PU – LCDVSYNC
VDDIOP0 PA27 LCDHSYNC PIO PU – LCDHSYNC
VDDIOP0 PA28 LCDPCK PIO PU – LCDPCK
VDDIOP0 PA29 LCDDEN PIO PU – LCDDEN
VDDIOP0 PA30 TWD0 URXD1 ISI_VSYNC – ISI_VSYNC
VDDIOP0 PA31 TWCK0 UTXD1 ISI_HSYNC – ISI_HSYNC
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Table 5-20. PIO B Pin Assignment and Signal Description
Power Rail Signal Signal Signal Signal SAMA5-CM SAMA5-MB
VDDIOP1 PB0 GTX0 PWMH0 PIO GETH CM –
VDDIOP1 PB1 GTX1 PWML0 PIO GETH CM –
VDDIOP1 PB2 GTX2 TK1 PIO GETH CM –
VDDIOP1 PB3 GTX3 TF1 PIO GETH CM –
VDDIOP1 PB4 GRX0 PWMH1 PIO GETH CM –
VDDIOP1 PB5 GRX1 PWML1 PIO GETH CM –
VDDIOP1 PB6 GRX2 TD1 PIO GETH CM –
VDDIOP1 PB7 GRX3 RK1 PIO GETH CM –
VDDIOP1 PB8 GTXCK PWMH2 PIO GETH CM –
VDDIOP1 PB9 GTXEN PWML2 PIO GETH CM –
VDDIOP1 PB10 GTXER RF1 PIO – PWR_MCI0
VDDIOP1 PB11 GRXCK RD1 PIO GETH CM –
VDDIOP1 PB12 GRXDV PWMH3 PIO – PWR_MCI1
VDDIOP1 PB13 GRXER PWML3 PIO GETH CM RX_DV (KSZ9 021)
VDDIOP1 PB14 GCRS CANRX1 PIO – CANRX1
VDDIOP1 PB15 GCOL CANTX1 PIO – CANTX1
VDDIOP1 PB16 GMDC PIO PU GETH CM –
VDDIOP1 PB17 GMDIO PIO PU GETH CM –
VDDIOP1 PB18 G125CK PIO PU GETH CM –
VDDIOP1 PB19 MCI1_CDA GTX4 PIO – MCI1_CDA
VDDIOP1 PB20 MCI1_DA0 GTX5 PIO – MCI1_DA0
VDDIOP1 PB21 MCI1_DA1 GTX6 PIO – MCI1_DA1
VDDIOP1 PB22 MCI1_DA2 GTX7 PIO – MCI1_DA2
VDDIOP1 PB23 MCI1_DA3 GRX4 PIO – MCI1_DA3
VDDIOP1 PB24 MCI1_CK GRX5 PIO – MCI1_CK
VDDIOP1 PB25 SCK1 GRX6 PIO INT_GETH0 –
VDDIOP1 PB26 CTS1 GRX7 PIO – CTS1
VDDIOP1 PB27 RTS1 PWMH1 PIO – RTS1
VDDIOP1 PB28 RXD1 PIO PU – RXD1
VDDIOP1 PB29 TXD1 PIO PU – TXD1
VDDIOP0 PB30 DRXD PIO PU – DRXD (DBGU)
VDDIOP0 PB31 DTXD PIO PU – DTXD (DBGU)
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Table 5-21. PIO C Pin Assignment and Signal Description
Power Rail Signal Signal Signal Signal SAMA5-MB
VDDIOP0 PC0 ETX0 TIOA3 PIO ETX0 –
VDDIOP0 PC1 ETX1 TIOB3 PIO ETX1 –
VDDIOP0 PC2 ERX0 TCLK3 PIO ERX0 –
VDDIOP0 PC3 ERX1 TIOA4 PIO ERX1 –
VDDIOP0 PC4 ETXEN TIOB4 PIO ETXEN –
VDDIOP0 PC5 ECRSDV TCLK4 PIO ECRSDV –
VDDIOP0 PC6 ERXER TIOA5 PIO ERXER –
VDDIOP0 PC7 EREFCK TIOB5 PIO EREFCK –
VDDIOP0 PC8 EMDC TCLK5 PIO EMDC –
VDDIOP0 PC9 EMDIO PIO PU EMDIO –
VDDIOP0 PC10 MCI2_CDA LCDDAT20 PIO LCDDAT20 –
VDDIOP0 PC11 MCI2_DA0 LCDDAT19 PIO LCDDAT19 –
VDDIOP0 PC12 MCI2_DA1 TIOA1 LCDDAT18 LCDDAT18 –
VDDIOP0 PC13 MCI2_DA2 TIOB1 LCDDAT17 LCDDAT17 –
VDDIOP0 PC14 MCI2_DA3 TCLK1 LCDDAT16 LCDDAT16 –
VDDIOP0 PC15 MCI2_CK PCK2 LCDDAT21 LCDDAT21 ISI_MCK
VDDIOP0 PC16 TK0 PIO PU TK0 Audio –
VDDIOP0 PC17 TF0 PIO PU TF0 Audio –
VDDIOP0 PC18 TD0 PIO PU TD0 Audio –
VDDIOP0 PC19 RK0 PIO PU RK0 Audio –
VDDIOP0 PC20 RF0 PIO PU RF0 Audio –
VDDIOP0 PC21 RD0 PIO PU RD0 Audio –
VDDIOP0 PC22 SPI1_MISO PIO PU SPI1_MISO SPI LCD
VDDIOP0 PC23 SPI1_MOSI PIO PU SPI1_MOSI SPI LCD
VDDIOP0 PC24 SPI1_SPCK PIO PU SPI1_SPCK SPI LCD
VDDIOP0 PC25 SPI1_NPCS0 PIO PU SPI1_NPCS0 –
VDDIOP0 PC26 SPI1_NPCS1 TWD1 ISI_D11 ISI_D11 TWI LCD
VDDIOP0 PC27 SPI1_NPCS2 TWCK1 ISI_D10 ISI_D10 TWI LCD
VDDIOP0 PC28 SPI1_NPCS3 PWMFI0 ISI_D9 ISI_D9 SPI LCD
VDDIOP0 PC29 URXD0 PWMFI2 ISI_D8 ISI_D8 HDMI_INT
VDDIOP0 PC30 UTXD0 ISI_PCK PIO ISI_PCK –
VDDIOP0 PC31 FIQ PWMFI1 PIO – Reset_HDMI
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Table 5-22. PIO D Pin Assignment and Signal Description
Power Rail Signal Signal Signal Signal SAMA5-MB
VDDIOP1 PD0 MCI0_CDA PIO PU – MCI0_CDA
VDDIOP1 PD1 MCI0_DA0 PIO PU – MCI0_DA0
VDDIOP1 PD2 MCI0_DA1 PIO PU – MCI0_DA1
VDDIOP1 PD3 MCI0_DA2 PIO PU – MCI0_DA2
VDDIOP1 PD4 MCI0_DA3 PIO PU – MCI0_DA3
VDDIOP1 PD5 MCI0_DA4 TIOA0 PWMH2 – MCI0_DA4
VDDIOP1 PD6 MCI0_DA5 TIOB0 PWML2 – MCI0_DA5
VDDIOP1 PD7 MCI0_DA6 TCLK0 PWMH3 – MCI0_DA6
VDDIOP1 PD8 MCI0_DA7 PWML3 PIO – MCI0_DA7
VDDIOP1 PD9 MCI0_CK PIO PU – MCI0_CK
VDDIOP1 PD10 SPI0_MISO PIO PU CM_SerFlash –
VDDIOP1 PD11 SPI0_MOSI PIO PU CM_SerFlash –
VDDIOP1 PD12 SPI0_SPCK PIO PU CM_SerFlash –
VDDIOP1 PD13 SPI0_NPCS0 PIO PU CM_SerFlash –
VDDIOP1 PD14 SCK0 SPI0_NPCS1 CANRX0 – CANRX0
VDDIOP1 PD15 CTS0 SPI0_NPCS2 CANTX0 – CANTX0
VDDIOP1 PD16 RTS0 SPI0_NPCS3 PWMFI3 INT_AUDIO –
VDDIOP1 PD17 RXD0 PIO PU – MCI0_CD
VDDIOP1 PD18 TXD0 PIO PU – MCI1_CD
VDDIOP1 PD19 ADTRG PIO PU – ADTRG (HSYNC)
VDDANA PD20 AD0 PIO PU – LCD TSC
VDDANA PD21 AD1 PIO PU – LCD TSC
VDDANA PD22 AD2 PIO PU – LCD TSC
VDDANA PD23 AD3 PIO PU – LCD TSC
VDDANA PD24 AD4 PIO PU – LCD TSC
VDDANA PD25 AD5 PIO PU – EN5V_USBA
VDDANA PD26 AD6 PIO PU – EN5V_USBB
VDDANA PD27 AD7 PIO PU – EN5V_USBC
VDDANA PD28 AD8 PIO PU – OVCUR_USB
VDDANA PD29 AD9 PIO PU – VBUS_SENSE
VDDANA PD30 AD10 PCK0 PIO MCLK_AUDIO MCLK_HDMI
VDDANA PD31 AD11 PCK1 PIO – ISI_MCK
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Table 5-23. PIO E Pin Assignment and Signal Description
Power Rail Signal Signal Signal SAMA5-CM SAMA5-MB
VDDIOM PE0 A0/NBS0 I – –
VDDIOM PE1 A1 I NOR – –
VDDIOM PE2 A2 I NOR – –
VDDIOM PE3 A3 I NOR – –
VDDIOM PE4 A4 I NOR – –
VDDIOM PE5 A5 I NOR – –
VDDIOM PE6 A6 I NOR – –
VDDIOM PE7 A7 I NOR – –
VDDIOM PE8 A8 I NOR – –
VDDIOM PE9 A9 I NOR – –
VDDIOM PE10 A10 I NOR – –
VDDIOM PE11 A11 I NOR – –
VDDIOM PE12 A12 I NOR – –
VDDIOM PE13 A13 I NOR – –
VDDIOM PE14 A14 I NOR – –
VDDIOM PE15 A15 SCK3 NOR – –
VDDIOM PE16 A16 CTS3 NOR – –
VDDIOM PE17 A17 RTS3 NOR – –
VDDIOM PE18 A18 RXD3 NOR – –
VDDIOM PE19 A19 TXD3 NOR – –
VDDIOM PE20 A20 SCK2 NOR – –
VDDIOM PE21 A21/NANDALE I NOR / NAND – –
VDDIOM PE22 A22/NANDCLE I N OR / NAND – –
VDDIOM PE23 A23 CTS2 NOR – –
VDDIOM PE24 A24 RTS2 Power LED ISI_RST –
VDDIOM PE25 A25 RXD2 1-Wire / User LED 1-Wire –
VDDIOM PE26 NCS0 TXD2 CS NOR – –
VDDIOM PE27 NCS1 TIOA2 – PB_USER1 LCDDAT22
VDDIOM PE28 NCS2 TIOB2 – ZB_SLPTR LCDDAT23
VDDIOM PE29 NWR1/NBS1 TCLK2 – ZB_RST –
VDDIOM PE30 NWAIT I – ZB_IRQ1 INT_ETH1
VDDIOM PE31 IRQ PWML1 – ZB_IRQ0 HDMI_INT
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5.4.19 IO Expansion Port J1
Figure 5-41. IO Expansio n Socket J1
Table 5-24. IO Expansion Socket J1 HE10 Male 2*20 Signal Descriptions
Signal Pin Number Signal
VDDIOP0 / 5V 1 2 VDDIOP0 / 5V
GND 3 4 GND
PA0 5 6 PA16
PA1 7 8 PA17
PA2 9 10 PA18
PA3 11 12 PA19
PA4 13 14 PA20
PA5 15 16 PA21
PA6 17 18 PA22
PA7 19 20 PA23
PA8 21 22 PA24
PA9 23 24 PA25
PA10 25 26 PA26
PA11 27 28 PA27
PA12 29 30 PA28
PA13 31 32 PA29
PA14 33 34 PA30
PA15 35 36 PA31
GND 37 38 GND
VDDIOP0 39 40 VDDIOP0
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5.4.20 IO Expansion Port J2
Figure 5-42. IO Expansio n Socket J2
Table 5-25. Expansion Socket J2 HE10 Male 2*20 Signal Descriptions
Signal Pin Number Signal
VDDIOP0 / 5V 1 2 VDDIOP0 / 5V
GND 3 4 GND
PC0 5 6 PC16
PC1 7 8 PC17
PC2 9 10 PC18
PC3 11 12 PC19
PC4 13 14 PC20
PC5 15 16 PC21
PC6 17 18 PC22
PC7 19 20 PC23
PC8 21 22 PC24
PC9 23 24 PC25
PC10 25 26 PC26
PC11 27 28 PC27
PC12 29 30 PC28
PC13 31 32 PC29
PC14 33 34 PC30
PC15 35 36 PC31
GND 37 38 GND
VDDIOP0 39 40 VDDIOP0
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5.4.21 IO Expansion Port J3
Figure 5-43. IO Expansio n Socket J3
Table 5-26. Expansion Socket J3 HE10 Male 2*20 Signal Descriptions
Signal Pin Number Signal
VDDIOP0 / 5V 1 2 VDDIOP0 / 5V
GND 3 4 GND
PB10 5 6 PB31
PB12 7 8 PE23
PB14 9 10 PE24
PB15 11 12 PE25
PB19 13 14 PE26
PB20 15 16 PE29
PB21 17 18 PE30
PB22 19 20 PE31
PB23 21 22 PD10
PB24 23 24 PD11
PB25 25 26 PD12
PB26 27 28 PD13
PB27 29 30 PD14
PB28 31 32 PD15
PB29 33 34 PD19
PB30 35 36 PD31
GND 37 38 GND
VDDIOP0 39 40 VDDIOP0
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5.4.22 SODIMM Card Edge Socket
The SAMA5D3 series-EK implements a SODIMM200 standard connector for to interface to the CM board.
Note this is not an industry standard pinout and is unlikely to be compatible with off-the-shelf SODIMM.
Figure 5-44. SODIMM200 Socket CON1
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Table 5-27. SODIMM200 CON1 Signal Descriptions
PIOC PIOB PIOA SODIMM 200 PIOA PIOB PIOC
Front Side A B Back Side
–– VCC 5V 1 2 VCC 5V ––
–– VCC 5V 3 4 VCC 5V ––
––
GND 5 6 VBAT ––
––
CTS2 PE23 7 8 PE29 NWR1/NBS1 TCLK2 –
––
RTS2 PE24 9 10 PE30 NWAIT ––
––
RXD2 PE25 11 12 PE31 IRQ PWML1 –
––
TXD2 PE26 13 14 ––
GND –
––
VDDIOM 15 16 VDDIOM ––
––
SPI1_NPCS0 PC25 17 18 PC24 SPI1_SPCK ––
––
SPI1_MOSI PC23 19 20 PC22 SPI1_MISO ––
––
RD0 PC21 21 22 PC20 RF0 ––
––
GND 23 24 PC19 RK0 ––
––
TD0 PC18 25 26 PC17 TF0 ––
––
TK0 PC16 27 28 PC9 EMDIO PIO –
–TCLK5 EMDC PC8 29 30 PC7 EREFCK TIOB5 –
–TIOA5 ERXER PC6 31 32 ––
GND –
–TIOB4 ETXEN PC4 33 34 PC5 ECRSDV TCLK4 –
–TCLK3 ERX0 PC2 35 36 PC3 ERX1 TIOA4 –
–TIOA3 ETX0 PC0 37 38 PC1 ETX1 TIOB3 –
–Power Enable Enable_0 39 40 Enable_1 CS Boot Disable –
KEY
–– VCC 3V3 41 42 VCC 3V3 ––
–– VCC 3V3 43 44 VCC 3V3 ––
––NC
Enable_2 45 46 Enable_3 NC ––
––
NC –47 48 ADVREF ––
LCDDAT22 TIOA2 NCS1 PE27 49 50 PE28 NCS2 TIOB2 LCDDAT23
–LCDDAT20 MCI2_CDA PC10 51 52 PC11 MCI2_DA0 LCDDAT19 PIO
––
GND –53 54 PC13 MCI2_DA2 TIOB1 LCDDAT17
LCDDAT18 TIOA1 MCI2_DA1 PC12 55 56 PC15 MCI2_CK PCK2 LCDDAT21
LCDDAT16 TCLK1 MCI2_DA3 PC14 57 58 PC26 SPI1_NPCS1 –ISI_D11
ISI_D10 –SPI1_NPCS2 PC27 59 60 PC28 SPI1_NPCS3 PWMFI0 ISI_D9
ISI_D8 PWMFI2 URXD0 PC29 61 62 –GND ––
– PWMFI1 FIQ PC31 63 64 PC30 UTXD0 ISI_PCK –
VDDIOP0 65 66 VDDIOP0
– – LCDDAT0 PA0 67 68 PA1 LCDDAT1 ––
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––
LCDDAT2 PA2 69 70 PA3 LCDDAT3 ––
––
GND –71 72 PA4 LCDDAT4 ––
––
LCDDAT5 PA5 73 74 PA6 LCDDAT6 ––
––
LCDDAT7 PA7 75 76 PA8 LCDDAT8 ––
––
LCDDAT9 PA9 77 78 PA10 LCDDAT10 ––
––
LCDDAT11 PA11 79 80 GND ––
––
LCDDAT12 PA12 81 82 PA13 LCDDAT13 ––
––
LCDDAT14 PA14 83 84 PA15 LCDDAT15 ––
–ISI_D0 LCDDAT16 PA16 85 86 PA17 LCDDAT17 ISI_D1 –
ISI_D2 TWD2 LCDDAT18 PA18 87 88 PA19 LCDDAT19 TWCK2 ISI_D3
––
GND –89 90 PA20 LCDDAT20 PWMH0 ISI_D4
ISI_D5 PWML0 LCDDAT21 PA21 91 92 PA22 LCDDAT22 PWMH1 ISI_D6
ISI_D7 PWML1 LCDDAT23 PA23 93 94 PA24 LCDPWM ––
––
LCDDISP PA25 95 96 PA26 LCDVSYNC ––
––
LCDHSYNC PA27 97 98 GND ––
––
LCDPCK PA28 99 100 PA29 LCDDEN ––
ISI_VSYNC URXD1 TWD0 PA30 101 102 PA31 TWCK0 UTXD1 ISI_HSYNC
VDDANA 103 104 VDDANA
–PCK0 AD10 PD30 105 106 PD31 AD11 PCK1 –
––
GND –107 108 PD29 AD9 ––
––
AD8 PD28 109 110 PD27 AD7 ––
––
AD6 PD26 111 112 PD25 AD5 ––
––
AD4 PD24 113 114 PD23 AD3 ––
––
AD2 PD22 115 116 GND ––
––
AD0 PD20 117 118 PD21 AD1 ––
––
TXD0 PD18 119 120 PD19 ADTRG ––
PWMFI3 SPI0_NPCS3 RTS0 PD16 121 122 PD17 RXD0 PIO –
CANRX0 SPI0_NPCS1 SCK0 PD14 123 124 PD15 CTS0 SPI0_NPCS2 CANTX0
––
GND –125 126 PD13 SPI0_NPCS0 ––
––
SPI0_SPCK PD12 127 128 PD11 SPI0_MOSI ––
––
SPI0_MISO PD10 129 130 PD9 MCI0_CK ––
PIO PWML3 MCI0_DA7 PD8 131 132 PD7 MCI0_DA6 TCLK0 PWMH3
PWML2 TIOB0 MCI0_DA5 PD6 133 134 GND ––
PWMH2 TIOA0 MCI0_DA4 PD5 135 136 PD4 MCI0_DA3 ––
––
MCI0_DA2 PD3 137 138 PD2 MCI0_DA1 ––
––
MCI0_DA0 PD1 139 140 PD0 MCI0_CDA ––
VDDIOP1 141 142 VDDIOP1
Table 5-27. SODIMM200 CON1 Signal Descriptions
PIOC PIOB PIOA SODIMM 200 PIOA PIOB PIOC
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––
GND –143 144 PB13 GRXER PWML3 –
–RF1 GTXER PB10 145 146 PB12 GRXDV PWMH3 –
–CANRX1 GCRS PB14 147 148 PB15 GCOL CANTX1 –
–GTX4 MCI1_CDA PB19 149 150 PB20 MCI1_DA0 GTX5 –
–GTX6 MCI1_DA1 PB21 151 152 PB22 MCI1_DA2 GTX7 –
–GRX4 MCI1_DA3 PB23 153 154 –GND ––
–GRX5 MCI1_CK PB24 155 156 PB25 SCK1 GRX6 –
––
GND –157 158 PB27 RTS1 PWMH1 –
–USB A USBA_DP –159 160 PB29 TXD1 PIO –
–USB A USBA_DM –161 162 PB31 DTXD ––
––
GND –163 164 PB30 DRXD ––
–USB B USBB_DP –165 166 PB26 CTS1 GRX7 –
–USB B USBB_DM –167 168 PB28 RXD1 PIO –
––
GND –169 170 –GND ––
–USB C USBC_DP –171 172 DIB DIBP ––
–USB C USBC_DM –173 174 DIB DIBN ––
––
GND_ETH –175 176 –GND ––
–GIGA_ETH ETH0_TX1+ –177 178 –JTAGSEL SYSC –
–GIGA_ETH ETH0_TX1- –179 180 –WKUP SYSC –
–GIGA_ETH ETH0_RX1+ –181 182 –SHDN SYSC –
–GIGA_ETH ETH0_RX1- –183 184 –BMS RSTJTAG –
––
GND_ETH –185 186 –nRST SYSC –
–GIGA_ETH ETH0_TX2+ –187 188 –nTRST RSTJTAG –
–GIGA_ETH ETH0_TX2- –189 190 –TDI RSTJTAG –
–GIGA_ETH ETH0_RX2+ –191 192 –TCK RSTJTAG –
–GIGA_ETH ETH0_RX2- –193 194 –TMS RSTJTAG –
––
GND –195 196 –TDO RSTJTAG –
––
LED2 –197 198 –RTCK RSTJTAG –
––
LED1 –199 200 –GND ––
Table 5-27. SODIMM200 CON1 Signal Descriptions
PIOC PIOB PIOA SODIMM 200 PIOA PIOB PIOC
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5.5 Main Board Schematics
This section contains the following schematics:
Block diagram
General information
SODIMM
Power supply
HSMCI
CAN & ZigBee & USART1
Audio
Smart DAA
HDMI
ETH
USB interface
Miscellaneous
LCD and ISI
On-board JTAG interface
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
S
O
D
I
M
M
C
O
N
N
E
C
T
O
R
10/100/1000
ETH0
Sheet 10
RJ 45
10/100 FAST
EHT1
Sheet 10
PIO A,...E
Sheet 7
AUDIO
Sheet 3
PIO A
PIO C
PIO B&D&E
PIO
CONNECTOR
POWER SUPPLY
5 V
3V3 INPUT
CARD
READER
MMC SD
SDIO
Sheet 5
CARD
READER
MMC SD
SDIO
PIO A,...E
PIO
CONNECTOR PIO
CONNECTOR
Sheet 4
DBGU
ICE
RJ 45
Sheet 13
HE 14
ISI
LCD
INTERFACE
HE 14
HOST & DEVICE
Sheet 11
USBA USBB USBC
HOST HOST
USB A,B,C
ICE
SmartDAA
Sheet 8
RJ11
SmartDAA
VBAT
Battery
Sheet 12
USER
INTERFACE ONE WIRE
EEPROM
Sheet 4 Sheet 12
ANALOG
3V
ANALOG Reference 3V
OUT
RJ12
CAN0
CAN1
ZIGBEE
INTERFACE
HE10
Sheet 6
HDMI
INTERFACE
Sheet 9
HDMI Type A
USRAT1
RS232
Sheet 14
ICE
SAM3U
USB_B PORT HE10
MIC1 MIC2
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
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A
SAMA5D3x-MB
B
C
114
C
XX-XXX-XXDerek X.X
BLOCK Diagram
11-Nov-11
30-Mar-12Derek X.X XX-XXX-XX
Derek 30-Sep-12 X.X XX-XXX-XX
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
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A
SAMA5D3x-MB
B
C
114
C
XX-XXX-XXDerek X.X
BLOCK Diagram
11-Nov-11
30-Mar-12Derek X.X XX-XXX-XX
Derek 30-Sep-12 X.X XX-XXX-XX
REV DATEMODIF. DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
A
SAMA5D3x-MB
B
C
114
C
XX-XXX-XXDerek X.X
BLOCK Diagram
11-Nov-11
30-Mar-12Derek X.X XX-XXX-XX
Derek 30-Sep-12 X.X XX-XXX-XX
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SCHEMATICS CONVENTIONS
JP14
DEFAULT
1-2
1-2
1-2
CLOSE
CLOSE
OPEN
JUMPER and SOLDERDROP
1-2
3 JP1
JP3
4JP4 Backup supply on/off
JP6
JP10 Zigbee Power on/off select
CAN0 diff termination select
5 MCI0 write protect select
PAGE REFERENCE FUNCTION
6JP7
ADVREF input selection
VDDIOP0 or 5V selection for J1
A
REV DATA
REVISION HISTORY
DEFAULT NO POPULATE PARTS
Describe
1
SODIMM
HSMCI
2
8
CAN & ZIGBEE &USART1
PAGE
3
6
Block Diagram
AUDIO
4
5
DESCRIPTION
POWER SUPPLY
TABLE OF CONTENTS
NOTE
2011.11 ORIGINAL RELEASED
PIO MUXING
TEST POINT
PAGE REFERENCE FUNCTION
4 TP1, TP2 GND
JP2
(1) Resistance Unit: "K" is "Kohm", "R" is "Ohm
(2) "DNP" means the component is not populated
by default
9SmartDAA
10
11
12
13
14
HDMI
ETH
USB Interface
Miscellaneous
LCD&ISI
CLOSE
12
VDDIOP0 or 5V selection for J2
VDDIOP1 or 5V selection for J3
JP5 CLOSE Force power on function
SAMA5D35SAMA5D34
CAN0
CAN1
GMAC
EMAC
HSMCI2
LCDC
USART0
USART1
ISI
TC1
SAMA5D3x config
PIOA
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PIOA
PA16
PA17
PA18
PA21
PA20
PA19
PA24
PA23
PA22
PA27
PA26
PA25
PA30
PA29
PA28
PA31
PIOB
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB12
PB11
PB10
PB9
PB15
PB14
PB13
PB16
PB17
PB18
PIOB PIOC
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PIOC
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PIOD
PD0
PD1
PD2
PD3
PD6
PD5
PD4
PD7
PD10
PD9
PD8
PD11
PD14
PD13
PD12
PD15
PIOD
PD16
PD17
PD18
PD19
PD20
PD21
USAGE USAGE USAGE USAGE USAGE USAGE USAGE USAGE
4 TP3 5V
4 TP4 3V3
4 TP5 VDDIOP0
4 TP6 VDDIOP1
4 TP7 VDDIOM
JP8 CLOSE CAN1 diff termination select
7
JP9 Default boot on embedded ROM,Close boot on external memoryOPEN
LCDD11
LCDDISP
LCDPWM
LCDVSYNC
TWD0
LCDDEN
LCDPCK
LCDHSYNC
MCI1_CDA
TWCK0
E1_TX0
E1_TX1
E1_RX0
E1_RX1
E1_TXEN
E1_CRSDV
E1_RXER
E1_TXCK
E1_MDC
E1_MDIO
TK0
TF0
TD0
RK0
RF0
RD0
SPI1_MISO
SPI1_SPCK
SPI1_NPCS0
SPI1_MOSI
MCI0_CDA
MCI0_DA7
MCI0_CK ONE_WIRE
MCI0_CD
MCI1_CD
ADTRG
AD0_XP
AD1_XM
AD2_YP
AD3_YM
AD4_LR
EN5V_HDA
EN5V_HDB
EN5V_HDC
OVCUR_USB
VBUS_SENSE
PIOE
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
USAGE PIOE USAGE
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
PB_USER1
ZB_SLPTR
ZB_RST
ZB_IRQ1
ZB_IRQ0
PB19
PB21
PB22
PB23
PB24
PB26
PB25
PB27
PB29
PB28
PB30
PB20
PB31
MCI1_DA1
CTS1
RTS1
RXD1
TXD1
DRXD
DTXD
PE16
PE17
PE18
PE19
PE20
PE21
PE22
PE24
PE23
PE25
PE27
PE26
PE28
PE30
PE29
PE31
LCDD20
LCDD18
LCDD17
LCDD16
LCDD19
LCDD21
ISI_D11
ISI_D10
ISI_D9SPI1_NPCS3 ISI_D8
ISI_PCK
LCDD0
LCDD1
LCDD2
LCDD3
LCDD4
LCDD5
LCDD6
LCDD7
LCDD8
LCDD9
LCDD10
LCDD12
LCDD13
LCDD14
LCDD15 ISI_VSYNC
ISI_HSYNC PCK0(Audio,HDMI)CANRX0
CANTX0
MCI0_DA6
MCI0_DA5
MCI0_DA4
MCI0_DA3
MCI0_DA2
MCI0_DA1
MCI0_DA0
CANRX1
CANTX1
MCI1_DA3
MCI1_CK
MCI1_DA0
MCI1_DA2
ISI_D0
ISI_D1
ISI_D2
ISI_D3
ISI_D4
ISI_D5
ISI_D6
ISI_D7
LCDD23
TWD1
TWCK1 LCDD22
SAMA5D33
Segger-SAM3U
JP1514 OPEN JTAG Enabled,close to disable
HDMI_INT
PCK1(ISI_MCK) INT_ETH1
INT_AUDIO
PWR_MCI0
PWR_MCI1
PAGE REFERENCE FUNCTION
C89,C90,R118,R119,J26 Optional Audio Line out,mic in 7 R80,R81 Optional MIC level setting
6 R52, R53,R55,R56,R57,R82,JP10 Optional Zigbee
L38,L39,L40,L41 Optional HDMI EMI filter9 R89 HDMI chip I2C address setting
R266 Optional for I2S PCLK
R42 Optional for LCD PCLK
R79, R106,R107,R109,R113,R110,R112,R111,J9 Optional JTAG
SAM3U JTAG selectionR54
14
R58
R121 Optional for MCI0 Power supply mode
Optional for MCI1 Power supply mode
5
4 TP8 VDDANA
10 R162,R170,R171,R172,R176,R177,C122,C123, Optional for KSZ8041NL
3 R6,R51,R50,R120 Optional PD10,PD11,PD12,PD13 from MB
14 JP16 OPEN CDC Enabled,close to disable
R63 5V Option
12 R144 Optional pull up for DS28EC20P
RESET_HDMI
D11,D12 USB ESD protect option
R132,R133 Debug or USART1 option
JP17 OPEN Enable LCD for D31,D33,D34
CLOSE Disable LCD for D35
11
B 2012.03 SECOND RELEASED
C 2012.10 THIRD RELEASED
R186 Main 3V3 Optional for VCC_3V3_DEBUG
13 R127 Optional for ADC triger
ISI_RST
R230 Optional audio TK
SAMA5D31
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCDD0
JP9 for BMS Config:
When Open,BMS=1: Boot on embeded ROM
When Close,BMS=0: Boot on External memory
LCDD2
LCDD5
LCDD7
LCDD9
LCDD11
LCDD12
LCDD14
LCDD16
LCDD18 LCDD21
LCDD23
LCDD1
LCDD3
LCDD4
LCDD6
LCDD8
LCDD10
LCDD13
LCDD15
LCDD17
LCDD19LCDD20
LCDD22
LCDDISP
LCDHSYNC
LCDPCK
LCDPWM
LCDVSYNC
LCDDEN
TWCK0 ISI_HSYNCTWD0ISI_VSYNC
MCI0_D7
MCI0_D5
MCI0_D4
MCI0_D2
MCI0_D0 MCI0_D1
MCI0_D3
MCI0_D6
MCI0_CK
MCI0_CDA
MCI1_DA0
MCI1_DA2
MCI1_CDA
MCI1_DA1
MCI1_DA3
MCI1_CK RTS1
TXD1
CTS1
RXD1
CANTX0CANRX0
CANTX1CANRX1
SPI1_MISOSPI1_MOSI SPI1_SPCK
RFRD
TD
PCK0
TK
RK
TF
ISI_D1
ISI_D3
ISI_PCK
ISI_D5
ISI_D7
ISI_D9
ISI_D11
ISI_D2
ISI_D0
ISI_D4
ISI_D6
ISI_D8
ISI_D10
DRXD
DTXD
SPI1_NPCS3
MCI0_CD
MCI1_CD
ZB_IRQ0
ZB_IRQ1
ZB_RSTN
ZB_SLPTR
ONE_WIRE
TWCK1 TWD1
AD2_YP
AD0_XP AD1_XM
AD3_YM
HDMI_INT
PCK1(ISI_MCK)
VBUS_SENSE
EN5V_HDC
EN5V_HDA
OVCUR_USB
EN5V_HDB
AD4_LR
PB_USER1
INT_ETH1
E1_MDC
E1_RXER
E1_TXEN
E1_RX0
E1_TX0
E1_MDIO
E1_TXCK
E1_CRSDV
E1_RX1
E1_TX1
INT_AUDIO
PWR_MCI0 PWR_MCI1
RESET_HDMI
ISI_RST
PC19
PC10
PC28
PC4
PC11
PC20
PC5
PC12 PC27
PC13
PC21
PC14
PC26
PC15
PC22
PC25
PC24
PC23
PC0
PC1
PC2
PC16
PC3
PC31
PC17
PC30
PC6
PC8
PC18
PC29
PC7
PC9
PA19
PA10
PA28
PA4
PA11
PA20
PA5
PA12 PA27
PA13
PA21
PA14
PA26
PA15
PA22
PA25
PA24
PA23
PA0
PA1
PA2
PA16
PA3
PA31
PA17
PA30
PA6
PA8
PA18
PA29
PA7
PA9
PB25
PD14
PB19
PB26
PB20
PB27 PD13
PB28
PB29
PD12
PB30
PD11
PD10
PB10
PB12
PB14
PB31
PB15
PD31
PE23
PD19
PB21
PB23
PE24
PD15
PB22
PB24
PD5
PE23
PC0
PE24
PC2
PE25
PC4
PE26
PC25
PC8
PC23
PC16
PC21
PC18
PE27
PC10
PC29
PC12
PC27
PC14
PA0
PA30
PA2
PA28
PA5
PA27
PA7
PA25
PA23
PA11
PA21
PA12
PA18
PA14
PA16
PD30
PD28
PD6
PD14
PD22
PD8
PD20
PD26
PD24
PD3
PD1
PE29
PE30
PE31
PC24
PC22
PC20
PC19
PC17
PC9
PC7
PC5
PC3
PC1
PE28
PC11
PC13
PC15
PC26
PC28
PC30
PA1
PA3
PA4
PA6
PA8
PA10
PA13
PA15
PA17
PA19
PA20
PA22
PA26
PA29
PA31
PD31
PD29
PD27
PD23
PD21
PD19
PD17
PD15
PD9
PD7
PD4
PD2
PD0
PA9
PA24
PB14
PB19
PB21
PB23
PB24
PB15
PB20
PB22
PB27
PB29
PB31
PC6PC6
BMS
PD18
PD25
PD16
PB10 PB12
PB25
PE25
PE31
PE26
PE29
PE30
PC31
PB30
BMS
PB26
PB28
PD10
PD12 PD13
PD11
5V
5V
5V
5V 5V
VDDIOP0
3V3 3V3
VDDIOP0
VDDANA
VDDIOP1 VDDIOP1
VDDANA
VDDIOP0
VDDIOM VDDIOM
VDDIOP0
VDDIOP0 VDDIOP0
VDDIOP0
VDDIOP0 VDDIOP0
VDDIOP1
VDDIOM VDDIOM
PD4 5
USBB_DM
11 USBB_DP
11
USBA_DM
11 USBA_DP
11
USBC_DP
11 USBC_DM
11
TDO 14
TDI 14
TCK 14
TMS 14
RTCK 14
NTRST 14
NRST 10,12,14
WAKE UP 12
PA31 13,7,9
PA1 13,9
PA0
13,9 PA2
13,9
PA5
13,9 PA7
13,9 PA9
13,9 PA11
13,9 PA12
13,9 PA14
13,9 PA16
13 PA18
13
PA21
13 PA23
13
PA3 13,9
PA4 13,9
PA6 13,9
PA8 13,9
PA10 13,9
PA13 13,9
PA15 13,9
PA17 13
PA19 13
PA20 13
PA22 13
PA25
13 PA27
13,9 PA28
13,9
PA24 13
PA26 13,9
PA29 13,9
PA30
13,7,9
SHDN 4
VBAT 12,4
PD1
5PD3
5
PD6
5PD8
5
PD5
5PD2 5
PD0 5
PD7 5
PD9 5
PB24
5
PB19
5
PB23
5PB21
5PB20 5
PB22 5
PB29 6
PB27 6
PD15 6
PD14
6
PB14
13,6 PB15 13,6
PC23
13,6 PC24 13,6
PC22 13,6
PC18
7,9 PC16
7,9
PC21
7 PC20 7
PC17 7,9
PC19 7
PD30
7,9
PC26 13
PC28 13,6
PC30 13
PC27
13 PC29
13,9
ADVREF 12
PB31 14,6
PC0
10 PC2
10 PC4
10 PC6
10 PC8
10
PC1 10
PC3 10
PC5 10
PC7 10
PC9 10
PC10
13,9
PC12
13,9 PC14
13,9
PC11 13,9
PC13 13,9
PC15 13,9
PE28 13,6,9
PE27
12,13,9
PD17 5
PD18
5
PD26
11 PD27 11
PD25 11
PE31 13,6
PE30 10,13,6
PE29 13,6
PD16
7
PD28
11 PD29 11
PD20
13 PD22
13 PD24
13
PD21 13
PD23 13
PWR_EN
4CS_BOOT_DISABLE 12
PD31 13
PB10
5 PB12 5
PE25
12,13
PB30 14,6
DIBN 8
DIBP 8
PB28 6
PB26 6
ETH0_GND
10,3
ETH0_TX1-
10 ETH0_TX1+
10
ETH0_RX1-
10 ETH0_RX1+
10
ETH0_GND
10,3
ETH0_TX2-
10 ETH0_TX2+
10
ETH0_RX2-
10 ETH0_RX2+
10
ETH0_LED2
10 ETH0_LED1
10
PD19 13
PC31
9
PE24
13
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J2
MD2X20-H
J2
MD2X20-H
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R83
4.7k
R83
4.7k
JP2JP2
1
2
3
KEY
J12
1612618-1
KEY
J12
1612618-1
PC11 52
PC4
33 PC6
31
PC27
59 PC14
57
VCC3V3_1
41
PC13 54
PE28 50
PE27
49 NC1
47 Enable_2
45
PC10
51
Enable_1 40
PC1 38
GND1
5VCC5V_3
3VCC5V_1
1VCC5V_2 2
VCC5V_4 4
VBAT 6
Enable_0
39
VCC3V3_3
43 VCC3V3_4 44
Enable_3 46
ADVREF 48
VCC3V3_2 42
GND3
53
PC12
55 PC15 56
PC26 58
PC28 60
GND14 32
PE25
11 PE23
7
PE24
9
PC8
29
VDDIOM_1
15 PE26
13
PC25
17
PC23
19
PC21
21
GND2
23
PC18
25
PC16
27
PA24 94
PC31
63
VDDIOP0_1
65
PA0
67
PA2
69
GND4
71
PA6 74
PA7
75
PA9
77
PA11
79
PA12
81
PA14
83
PA16
85
GND5
89
PA21
91
PA23
93
PA25
95
PA27
97
PA31 102
VDDANA_2 104
PD30
105
PD28
109
PD26
111
PD24
113
PD22
115
PD20
117
PD16
121
PD14
123
GND7
125
PD10
129
PD8
131
PD6
133
PD3
137
PD1
139
VDDIOP1_1
141
GND8
143
PB14
147
PB21
151
PB23
153
PB24
155
PB26 166
PB28 168
PB30 164
DIBP 172
DIBN 174
USBA_DM
161 USBA_DP
159
GND10
163
USBB_DM
167 USBB_DP
165
GND11
169
USBC_DM
173 USBC_DP
171
GND12
195
ETH0_RX1+
181
ETH0_RX1-
183
PC7 30
PE29 8
PE30 10
PE31 12
GND13 14
VDDIOM_2 16
PC24 18
PC22 20
PC20 22
PC19 24
PC17 26
PC9 28
PC5 34
PC30 64
VDDIOP0_2 66
PA1 68
PA3 70
PA4 72
PA8 76
PA10 78
GND16 80
PA13 82
PA15 84
PA17 86
PA20 90
PA22 92
PA26 96
GND17 98
PA29 100
PA30
101
VDDANA_1
103
PD31 106
PD29 108
PD27 110
PD25 112
GND18 116
PD21 118
PD19 120
PD17 122
PD15 124
PD9 130
PD7 132
GND19 134
PD4 136
PD2 138
PD0 140
NC2 144
PB15 148
PB20 150
PB22 152
GND20 154
PB27 158
PB29 160
PB31 162
GND21 176
JTAGSEL 178
BMS 184
nRST 186
nTRST 188
TDI 190
TCK 192
TMS 194
TDO 196
RTCK 198
GND22 200
ETH0_TX1+
177
PC2
35 PC3 36
PC0
37
PC29
61 GND15 62
PA5
73
PA18
87 PA19 88
PA28
99
GND6
107
PD18
119
PD23 114
PD13 126
PD5
135
VDDIOP1_2 142
PB19
149
PB25 156
GND9 170
ETH0_RX2+
191
PD12
127 PD11 128
GND23
157
SHDN 182
WKUP 180
ETH0_TX1-
179
ETH0_RX2-
193
PB10
145
LED1
199
GND_ETH1
175
ETH0_TX2+
187
ETH0_TX2-
189
PB12 146
LED2
197
GND_ETH2
185
JP3JP3
1
2
3
J3
MD2X20-H
J3
MD2X20-H
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R6 22R DNPR6 22R DNP
JP9 SIP2JP9 SIP2
1 2
JP1JP1
1
2
3
R51 22RDNPR51 22RDNP
J1
MD2X20-H
J1
MD2X20-H
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
R120 22RDNPR120 22RDNP
R50 22R DNPR50 22R DNP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
5V/2A Input
FORCE
POWER
ON
VOUT =
0.8V x (Rtop + Rbottom)/Rbottom
ADHESIVE FEET
Place C22 near MN3.pin2
5V_INPUT
POWER_EN
PWR_EN#
PWR_EN
5V 5V
3V3 3V3
5V
3V3
5V
3V3
VDDIOP0
VDDIOP1
VDDIOM
3V3
VDDANA
SHDN3
VBAT 12,3
VDDISI 13
PWR_EN 3
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TP1TP1
J4
DC POWER JACK
J4
DC POWER JACK
1
2
3
R7
10k
R7
10k
Z6
Bumpon
Z6
Bumpon
C8
1u
C8
1u
Z8
Bumpon
Z8
Bumpon
Q1
Si1563EDH
Q1
Si1563EDH
1 32
456
TP3TP3
Z9
Bumpon
Z9
Bumpon
C4
100n
C4
100n
C6
10u
C6
10u C7
1u
C7
1u
TP8TP8
TP7TP7
R3
470R
R3
470R
C9
10u
C9
10u
Q6
IRLML2402
Q6
IRLML2402
1
3
2
R1
100k
R1
100k
R8
10k
R8
10k
TP4TP4
D2
Red
D2
Red
12
C5 10nC5 10n
Z7
Bumpon
Z7
Bumpon
R2 47kR2 47k
JP5
SIP2
JP5
SIP2
12
C57
100n
C57
100n
C3
100n
C3
100n
R25
10k
R25
10k
MN2
BNX002-01
MN2
BNX002-01
B
1
PSG
3CB 2
CG1 4
CG2 5
CG3 6
TP2TP2
MN1
ZEN056V230A16LS
MN1
ZEN056V230A16LS
1
2
3
C10
15p
C10
15p
R4
100k
R4
100k
C120
1u
C120
1u
TP6TP6
JP4
SIP2
JP4
SIP2
1 2
C1
100n
C1
100n
L1
220ohm at 100MHz
L1
220ohm at 100MHz
1 2
D1
BAT54CLT1G
D1
BAT54CLT1G
1
3
2
TP5TP5
MN3
RT9018B-18GSP
MN3
RT9018B-18GSP
PGOOD
1
EN
2
VIN
3
VDD
4NC 5
VOUT 6
ADJ 7
GND 8
EP
9
C22
1u
C22
1u
R5
15k
R5
15k
J5J5
Z17
Bumpon
Z17
Bumpon
+
C2
33u
+
C2
33u
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCI1
RR1,RR2 near SODIMM place
(MCI1_DA1)
(MCI1_DA0)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
(MCI1_CD)
MCI0
Micro SD
(MCI0_CD)
(MCI0_WP)
SD/MMCPlus CARD INTERFACE - MCI0
RR4,RR5,RR42 near SODIMM place
(MCI0_DA1)
(MCI0_DA0)
(MCI0_CK)
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
(MCI0_DA4)
(MCI0_DA5)
(MCI0_DA7)
(MCI0_DA6)
VDDIOP1 VDD_MCI1
VDD_MCI0 VDD_MCI0
VDDIOP1
VDD_MCI0
VDD_MCI1
VDDIOP1
VDDIOP1
PD2
3
PB21
3PB20
3
PB24
3
PB19
3PB23
3PB22
3
PD1
3
PD9
3
PD0
3PD4
3PD3
3
PD18
3
PD6
3PD7
3PD8
3
PD5
3
PD17
3
PB10 3
PB12 3
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Derek 30-Sep-12 X.X XX-XXX-XX
RR5 27RRR5 27R
1
2
3
4 5
6
7
8
R16
68k
R16
68k
R26
68k
R26
68k
R17
68k
R17
68k
R47
4.7k
R47
4.7k
RR42 27R
RR42 27R
1
2
3
4 5
6
7
8
RR2 27RRR2 27R
1
2
3
4 5
6
7
8
R10
68k
R10
68k
R58
0R
DNP
R58
0R
DNP
R36
68k
R36
68k
R18
68k
R18
68k
Q8
IRLML6402
Q8
IRLML6402
1
3 2
R49
10k
R49
10k
Q9
IRLML6402
Q9
IRLML6402
1
3 2
R11
68k
R11
68k
C93
10u
C93
10u
R12
68k
R12
68k
R38
68k
R38
68k
R13
68k
R13
68k
R39
68k
R39
68k
R9
10k
R9
10k
C12 100nC12 100n
R48
4.7k
R48
4.7k
R15
68k
R15
68k
JP6
SIP2
JP6
SIP2
1 2
R14
10k
R14
10k
RR1 27RRR1 27R
1
2
3
4 5
6
7
8
J7
7SDMM-B0-2211
J7
7SDMM-B0-2211
8
5
7
6
4
3
2
1
9
14
15
16
13
12
11
10
C40 10uC40 10u
SW1
SW2
J6
PJS008-2110-0
SW1
SW2
J6
PJS008-2110-0
8
5
7
6
4
3
2
1
9
13
12
11
10
14
RR3
10k
RR3
10k
1
2
3
4 5
6
7
8
RR4
27R
RR4
27R
1
2
3
4 5
6
7
8
R121
0R
DNP
R121
0R
DNP
C11
100n
C11
100n
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ZIGBEE INTERFACE
SPI1_NPCS3
SPI1_MISO SPI1_MOSI
SPI1_SPCK
CAN INTERFACE
CAN0
CAN1
CANTX0
CANRX0
CANTX1
CANRX1
ZB_RSTN
ZB_IRQ1 ZB_IRQ0
ZB_SLPTR
USART1
RTS1
TXD1
CTS1
RXD1
DRXD
DTXD
RTSC1
TXDC1
CTSC1
RXDC1
3V3
5V
3V3
5V
3V3
VDDIOP0
VDDIOP0
VDDIOP1
VDDIOP1
EARTH_RS232
VDDIOP1
VDDIOP1
PC22
13,3 PC28
13,3 PC23 13,3
PC24 13,3
PB14
13,3
PB15
13,3
PD14
3
PD15
3
PE28 13,3,9
PE29
13,3 PE30
10,13,3 PE31 13,3
PB27
3PB29
3
PB28
3PB26
3
PB31
14,3
PB30
14,3
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R52 0R
DNP
R52 0R
DNP
DNPDNPC26
2.2n
C26
2.2n
MN4
ADM3312EARU
MN4
ADM3312EARU
V+
1C2+ 2
VCC
3
C2- 4
EN
5
C1+ 6
T1IN
7
T2IN
8
T3IN
9
R1OUT
10
R2OUT
11
R3OUT
12 R3IN 13
R2IN 14
R1IN 15
T3OUT 16
T2OUT 17
T1OUT 18
SD
19
C1- 20
V-
21
C3- 22
GND
23
C3+ 24
R56 0R
DNP
R56 0R
DNP
J8J8
5
4
3
2
1
9
8
7
6
10
11
C25
15p
C25
15p
C15 100nC15 100n
C21
10u
C21
10u
R30 0RR30 0R
R19
120R
R19
120R
R53 0R
DNP
R53 0R
DNP
C20
100n
C20
100n
R24
47k
R24
47k
R133 0R
DNP
R133 0R
DNP
R34
120R
R34
120R
C23
100n
C23
100n
R31 0RR31 0R
J27
MJM0606GE06-H
J27
MJM0606GE06-H
1
2
3
4
5
6
C18 100nC18 100n
L5
220ohm at 100MHz
L5
220ohm at 100MHz
1 2
R57 0R
DNP
R57 0R
DNP
C19 100nC19 100n
R37 0RR37 0R
R23
47k
R23
47k
JP7
SIP2
JP7
SIP2
1 2 J18
MJM0606GE06-H
J18
MJM0606GE06-H
1
2
3
4
5
6
J10
BD10-H
J10
BD10-H
1 2
3 4
5 6
7 8
9 10
R35 10kR35 10k
R55 0R
DNP
R55 0R
DNP
JP10DNP
JP10DNP
12
R27 0RR27 0R
R29 0RR29 0R
C27
2.2u
C27
2.2u
MN5
SN65HVD234DR
MN5
SN65HVD234DR
RS
8
D
1
EN
5
R
4
CANH 7
CANL 6
VCC 3
GND 2
R40 10kR40 10k
R132 0R
DNP
R132 0R
DNP
R21 10kR21 10k
JP8
SIP2
JP8
SIP2
1 2
R28 0RR28 0R
C13
4.7u
C13
4.7u
R20 0RR20 0R
C16 100nC16 100n
R82 0R
DNP
R82 0R
DNP
R22
47k
R22
47k
MN6
SN65HVD234DR
MN6
SN65HVD234DR
RS
8
D
1
EN
5
R
4
CANH 7
CANL 6
VCC 3
GND 2
R33 0RR33 0R
R32 10kR32 10k
C17 100nC17 100n
C14
100n
C14
100n
C24
10u
C24
10u
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HEADPHONE
LINE IN
TWD0
TWCK0
PCK0
TK
RK
TF
RF
RD
TD
150mA capability
INT_AUDIO
MIC1
MIC
AUDIO_GND AUDIO_GND
AVDD1V8
AUDIO_GND AUDIO_GNDAUDIO_GND
AUDIO_GND
AUD_1V8 AVDD1V8
AUD_1V8
3V3
AUDIO_GND
3V3
AUDIO_GND
AUDIO_GND
AUDIO_GND
AUDIO_GNDAUDIO_GND
AUDIO_GND
AUD_1V83V3
AUDIO_GND
VDDIOP0
AUDIO_GND
AUDIO_GND
AUDIO_GND
PD30 3,9
PC17 3,9
PC20 3
PC16 3,9
PC18 3,9
PA30 13,3,9
PA31 13,3,9
PC21 3
PC19 3
PD16 3
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L4
220ohm at 100MHz
L4
220ohm at 100MHz
1 2
C140
4.7u
C140
4.7u
R84
20R
R84
20R
J15
STEREO_3.5mm
J15
STEREO_3.5mm
1
34
25
C143 4.7uC143 4.7u
C42
470p
C42
470p
R233 0RR233 0R
R232 0RR232 0R
C43
470p
C43
470p
R85
20R
R85
20R
C35
100n
C35
100n
R87
2K2
R87
2K2
R228 0RR228 0R
C36
2.2u
C36
2.2u
R231 0RR231 0R
L26
220ohm at 100MHz
L26
220ohm at 100MHz
1 2
R229 0RR229 0R
R122
1.5k
R122
1.5k
C138
10u
C138
10u
C145
100n
C145
100n R230 0RDNPR230 0RDNP
C135
100n
C135
100n
R178 0RR178 0R
R234 0RR234 0R
C139
100n
C139
100n
R86
2K2
R86
2K2
L27
220ohm at 100MHz
L27
220ohm at 100MHz
1 2
J26
MD1x5 DNP
J26
MD1x5 DNP
1
2
3
4
5
R227 33RR227 33R
L7
220ohm at 100MHz
L7
220ohm at 100MHz
1 2
MN7
SPX5205M5-L-1-8
MN7
SPX5205M5-L-1-8
VIN
1
GND
2
EN
3BYP 4
VOUT 5
R226 0RR226 0R
J13
STEREO_3.5mm
J13
STEREO_3.5mm
1
34
25
L6
220ohm at 100MHz
L6
220ohm at 100MHz
1 2
MN10
WM8904
MN10
WM8904
IRQ/GPIO1 1
SCLK 2
SDA 3
DBVDD 4
DGND
5
DCVDD 6
CPVDD 7
CPCA 8
CPGND
9
CPCB 10
CPVOUTP 11
CPVOUTN 12
HPOUTL
13
HPOUTFB
14
HPOUTR
15
LINEOUTL
16
LINEOUTFB
17 LINEOUTR
18
MICVDD 19
MICBIAS
20 VMIDC
21
AGND
22
AVDD 23
IN2R
24
IN1R/DMICDAT2
25
IN2L
26
IN1L/DMICDAT1
27
MCLK 28
BCLK/GPIO4 29
LRCLK 30
ADCDAT 31
DACDAT 32
PAD
33
C46 2.2uC46 2.2u
C30
4.7u
C30
4.7u
R119 20R
DNP
R119 20R
DNP
C37
100n
C37
100n
R80
47k
DNP
R80
47k
DNP
GND
OUT
MIC1
MP6027P
GND
OUT
MIC1
MP6027P
1
2
C62
470p
C62
470p
C45 2.2uC45 2.2u
R126 2K2R126 2K2
R81
47k
DNP
R81
47k
DNP
R123
1.5k
R123
1.5k
R118 20R
DNP
R118 20R
DNP C90 100n
DNP
C90 100n
DNP
C28 1uC28 1u
C61
470p
C61
470p
C137
10u
C137
10u
C76 1uC76 1u
C141
100n
C141
100n
C44
2.2u
C44
2.2u
C142
100n
C142
100n
C41
2.2u
C41
2.2u
C144
100n
C144
100n
L3
220ohm at 100MHz
L3
220ohm at 100MHz
1 2
C136 4.7uC136 4.7u
C33
4.7u
C33
4.7u
C29 1uC29 1u
C89 100n
DNP
C89 100n
DNP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RJ11
0R can be replaced by
bead to improve EMI
0805
0805
1% 1% 1% 1%
1206 1206 1206 1206
100V
1% 1%
1%
1206
R94,C68 should be placed near Pin6(RXI),
and should be no vias on the RXI Net.
DVDD
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND
DAA_GND DAA_GND
DIBN
3
DIBP
3
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MMBD3004S-7-FD5 MMBD3004S-7-FD5
1
3
2
R99 100RR99 100R
MMBAT42
Q5
MMBAT42
Q5
1
2 3
MMBD3004S-7-FD3 MMBD3004S-7-FD3
1
3
2
L9
220ohm at 100MHz
L9
220ohm at 100MHz
1 2
MMBAT42
Q3
MMBAT42
Q3
1
2 3
MMBAT42
Q2
MMBAT42
Q2
1
2 3
R100
3.01R
R100
3.01R
C69
10n
C69
10n
C73
100n
C73
100n R101
3.01R
R101
3.01R
C66
100n
C66
100n
R96
280R
R96
280R
R167 0RR167 0R
C68 47nC68 47n
C70
47pF
C70
47pF
C67 100nC67 100n
MMBAT42
Q4
MMBAT42
Q4
1
2 3
C64
470p
C64
470p
12
R102
110R
R102
110R
C63
470p
C63
470p
12
L8
220ohm at 100MHz
L8
220ohm at 100MHz
1 2
R92 6.81MR92 6.81M
R97
280R
R97
280R
C65
100n
C65
100n
LAN0066-50
TX1
LAN0066-50
TX1
1
2 3
4
J16
MJM0606GE06-H
J16
MJM0606GE06-H
1
2
3
4
5
6
MN11
CX20548-11Z
MN11
CX20548-11Z
RAC 4
TAC 5
EIC 11
RXI 6
EIO 10
EIF 9
TXO 8
TXF 7
GPIO 13
VC
3
EP
17
DVDD
1
DIBP
14
DIBN
16
PWR
15
AVDD
2
TEST
12
C71
150pF
C71
150pF
R95
280R
R95
280R R98
280R
R98
280R
R94
237K
R94
237K
R166 0RR166 0R
C74
100n
C74
100n
C72
150pF
C72
150pF
R93 6.81MR93 6.81M
R103
9R1
R103
9R1
D4
TB3100M-13-F
D4
TB3100M-13-F
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
To keep TMDS pair impedance maintain at 100 ohm ,
pls share common choke pad with shunted resistor
IO_SEL:
LOW=3.3V
,HIGH=1.8V
Close to SiI902x
LOW:72h(Defult)
HDMI Spec.
+4.8V < PVDD5 < +5.3V
Close to Chip
LCDDAT7
LCDDAT9
LCDDAT11
LCDDAT3
LCDDAT1
LCDDAT5
LCDDEN
LCDDAT22
LCDDAT16
LCDDAT18
LCDDAT20
LCDVSYNC
LCDDAT17
LCDDAT19
LCDDAT21
LCDPCK
LCDDAT23
LCDHSYNC
LCDDAT0
LCDDAT2
LCDDAT4
LCDDAT6
LCDDAT8
LCDDAT10
LCDDAT12
LCDDAT13
LCDDAT14
LCDDAT15
PCK0
BCLK
LRCLK
DAT
TWD0
TWCK0
HDMI_INT
Type A connector
RESET_HDMI
TX0-
TXC+
TXC-
TX1+
TX1-
TX0+
TX2+
TX2-
TXC+TXC+
TX0+TX0+
TX1+TX1+
TX2-TX2-TX2-TX2-
TX2+TX2+
TX1-TX1-TX1-TX1-
AVCC12
CLK_HDMI
TXC-TXC-
TX0-TX0-
HSYNC_HDMI
TSPDIFTSPDIFTSPDIFTSPDIFTSPDIFTSPDIF
HPD_SiI
TX_1-
TX_C+
TX_C-
TX_0-
TX_2+
TX_2-
TX_1+
TX_0+
RST#
EXT_SW TX_0+
TX_2+ TX2+TX2+
TX2-TX2-TX2-TX2-
TX0+TX0+
TX0-TX0-
TXC+TXC+
TX_1- TX1-TX1-TX1-TX1-
TX_C+
TX_1+ TX1+TX1+
TX_0-
TX_2-
TXC-TXC-TX_C-
TX0+TX0+
TXC+
TX0-
TXC+
TX0-
TXC- TXC-
TX2+TX2+
TX1+
TX2-
TX1-
TX2-
TX1-
TX1+
DE_HDMI
VSYNC_HDMI
BLUE0
RED7
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
RED0
RED1
RED2
RED3
RED4
RED5
RED6
IOVCC3V3
CVCC12
DDCSCL
DDCSDA
PVDD5
HPD
RST#
3V3
3V3
3V3
1V2
1V2
3V3 1V2
5V
3V3
3V3
PA1
13,3
PA3
13,3
PA5
13,3
PA7
13,3
PA9
13,3
PA11
13,3
PA29
13,3
PC14
13,3
PC12
13,3
PC10
13,3
PE27
12,13,3
PA26
13,3
PA0
13,3
PA2
13,3
PA4
13,3
PA6
13,3
PA8
13,3
PA10
13,3
PA12
13,3 PA13
13,3 PA14
13,3 PA15
13,3
PC13
13,3
PC11
13,3
PC15
13,3
PE28
13,3,6
PA27
13,3
PA28
13,3
PC31
3
PC16
3,7 PC17
3,7 PC18
3,7
PD30
3,7
PA30
13,3,7 PA31
13,3,7
PC29
13,3
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R42 1kDNPR42 1kDNP
L22
EBMS321611A520
L22
EBMS321611A520
1 2
F1
1812L160/12
F1
1812L160/12
1 2
C58
100n
C58
100n
RR29
22R
RR29
22R
1
2
3
4 5
6
7
8
R266 33R
DNP
R266 33R
DNP
R284 0RR284 0R
R272 0RR272 0R
MN12 RClamp0514MMN12 RClamp0514M
NC1 2
VCC 3
LINE3 4
NC2 5
LINE1 1
LINE4
6
NC4
7
GND
8
LINE2
9
NC3
10
R282 0RR282 0R
C59
100n
C59
100n
C48
100n
C48
100n
R104
2K2
R104
2K2
R184 10kR184 10k
L18
EBMS321611A520
L18
EBMS321611A520
1 2
C53
100n
C53
100n
C87
100n
C87
100n
L39 NCMS20C900DNP L39 NCMS20C900DNP
1
4 3
2
C55
100n
C55
100n
C51
1n
C51
1n
C84
100n
C84
100n
C60
100n
C60
100n
R164
47k
R164
47k
RR25
22R
RR25
22R
1
2
3
4 5
6
7
8
R285 0RR285 0R
C79
100n
C79
100n
R273 0RR273 0R
R90
4.7k
R90
4.7k
C56
100n
C56
100n
MN8
RT9013-12PB
MN8
RT9013-12PB
VIN
1
GND
2
EN
3BYP 4
VOUT 5
C81
10u
C81
10u
C49
1n
C49
1n
R105
2K2
R105
2K2
T2T2
R78 0RR78 0R
RR26
22R
RR26
22R
1
2
3
4 5
6
7
8
C80
100n
C80
100n
J25
HDM19SW-4-1R-H J25
HDM19SW-4-1R-H
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
G1 G2
G4G3
R270 33RR270 33R
R77 0RR77 0R
C85
10u
C85
10u
R88
4.7k
R88
4.7k
R260 22RR260 22R R76 0RR76 0R
MN9
SiI9022ACUN
MN9
SiI9022ACUN
D0
32
D1
31
D2
30
D3
29
D4
28
D5
27
D23
4
D6
25
D7
24
D8
23
D9
20
D10
19
D11
18
D12
17
D13
16
D14
15
D15
14
D16
13
D17
11
D18
10
D19
9
D20
8
D21
7
D22
6
CLK
22
VSYNC
35
HSYNC
34
DE
33
INT 52
HPD 54
SCL 1
SDA 2
EXT_SWING 56
IOVCC18_2 21
IOVCC18_1 3
TXC+ 59
TXC- 58
TX0+ 62
TX0- 61
TX1+ 65
TX1- 64
TX2+ 68
TX2- 67
SCLK
45
SPDIF
36
CVCC12_1 5
CVCC12_2 12
CVCC12_4 42
TMODE
55
MCLK
38
LRCLK
44
DDCSCL 49
DDCSDA 48
I2S0
41
I2S1
40
I2S2
39
I2S3
37
AGND_1 57
AVCC_2 66
AVCC_1 60
IOVCC18_3 46
CEC_D 50
CEC_A 71
CI2CA 72
VDDQ
70
AGND_2 63
IO_SEL 69
CVCC12_5 47
CVCC12_6 53
CGND 43
RESETN
51
CVCC12_3 26
ePAD
73
R75 0RR75 0R
C77
100n
C77
100n
C54
100n
C54
100n
D18
TVS
D18
TVS
R74 0RR74 0R
C83
10u
C83
10u
C52
1n
C52
1n
D17
TVS
D17
TVS
R73 0RR73 0R
R264 22RR264 22R
R72 0RR72 0R
RR27
22R
RR27
22R
1
2
3
4 5
6
7
8
D15
TVS
D15
TVS
R71 0RR71 0R
R91 2K2R91 2K2
L38
NCMS20C900
DNPL38
NCMS20C900
DNP
1
4 3
2
R265 4.3K/1%R265 4.3K/1%
MN13 RClamp0514MMN13 RClamp0514M
NC1 2
VCC 3
LINE3 4
NC2 5
LINE1 1
LINE4
6
NC4
7
GND
8
LINE2
9
NC3
10
L40
NCMS20C900
DNPL40
NCMS20C900
DNP
1
4 3
2
D7
RB160M-60
D7
RB160M-60
C86
10u
C86
10u
RR28
22R
RR28
22R
1
2
3
4 5
6
7
8
R89 4.7k
DNP
R89 4.7k
DNP
RR30
22R
RR30
22R
1
2
3
4 5
6
7
8
R41 1kR41 1k
C82
10u
C82
10u
RR24
22R
RR24
22R
1
2
3
4 5
6
7
8
C78
100n
C78
100n
L41 NCMS20C900DNP L41 NCMS20C900DNP
1
4 3
2
L19
EBMS321611A520
L19
EBMS321611A520
1 2
C50
1n
C50
1n
R108 0RR108 0R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ETH1
ETH0
10Base-T/100Base-TX/1000BASE-T
E1_TXCK
E1_RX1
E1_RX0
E1_CRSDV
E1_TX1
E1_TX0
E1_TXEN
E1_MDC
E1_MDIO
INT_ETH1
E1_RXER
At the De-Assertion of Reset:
PHY ADD[2:0]:001
CONFIG[2:0]:001,Mode:RMII
Duplex Mode:Half Duplex
Isolate Mode:Disable
Speed Mode:100Mbps
Nway Auto-Negotiation:Enable
10Base-T/100Base-TX
KSZ8041NL:R162,R170,R171,R 172,R176,R177,C122,C123 are n eeded.
KSZ8051NL:R162,R170,R171,R 172,R176,R177,C122,C123 are not needed.
ETH1_XI
ETH1_XO
EARTH_ETH1 GND_ETH1
VDDIOP0
VDDIOP1
VDDIOP0
VDDIOP0
VDDIOP0 GND_ETH1
E1_AVDDT
VDDIOP0
GND_ETH1
GND_ETH1
VDDIOP0
E1_AVDDT
EARTH_ETH0
EARTH_ETH0
ETH0_GND
ETH0_GND
ETH0_GND
ETH0_GND
ETH0_GND
VDDIOP0 EARTH_ETH1
EARTH_ETH1
ETH0_RX2-3 ETH0_RX2+
3
ETH0_RX1-3 ETH0_RX1+
3
ETH0_LED2
3
ETH0_LED1
3
ETH0_TX2+3 ETH0_TX2-
3
ETH0_TX1+3 ETH0_TX1-
3
PC0
3PC4
3
PC8
3PC9
3PE30
13,3,6
PC6
3PC5
3PC2
3PC3
3
PC7
3PC1
3
NRST
12,14,3
ETH0_GND
3
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L20
220ohm at 100MHz
L20
220ohm at 100MHz
1 2
2
1
6
3
5
4
8
7
1NF,2KV
1:1
75 OHM
T4/A T4/B
1:1
T3/A T3/B
75 OHM
1:1
T2/A T2/B
75 OHM
1:1
T1/A T1/B
75 OHM
TRD4+
TRCT4
TRD4-
TRD3+
TRCT3
TRD3-
TRD2+
TRCT2
TRD2-
TRD1+
TRCT1
TRD1-
TRP4+
TRP4-
TRP3-
TRP2+
TRP2-
TRP1+
TRP1-
TRP3+
(SHIELD)
YELLOW LED
GREEN LED
GREEN LED
J17
J0G-0003NL
2
1
6
3
5
4
8
7
1NF,2KV
1:1
75 OHM
T4/A T4/B
1:1
T3/A T3/B
75 OHM
1:1
T2/A T2/B
75 OHM
1:1
T1/A T1/B
75 OHM
TRD4+
TRCT4
TRD4-
TRD3+
TRCT3
TRD3-
TRD2+
TRCT2
TRD2-
TRD1+
TRCT1
TRD1-
TRP4+
TRP4-
TRP3-
TRP2+
TRP2-
TRP1+
TRP1-
TRP3+
(SHIELD)
YELLOW LED
GREEN LED
GREEN LED
J17
J0G-0003NL
5
6
4
2
1
3
7
9
8
12
14
11
13
10
15
16
17
18
19
RR20
10k
RR20
10k
1
2
3
4 5
6
7
8
R136 0RR136 0R
R175 0RR175 0R
L2
220ohm at 100MHz
L2
220ohm at 100MHz
1 2
R60 1kR60 1k
C91
22p
C91
22p
C100
10u
10V
C100
10u
10V
C88
22p
C88
22p
C126 100nC126 100n
R177 0R DNPR177 0R DNP
R59 1kR59 1k
RR21
10k
RR21
10k
1
2
3
4 5
6
7
8
C31
10u
C31
10u
Y2
25MHz
Y2
25MHz
1 3
24
C124 100nC124 100n
C32
100n
C32
100n
RR17
22R
RR17
22R
1
2
3
4 5
6
7
8
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J24
J00-0061NL
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J24
J00-0061NL
1
2
7
8
3
6
5
4
15
16
D8 GreenD8 Green
12
R165 470RR165 470R
C128 100nC128 100n
D9 YellowD9 Yellow
12
C118
100n
C118
100n
R168 470RR168 470R
RR18
22R
RR18
22R
1
2
3
4 5
6
7
8
C34
10u
C34
10u
L23
220ohm at 100MHz
L23
220ohm at 100MHz
1 2
R134 470RR134 470R
C123
100n
DNP
C123
100n
DNP
C129
100n
C129
100n
C38
100n
C38
100n
C122
100nDNP
C122
100nDNP
RR22
10k
RR22
10k
1
2
3
4 5
6
7
8
R135 470RR135 470R
R171
49.9R
DNP
R171
49.9R
DNP
R176 0R DNPR176 0R DNP
R162
49.9R
DNP
R162
49.9R
DNP
R173 6.49k/1%R173 6.49k/1%
RR19
22R
RR19
22R
1
2
3
4 5
6
7
8
C39 2.2uC39 2.2u R172
49.9R
DNP
R172
49.9R
DNP
C125 100nC125 100n
R170
49.9R
DNP
R170
49.9R
DNP
C127 100nC127 100n
MN20
KSZ8051RNL
MN20
KSZ8051RNL
REF_CLK/B-CAST_OFF
19
CONFIG1
29
CONFIG0
28
TXD1
25
TXD0
24
TXEN
23
PHYAD0
13
PHYAD1
14
RXD1/PHYAD2
15
RXD0/DUPLEX
16
CRS_DV/CONFIG2
18
RXER/ISO
20
MDC
12
MDIO
11
INTRP/NAND
21
VDDA_3V3
3
VDDIO
17
RESET
32
TXP 7
TXM 6
RXP 5
RXM 4
VDD_1V2 2
GND 1
PADDLE 33
NC1 22
NC2 26
NC3 27
REXT 10
XO 8
XI 9
LED0/NWAYEN 30
LED1/SPEED 31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
OVCUR_USB
OVCUR_USB
(VBUS_SENSE)
USB A HOST/DEVICE INTERFACE
(IDUSBA)
USB HOST B&C INTERFACE
EN5V_HDA
EN5V_HDB
EN5V_HDC
OPEN:Enable LCD for D31,D33,D34
CLOSE:Disable LCD for D35
PD28
PD28
EARTH_USB
5V
5V
3V3
EARTH_USB
EARTH_USB
EARTH_USB
3V3
3V3
3V3
3V3
USBC_DM 3
USBC_DP 3
PD28 3
PD29 3
USBA_DM 3
USBA_DP 3
5V_LCD13
USBB_DP 3
USBB_DM 3
PD26 3
PD27 3
EN_PWRLCD 13
PD25 3
LCD_DETECT# 13
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A
B
J19
Dual USB A
A
B
J19
Dual USB A
A1
A4
A2
A3
1 2
B1
B2
B3
B4
3 4
C101
100n
C101
100n
VBUS
SHD
DM
DP
ID
GND
J20
47589-0001
VBUS
SHD
DM
DP
ID
GND
J20
47589-0001
1
2
3
4
5
7
8
6
9
10
11
C105
100n
C105
100n
L15
220ohm at 100MHz
L15
220ohm at 100MHz
1 2
C107
100n
C107
100n
C109
100n
C109
100n
1A1Y
2A
GND
VCC
2Y
MN19
SN74LVC2GU04
1A1Y
2A
GND
VCC
2Y
MN19
SN74LVC2GU04
1
2
34
5
6
L21
220ohm at 100MHz
L21
220ohm at 100MHz
1 2
L14
220ohm at 100MHz
L14
220ohm at 100MHz
1 2
R140 47kR140 47k
MN15
AIC1526-1GS
MN15
AIC1526-1GS
ENA 1
FLGA 2
ENB 4
OUTA
8
GNG
6FLGB 3
IN
7
OUTB
5
R139
82k
R139
82k
R138 47kR138 47k
+
C106
33u
+
C106
33u
+
C103
33u
+
C103
33u
C108
100n
C108
100n
+
C104
33u
+
C104
33u
C111
15p
C111
15p
C97
100n
C97
100n
JP17
SIP2
JP17
SIP2
12
R163
47k
R163
47k
L12
220ohm at 100MHz
L12
220ohm at 100MHz
1 2
1A1Y
2A
GND
VCC
2Y
MN21
SN74LVC2GU04
1A1Y
2A
GND
VCC
2Y
MN21
SN74LVC2GU04
1
2
34
5
6
C75
10u
C75
10u
L13
220ohm at 100MHz
L13
220ohm at 100MHz
1 2
R137
47k
R137
47k
MN14
AIC1526-1GS
MN14
AIC1526-1GS
ENA 1
FLGA 2
ENB 4
OUTA
8
GNG
6FLGB 3
IN
7
OUTB
5
C102
100n
C102
100n
C99
100n
C99
100n
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
WAKE UP
NRST
PUSH BUTTON
ONE WIRE EEPROM
ONE_WIRE
3V
ANALOG Reference 3V
PB_USER1
PB_USER1
CS_BOOT
3V3
3V3
VDDANA 5V
NRST 10,14,3
WAKE UP 3
PE25
13,3
VBAT3,4
ADVREF
3
PE27 13,3,9
CS_BOOT_DISABLE 3
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JP14JP14
1
2
3
PB1PB1
PB2PB2
C112
100n
C112
100n
R142
1.5k
R142
1.5k
D6
LM4040BIM3-3.0+T
D6
LM4040BIM3-3.0+T
R144
1.5k
DNP
R144
1.5k
DNP
R143
1.5k
R143
1.5k
PB3PB3
MN16
DS28EC20P
MN16
DS28EC20P
I/O
2
GND
3
NC1 1
NC2 4
NC3 5
NC4 6
R141
100k
R141
100k
C113
2.2u
C113
2.2u
PB4PB4
R46 0RR46 0R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD
LCD/TSC
LCDDAT0
LCDDAT17
LCDDAT2
LCDDEN
LCDDAT4
LCDDAT7
LCDDAT19
LCDDAT9
LCDDAT21
LCDDAT11
LCDDAT12
LCDDAT22
LCDDAT14
LCDDISP LCDPWM
LCDDAT3
LCDDAT1
LCDPCK
LCDDAT5 LCDDAT6
LCDDAT8
LCDDAT10
LCDDAT13
LCDDAT15
LCDDAT16
LCDDAT18
LCDDAT20 LCDDAT23
LCDVSYNC
AD0_XP
AD2_YP
AD4_LR
AD1_XM
AD3_YM
SPI1_MISO SPI1_MOSI
SPI1_SPCK
ZB_IRQ0
SPI1_NPCS3
ZB_IRQ1
TWCK1(SPI1_NPCS2) TWD1(SPI1_NPCS1)
EN_PWRLCD
ONE_WIRE
ISI
ISI_D1
ISI_D3
ISI_D5
ISI_D7
ISI_D9
ISI_D11
ISI_D2
ISI_D0
ISI_D4
ISI_D6
ISI_D8
ISI_D10
PCK1(ISI_MCK)
ISI_VSYNC
ISI_HSYNC
ISI_PCK
LCDHSYNC
ZB_RSTNISI_RST
TWCK1 TWD1
5V_LCD
3V3
VDDIOP0
VDDIOP0
PE30 10,3,6
PE31
3,6 PC27
13,3
PA1
3,9 PA3
3,9 PA5
3,9 PA7
3,9 PA9
3,9 PA11
3,9
PC26 13,3
PA15 3,9
PA13 3,9
PA14 3,9
PA12 3,9
PA0 3,9
PA2 3,9
PA4 3,9
PA6 3,9
PA8 3,9
PA10 3,9
PC13 3,9
PC11 3,9
PC15 3,9
PE28 3,6,9
PA24 3
PA27 13,3,9
PA28 3,9
PD21 3
PD23 3
PE25 12,3
PC23 3,6
PC28 13,3,6
PC14
3,9
PC22
3,6 PC24
3,6
PC12
3,9 PC10
3,9 PE27
12,3,9
PA25
3PA26
3,9 PA29
3,9
PD20
3PD22
3PD24
3
EN_PWRLCD
11
5V_LCD
11
LCD_DETECT# 11
VDDISI
4
PA17
3PA19
3PA21
3PA23
3PC28
13,3,6 PC26
13,3
PD31 3
PA30 3,7,9
PA31 3,7,9
PC30 3
PA16 3
PA18 3
PA20 3
PA22 3
PC29 3,9
PC27 13,3
PB15 3,6
PB14
3,6
PE24
3 PE29 3,6
PC27
13,3 PC26 13,3
PA27 13,3,9
PD19
3
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Derek 30-Sep-12 X.X XX-XXX-XX
R158 0RR158 0R
RR23
22R
RR23
22R
1
2
3
4 5
6
7
8
R127 0R
DNP
R127 0R
DNP
R160 0RR160 0R R159 0RR159 0R
J21
ESW-115-33-L-D
J21
ESW-115-33-L-D
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
R150 0RR150 0R
R169 0RR169 0R
R153 0RR153 0R
R148 0RR148 0R
RR16
22R
RR16
22R
1
2
3
4 5
6
7
8
RR43DRR43D
4
5
R157 0RR157 0R
R174 0RR174 0R
RR12
22R
RR12
22R
1
2
3
4 5
6
7
8
J22
ESW-120-33-L-D
J22
ESW-120-33-L-D
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
RR43CRR43C
3
6
R151 0RR151 0R
R152 0RR152 0R
RR14
22R
RR14
22R
1
2
3
4 5
6
7
8
R154 0RR154 0R
J11
TSW-115-07-L-D
J11
TSW-115-07-L-D
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
R156 0RR156 0R
R146 0RR146 0R
RR43BRR43B
2
7
RR13
22R
RR13
22R
1
2
3
4 5
6
7
8
R124 1.5kR124 1.5k
RR15
22R
RR15
22R
1
2
3
4 5
6
7
8
RR11
22R
RR11
22R
1
2
3
4 5
6
7
8
RR43ARR43A
1
8
R149 0RR149 0R
R161 0RR161 0R
R155 0RR155 0R
R125
1.5k
R125
1.5k
R147 0RR147 0R
5
5
4
4
3
3
2
2
1
1
DD
CC
B B
AA
VDDOUT
DRXD
DTXD
VDDBU ADVREF
VDDPLL VDDCORE
VDDANA VDDIN VDDUTMI VDDIO VDDIO
JTAG Enabled,close to disable
ICE INTERFACE
RXDaux
TXDaux
CDC Enabled,close to disable
500mA capability
TDO_3U
TDIOUT
TCK_3U
TMSOUT
TMS_3U
TRSTIN
TCKOUT
TRSTOUT
TRESOUT
TRESIN
LED1_3U
TRESOUT
TDIIN
TX_3U
TMSIN
VDDOUT_3U
TCKOUT
TMSOUT
TDOIN
TDIOUT
TCKIN
ENSPI
VDDOUT_3U
TCKOUT
LED2_3U
RTCKIN
TRSTOUT
ERASE_3U
VDDOUT_3U
NRST_3U
ENSPI
TDI_3U
VDDOUT_3U
RX_3U
NTRST
DHSDM
XIN_3U
XOUT_3U
TRSTIN
TDIIN
TMSIN
TCKIN
TRESIN
TDI
RTCK
TDO
TMS
TCK
NTRST
NRST
TDI
TMS
TCK
TDOIN
RTCK
NRST
TDO
RTCKIN
TMS_3U
TCK_3U
NRST_3U
TDI_3U
TDO_3U
DHSDP
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VCC_3V3_DEBUG
VDDIOP0
VDDIOP0
VDDIOP0
EARTH_USB2
EARTH_USB2
VCC_3V3_DEBUG
VCC_3V3_DEBUG
5V VCC_3V3_DEBUG
VCC_3V3_DEBUG
VBUS_DEBUG
VBUS_DEBUG
3V3
VCC_3V3_DEBUG
PB30 3,6
PB31 3,6
NRST 10,12,3
NTRST 3
RTCK 3
TDI 3
TMS 3
TCK 3
TDO 3
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C156
100n
C156
100n
R1284.7k R1284.7k
R182 150RR182 150R
C166
100n
C166
100n
R630R/0805DNP R630R/0805DNP
C153
100n
C153
100n
C96
100n
C96
100n
R106
100k
DNP
R106
100k
DNP
R64 0RR64 0R
C154
100n
C154
100n
R45 0RR45 0R
R131 0RR131 0R
JP16JP16
12
C155
100n
C155
100n
R179 150RR179 150R
C163
100n
C163
100n
C117 10pC117 10p
R183 150RR183 150R
JP15JP15
12
R107
100k
DNP
R107
100k
DNP
J9
BR20-H
DNPJ9
BR20-H
DNP
1
23
45
67
8910 1112 13
15
17
19
14
16
18
20
C152
100n
C152
100n
R66 6.8k/1%R66 6.8k/1%
R109
100k
DNP
R109
100k
DNP
C121 15pC121 15p
D12
TVS DNP
D12
TVS DNP
R65 0RR65 0R
D11
TVS
DNP
D11
TVS
DNP
R110 0R
DNP
R110 0R
DNP
R54 0RDNPR54 0RDNP
MN18
SPX3819
MN18
SPX3819
VIN
1
GND
2
EN
3BYP 4
VOUT 5
C160
100n
C160
100n
T1T1
R181 150RR181 150R
R111
0R
DNP
R111
0R
DNP
T3T3
C98
100n
C98
100n
R44 0RR44 0R
C147
4.7u
C147
4.7u
R112 0R
DNP
R112 0R
DNP
C116 10nC116 10n
R1304.7k R1304.7k
C159
100n
C159
100n
J23
TC2050-IDC
J23
TC2050-IDC
VCC
1
TMS
2
GND1
3
TCK
4
GND2
5TDO 6
NC1 7
TDI 8
NC2 9
RESET 10
R43 100kR43 100k
T4T4
R62 0RR62 0R
C47
2.2u
C47
2.2u
R113 0R
DNP
R113 0R
DNP
C165
100n
C165
100n
R145
47k
R145
47k
R67 39RR67 39R
C158
100n
C158
100n
R61 0RR61 0R
R180 150RR180 150R
MN17
SAM3U_LQFP100
MN17
SAM3U_LQFP100
VDDANA
1
ADVREF
2
GNDANA
3
AD12BVREF
4
PA22/PGMD12 5
PA30 6
PB3 7
PB4 8
VDDCORE_3
9
PA13/PGMD5 10
GND2
61
PA15/PGMD7 12
PA16/PGMD8 13
PA17/PGMD9 14
PB16 15
PB15 16
PA18/PGMD10 17
PA19/PGMD11 18
PA20/PGMD12 19
PA21/PGMD13 20
PA23/PGMD15 21
XIN32
50
PA24 23
PA25 24
PA26 25
PA0/PGMNCMD 26
PA1/PGMRDY 27
PA2/PGMNOE 28
PA3/PGMNVALID 29
PA4/PGMM0 30
PA5/PGMM1 31
PA6/PGMM2 32
NRST
57
VDDCORE_4
34
GND1
35
VDDIO_3
36
VDDCORE_5
59
DFSDM
80
GND3
89
VDDUTMI
79
VDDIN
53
FWUP
42
ERASE
43
TEST
44
XIN
75
XOUT32
49
VDDIO_4
22
TDI
51
VDDOUT
52
PA12/PGMD4 41
TDO/TRACESWO
54
TMS/SWDIO
55 TCK/SWCLK
56
PA7/PGMM3 33
PB24 58
PA8/PGMD0 37
VDDIO_2
60
PA14/PGMD6 11
PB23 62
PB22 63
PB14 69
PB10 70
PB9 71
GNDPLL
72
PB8 100
PB7 99
PB6 98
PB13 95
PB12 94
PB11 93
PB2 92
PB1 91
PB0 90
PA10/PGMD2 39
VDDIO_1
88
VDDCORE_1
87
PA31 86
PA29 85
PA28 84
VDDCORE_2
83
GNDUTMI
82
DFSDP
81 DHSDM
77
DHSDP
76
NRSTB
47
XOUT
74
VDDPLL
73
PA11/PGMD3 40
PA9/PGMD1 38
PB20 65
PB19 66
PB18 67
PB17 68
PB5 97
PA27 96
PB21 64
VDDBU
45
GNDBU
46
VBG
78 JTAGSEL
48
R68 39RR68 39R
C161
100n
C161
100n
C146
4.7u
C146
4.7u
L24
220ohm at 100MHz
L24
220ohm at 100MHz
1 2
RR7 0R
RR7 0R
1
2
3
45
6
7
8
D14 GreenD14 Green
1
2
C94
10u
C94
10u
R70 1kR70 1k
Y4
12MHz
Y4
12MHz
1 3
2 4
C167
100n
C167
100n
C131
100n
C131
100n
C157
100n
C157
100n
C92100n C92100n
R1294.7k R1294.7k
D13 RedD13 Red
1
2
C119 15pC119 15p
C164
100n
C164
100n
JP18JP18
1
2
3
C95
10u
C95
10u
RR6 0R
RR6 0R
1
2
3
45
6
7
8
R69 1kR69 1k
C162
100n
C162
100n
R79
100k
DNP
R79
100k
DNP
SHD
J14
105017-0001
SHD
J14
105017-0001
1
2
3
4
5
7
8
6
9
10
11
116
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
6. Optional Display Module (DM) Board
6.1 DM Board Overview
The DM board integrates a 5.0” TFT LCD module with touchscreen, as well as four QTouch pads.
Figure 6- 1. DM Board
6.1.1 Equipment List
The DM board components are:
One 5.0” TFT LCD module
LCD back light driver
3.3V regulator
QTouch device
1-wire device
6.1.2 Function Blocks
6.1.2.1 3.3V Regulator
The 5-0_WVGA_R_AEA-DM Board features its own LDO for local power regulation. It accepts DC 5V power from 500
mA high-side power switch on EK and outputs a regulated +3.3V to most other circuits on the board.
Figure 6-2. DM Power Supply
500mA capability
SELCONFIG
5V_INTER 3V3_LCD
C13
100n
C12
10u
C11
100n
C15
2.2u
C10
10u
MN3
SPX3819
VIN
1
GND
2
EN
3BYP 4
VOUT 5
117
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
6.1.3 TFT LCD with Touch Panel
The 5-0_WVGA_R_AEA-DM features an LCD controller. The 5” 800x480 LCD provides the DM with a low-power LCD
display feature, backlight unit and a touch panel, similar to that used on commercial PDAs.
Graphics and text can be displayed on the dot matrix panel with up to 16 million colors by supplying 24-bit data signals
(8bit x RGB by default) or 16-bit data signals (5+6+5bit x RGB in option). This allows the user to develop graphical user
interfaces for a wide variety of applications.
Warning: Never connect/disconnect the LCD display from the board while the power supply is on. This can damage
both boards.
Figure 6-3. LCD with Touch Panel
B0
B1
B2
B3
B4
G0
G1
G2
G3
G4
G5
R0
R1
R2
R3
R4
GREEN7
BLUE4
LCDVSYNC
LCDDEN
LCDHSYNC
Y_LOW
X_RIGHT
LCDPCK
RED0
RED1
RED3
RED2
RED6
RED7
RED4
RED5
GREEN0
GREEN1
GREEN3
GREEN2
GREEN4
GREEN5
GREEN6
BLUE0
BLUE3
BLUE1
BLUE2
BLUE7
BLUE5
BLUE6
AD2_YP
AD1_XM
Y_UP
AD0_XP
X_LEFT
AD3_YM
LCDDISP
VLED+
VLED-
BLUE2
BLUE1
BLUE0
RED2
RED1
RED0
RED5 LCDDAT13
LCDDAT21
RED6 LCDDAT14
LCDDAT22
RED7 LCDDAT15
LCDDAT23
LCDDAT6
GREEN3 LCDDAT11
GREEN2 LCDDAT5
LCDDAT10
LCDDAT12GREEN4 LCDDAT7
RED3 LCDDAT11
LCDDAT13GREEN5 LCDDAT8
LCDDAT14
GREEN6 LCDDAT9
LCDDAT19
LCDDAT15
GREEN7 LCDDAT10
LCDDAT3 LCDDAT0
BLUE3
LCDDAT4BLUE4 LCDDAT1
LCDDAT5
BLUE5 LCDDAT2
LCDDAT6
BLUE6 LCDDAT3
LCDDAT7BLUE7 LCDDAT4
RED4 LCDDAT12
LCDDAT20
GREEN1
LCDDAT18
GREEN0
LCDDAT16
BLUE[0..7]
LCDDAT17
LCDDAT9
LCDDAT8
LCDDAT2
LCDDAT1
LCDDAT0
RED[0..7]
GREEN[0..7]
3V3_LCD
R10 0R DNP
R17 0R
R42 0R DNP
C3
10n
DNP
R20 0R
J1
GND2 2
VCC1 3
VCC2 4
R0 5
R1 6
R2 7
R3 8
R4 9
R5 10
R6 11
R7 12
G0 13
G1 14
G2 15
G3 16
G4 17
G5 18
G6 19
G7 20
B0 21
B1 22
B2 23
B3 24
B4 25
B5 26
B6 27
B7 28
GND3 29
DOTCLK 30
STB 31
HSYNC 32
VSYNC 33
DE 34
GND4 35
GND5 36
Y2 37
X2 38
Y1 39
X1 40
GND6 41
LED1- 42
LED1+ 43
LED2- 44
LED2+ 45
GND1 1
R32 0R
R33 0R
R26 0R DNP
R21 0R
R52 0R
R24 0R DNP
R3 0R
R50 0R
R25 0R
Conductors
on
TOP SIDE
PIN 1
PIN 45
FOXLINK
5'' LCD,
800(H)¡ÁRGB¡Á480(V)
M1
FL500WVR00-A0T
R1 0R
R53 0R
R11 0R DNP
R64
220K
DNP
R29 0R
R15 0R
R54 0R
R4 0R
R46 0R
R13 0R
C4
10n
DNP
C5
100n
R55 0R
R16 0R DNP
C6
10u
R36 0R
R12 0R DNP
R48 0R
R14 0R DNP
R38 0R
R7 27R
R27 0R
R30 0R DNP
R2 0R
R43 0R
C2
10n
DNP
R37 0R
R8 0R
R49 0R DNP
R9 0R
R47 0R DNP
R34 0R DNP
R44 0R DNP
C1
10n
DNP
R51 0R DNP
R18 0R
R28 0R DNP
R35 0R DNP
118
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
6.1.4 Backlight
The backlight voltage is generated from a CP2122ST/CP2123ST boost converter. It is powered directly by the 5V DC
from the EK board. The backlight level is controlled by a PWM signal generated from the SAMA5D3 series processor.
Figure 6-4. DM Back Light Control
6.1.5 QTouch
The 5-0_WVGA_R_AEA-DM board carries a QTouch device driven through a TWI interface. It manages four capacitive
touch buttons directly printed on the PCB.
There is dual footprint for the QTouch device. SOIC is the default mounted one.
Figure 6-5. DM QTouch
6.1.6 1-Wire
The 5-0_WVGA_R_AEA-DM board also uses a 1-wire device as a “soft label” to store the information such as chip type,
manufacture name, production date, etc.
Figure 6-6. DM 1-Wire
2*20mA, 24.5V
2 x 7 LEDs Back Light
300mV
50V
Am04/V5.42Am712/V5
60V/1A
880mA
10V
VLED-
VLED+
LCDPWM
5V_INTER
D1
RB160M-60
C7
10u
R41
7R5
L1
22uH
R40
10k
MN1
CP2122ST
SW 1
GND 2
FB 3
SHDN#
4VIN
5
C9
2.2u
CHANGE#
TWD0
KEY4
KEY3
KEY2
KEY1
TWCK0
RESET#
TWD0
RESET#
CHANGE#
TWCK0
3V3_LCD
3V3_LCD
3V3_LCD
C14
100n
MN5
QT1070_SOIC
VDD
1
MODE(VSS)
2
SDA
3
RESET
4
CHANGE
5
SCL
6
KEY6
7KEY5 8
KEY4 9
KEY3 10
KEY2 11
KEY1 12
KEY0 13
VSS 14
C16 100n
R57
4.7k
DNP
R62 4.7k DNP
K4
KEY
R59 4.7k DNP
MN4
QT1070
DNP
NC4
7
NC3
10
NC2
18
NC1
19
NC0
20
SDA
12
CHANGE
14
RESET
13
NC5
6
SCL
15
KEY4 1
KEY3 2
KEY2 3
KEY1 4
KEY0 5
VDD 9
MODE(VSS)
11 VSS
8
KEY6 16
KEY5 17
Thermal
21
R61 4.7k DNP
K2KEY
R56
4.7k
R58
4.7k
DNP
R68 4.7k
R65 4.7k
R66 4.7k
R67 4.7k
R60 4.7k DNP
R63
10k
K3
KEY
K1
KEY
ONE_WIRE
3V3_LCD
MN2
DS2433S
NC1
1
NC2
2
DATA
3
GND
4NC3 5
NC4 6
NC5 7
NC6 8
R45
4.7k
119
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
6.2 Schematics
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2*20mA, 24.5V
2 x 7 LEDs Back Light
300mV
50V
5V/217mA 24.5V/40mA
60V/1A
880mA
10V
500mA capability
B0
B1
B2
B3
B4
G0
G1
G2
G3
G4
G5
R0
R1
R2
R3
R4
ZB_ IRQ0
WϮϭϮϮŽƌ
WϮϭϮϯ^d
GREEN7
VLED-
VLED+
LCDPWM
BLUE4
LCDVSYNC
LCDDEN
LCDHSYNC
Y_L OW
X_RIGHT
LCDPCK
RED0
RED1
RED3
RED2
LCDDAT8
LCDDAT10
RED6
RED7
RED4
RED5
GREEN0
GREEN1
GREEN3 LCDDEN
GREEN2
GREEN4
GREEN5
GREEN6
BLUE0
BLUE3
BLUE1
BLUE2
BLUE7
BLUE5
BLUE6
AD0_XP
LCDDAT1
AD2_YP
LCDDAT21
LCDDAT19
LCDDAT17
LCDDAT23
AD4_LR
LCDDAT3
LCDDAT5
LCDDAT7
LCDDAT9
AD2_YP
AD1_XM
LCDDAT11
LCDHSYNC
LCDPWM
LCDPCK
LCDDAT16
LCDDAT18
LCDDAT20
LCDDAT22
AD3_YM
LCDDAT14
LCDDAT15
LCDDAT12
LCDDAT13
LCDDISP
AD1_XM
LCDDAT2
LCDDAT0
LCDDAT6
LCDDAT4
LCDVSYNC
SELCONFIG
Y_UP
AD0_XP
X_LEFT
AD3_YM
LCDDISP
VLED+
VLED-
LCD_DETECT
ONE_WIRE
BLUE2
BLUE1
BLUE0
RED2
RED1
RED0
RED5
LCDDAT13
LCDDAT21
RED6
LCDDAT14
LCDDAT22
RED7
LCDDAT15
LCDDAT23
LCDDAT6
GREEN3 LCDDAT11
GREEN2
LCDDAT5
LCDDAT10
LCDDAT12GREEN4
LCDDAT7
RED3
LCDDAT11
LCDDAT13GREEN5
LCDDAT8
LCDDAT14GREEN6
LCDDAT9
LCDDAT19
LCDDAT15GREEN7
LCDDAT10
LCDDAT3
LCDDAT0
BLUE3
LCDDAT4BLUE4
LCDDAT1
LCDDAT5BLUE5
LCDDAT2
LCDDAT6BLUE6
LCDDAT3
LCDDAT7BLUE7
LCDDAT4
RED4
LCDDAT12
LCDDAT20
GREEN1
LCDDAT18
GREEN0
LCDDAT16
BLUE[0..7 ]
LCDDAT17
LCDDAT9
LCDDAT8
LCDDAT2
LCDDAT1
LCDDAT0
RED[0..7]
GREEN[0..7]
ONE_WIRE
SELCONFIG
CHANGE#
TWC K0 TWD0
CHANGE#
TWD 0
KEY4
KEY3
KEY2
KEY1
TWC K0
RESET#
TWD 0
RESET#
CHANGE#
TWC K0
VLED+
5V_INTER
3V3_LCD
5V_INTER
3V3
5V_INTER 3V3_LCD 3V3_LCD
3V3_LCD
3V3_LCD
3V3_LCD
3V3_LCD
REV DATE
MODIF .
DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publ ication without our written authori zation shall expose offender to legal proceedings.
A
5.0_WVGA_R_AEA_DM
B
11
B
XX-XXX-XX
Derek X.X30-Mar-12
5.0_WVGA_R_AEA_DM
Derek 26-Sep-12 X.X XX-XXX-XX
REV DATE
MODIF .
DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publ ication without our written authori zation shall expose offender to legal proceedings.
A
5.0_WVGA_R_AEA_DM
B
11
B
XX-XXX-XX
Derek X.X30-Mar-12
5.0_WVGA_R_AEA_DM
Derek 26-Sep-12 X.X XX-XXX-XX
REV DATE
MODIF .
DES.
DATE
VER.
SCALE
1/1
REV. SHEET
This agreement is our property. Reproduction and publ ication without our written authori zation shall expose offender to legal proceedings.
A
5.0_WVGA_R_AEA_DM
B
11
B
XX-XXX-XX
Derek X.X30-Mar-12
5.0_WVGA_R_AEA_DM
Derek 26-Sep-12 X.X XX-XXX-XX
K1
KEY K1
KEY
K3
KEY K3
KEY
C10
10u
C10
10u
MN1
CP2123ST
MN1
CP2123ST
SW 1
GND 2
FB 3
SHDN#
4
VIN
6
OVP
5
R67 4.7kR67 4 .7k
R58
4.7k
DNP
R58
4.7k
DNP
L1
22uH
L1
22uH
C4
10n
DNP
C4
10n
DNP
R40
10k
R40
10k K4
KEY K4
KEY
MN5
QT1070_SOIC
MN5
QT1070_SOIC
VDD
1
MODE(VSS)
2
SDA
3
RESET
4
CHANGE
5
SCL
6
KEY6
7KEY5 8
KEY4 9
KEY3 10
KEY2 11
KEY1 12
KEY0 13
VSS 14
R56
4.7k
R56
4.7k
MN4
QT1070
DNP
MN4
QT1070
DNP
NC4
7
NC3
10
NC2
18
NC1
19
NC0
20
SDA
12
CHANGE
14
RESET
13
NC5
6
SCL
15
KEY4 1
KEY3 2
KEY2 3
KEY1 4
KEY0 5
VDD 9
MODE(VSS)
11
VSS
8
KEY6 16
KEY5 17
Thermal
21
MN2
DS2433S
MN2
DS2433S
NC1
1
NC2
2
DATA
3
GND
4NC3 5
NC4 6
NC5 7
NC6 8
R1 0RR1 0R
R62 4.7k DNPR62 4.7k DNP
R5 0R DNPR5 0R DNP
R44 0R DNPR4 4 0R DNP
R47 0R DNPR4 7 0R DNP
R60 4.7k DNPR60 4.7k DNP
R65 4.7kR65 4 .7k
R30 0R DNPR3 0 0R DNP
C15
2.2u
C15
2.2u
R12 0R DNPR1 2 0R DNP
R16 0R DNPR1 6 0R DNP
R55 0RR55 0R
C14
100n
C14
100n
R34 0R DNPR3 4 0R DNP
R45
4.7k
R45
4.7k
R43 0RR43 0R
R27 0RR27 0R
C5
100n
C5
100n
R15 0RR15 0R
R53 0RR53 0R
R24 0R DNPR2 4 0R DNP
R52 0RR52 0R
R42 0R DNPR4 2 0R DNP
R10 0R DNPR1 0 0R DNP
J2
TSM-115-01-L-DV-A
J2
TSM-115-01-L-DV-A
1 2
3 4
5 6
7 8
910
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
R36 0RR36 0R
R29 0RR29 0R
R64
13K
R64
13K
R11 0R DNPR1 1 0R DNP
R17 0RR17 0R
R63
10k
R63
10k
R37 0RR37 0R
R7 27RR7 27R
R20 0RR20 0R
R2 0RR2 0R
C11
100n
C11
100n
R41
7R5
R41
7R5
J3
TSM-120-01-L-DV-A
J3
TSM-120-01-L-DV-A
1 2
3 4
5 6
7 8
910
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
J1J1
GND2 2
VCC1 3
VCC2 4
R0 5
R1 6
R2 7
R3 8
R4 9
R5 10
R6 11
R7 12
G0 13
G1 14
G2 15
G3 16
G4 17
G5 18
G6 19
G7 20
B0 21
B1 22
B2 23
B3 24
B4 25
B5 26
B6 27
B7 28
GND3 29
DOTCLK 30
STB 31
HSYNC 32
VSYNC 33
DE 34
GND4 35
GND5 36
Y2 37
X2 38
Y1 39
X1 40
GND6 41
LED1- 42
LED1+ 43
LED2- 44
LED2+ 45
GND1 1
R66 4.7kR66 4 .7k
R19 0RR19 0R
R57
4.7k
DNP
R57
4.7k
DNP
R6 0R DNPR6 0R DNP
C3
10n
DNP
C3
10n
DNP
MN3
SPX3819
MN3
SPX3819
VIN
1
GND
2
EN
3BYP 4
VOUT 5
R18 0RR18 0R
C1
10n
DNP
C1
10n
DNP
C6
10u
C6
10u
R22 0RR22 0R
C2
10n
DNP
C2
10n
DNP
R68 4.7kR68 4 .7k
C13
100n
C13
100n
D1
RB160M-60
D1
RB160M-60
R61 4.7k DNPR61 4.7k DNP
R4 0RR4 0R
R59 4.7k DNPR59 4.7k DNP
C7
10u
C7
10u
Conductors
on
TOP SI DE
PIN 1
PIN 45
FOXLINK
5'' LCD,
800(H)×RGB×480(V)
M1
KD50G22-45TT-A5
Conductors
on
TOP SI DE
PIN 1
PIN 45
FOXLINK
5'' LCD,
800(H)×RGB×480(V)
M1
KD50G22-45TT-A5
R69 200kR69 200k
R35 0R DNPR3 5 0R DNP
R51 0R DNPR5 1 0R DNP
R9 0RR9 0R
R49 0R DNPR4 9 0R DNP
R8 0RR8 0R
R14 0R DNPR1 4 0R DNP
R13 0RR13 0R
R54 0RR54 0R
C12
10u
C12
10u
R28 0R DNPR2 8 0R DNP
R38 0RR38 0R
R48 0RR48 0R
R25 0RR25 0R
R3 0RR3 0R
R26 0R DNPR2 6 0R DNP
R33 0RR33 0R
R32 0RR32 0R
C9
2.2u
C9
2.2u
R23 0RR23 0R
K2KEY K2KEY
R46 0RR46 0R
R50 0RR50 0R
R21 0RR21 0R
C16 100nC16 100n
120
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
7. Troubleshooting and Recommendations
7.1 Errata
7.1.1 Impedance Mismatch on Revision C of the SAMA5D3x Main Board
There is an impedance mismatch on the revision C of the SAMA5D3x main board, impacting the clock signal of the
Ethernet PHY chip (MN20, KSZ8051RNL).This leads to a non-optimal data transmission on the ETH1 channel (J24), with
timeouts and retrials occurring from time to time.
Resolution: Add a line terminatio n on signal PC7.Connect PC7 to ground through a 200 Ohm resistor in series
with a 100pF ceramic capacitor. The connection point must be done at Pin 19 of Connector J2.
Figure 7-1 shows how and where to app ly the fix.
Figure 7-1. Fixing An Impedance Mismatch on the Revisio n C of th e SAMA5D3x Main Board
121
SAMA5D3x-EK User Guide [USER GUIDE]
11180B–ATARM–29-Oct-13
8. Revision History
Table 8-1. Revision History
Document Comments Change Request
Ref.
11180B
Changed document layout, including section nu mbering. Changed Embest to
Embest/Flextronics throughout document.
In “Introduction” and“Contents”: Added SAMA5D36, SAMA5D36-EK and
SAMA5D36-CM to lists of available references and to information for display
modules (DM). Also throughout document.
In Table 1-1 “Evaluation Kit Specifications ”, removed information on
temperature and relative hu mi d i ty. Added informa ti on on CE and FCC
compliancy. Added SAMA5D36-EK.
In Table 4-1 “CM Board Implementation”, updated boards available from
manufacturers.
In Table 4-2 “CPU Module Specifications”, removed ‘option al’ from details on
NOR in Memory row.
In Section 4.2.3 “Configuration Items”, removed “Dual ON/OFF switch for
NAND Flash” and replaced with “One jumper for”.
In Table 4-3 “Boot Options”, in row BMS OPEN: Added “...followed by:” after
“ROM Boot” and added SAM-BA after TWI in column Type. In column Note,
changed “Default boot on embedded ROM” to “Default boot is from embedded
ROM”. In row BMS CLOSE, changed “Boot on external NOR Flash memory”
to “Boot from external NOR Flash memory”.
Section 4.2.4.1 “Boot Configuration”: Revised throughout.
Section 4.3. 3 “Reset Circuitry” : Changed information on JTAG reset.
Section 4.3.6 “Se r i al Peri p h eral Interface Controller (SPI)”: Revised
throughout.
Section 4.3. 9 “In d ic at ors”: Removed specific information on red and blue
LEDs. Added information on control by GPIO lines.
Added Section 4.4.2 “CPU Module Revision E Schematics” .
Table 5-1 “MB Technical Specifications”, Mass Storage Interface: Updated
information on all types of cards supported.
- Added information on RoHS and CE and FCC co mpliancy.
- Removed temperature range information.
Section 5.2.3 “Debug JTAG/ICE and DBGU”: Modified detail s of A TSAM 3U4C.
Section 5.2.3.1 “Disabling J-Link-OB-ATSAM3U4C”: Revised throughout.
Section 5.2. 3. 2 “Ha r dw a re UA R T vi a C DC ”: Revised throughout.
Section 5.2.4 “U SAR T” : Revised throughout.
Section 5.2.6 “Ethernet 10/100 (EMAC) Port”: Revised throughout.
Section 5.2.10 “C AN Bu s”: Removed mention of two ports for connector J27.
Section 5.2. 14 “LED In di ca to rs”: Revised throughout.
Section 5.2. 15 “Pushbutton Switch e s ” : Changed fourth bullet.
Added Section 7.1 “Errata” with Section 7.1.1 “Impedance Mismatch on
Revision C of the SAMA5D3x Main Board”.
9364
9364
9363
9360
9363
9364
9363
9360
8803
11180A First issue
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