RH1011
1
Rev. F
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PACKAGE INFORMATION
BURN-IN CIRCUIT
ABSOLUTE MAXIMUM RATINGSDESCRIPTION
Voltage Comparator
The RH1011 is a general purpose comparator with sig-
nificantly better input characteristics than the LM111.
Although pin compatible with the LM111, it offers four
times lower bias current, six times lower offset voltage
and five times higher voltage gain.
The wafer lots are processed to Analog Devices’ in-house
Class S flow to yield circuits usable in stringent military
applications.
Supply Voltage (Pin 8 to Pin 4) .................................36V
Output to Negative Supply (Pin 7 to Pin 4) ...............35V
Ground to Negative Supply (Pin 1 to Pin 4) ..............30V
Differential Input Voltage ....................................... ±35V
Voltage at STROBE Pin (Pin 6 to Pin 8) ......................5V
Input Voltage (Note 1) .......................... Equal to Supplies
Output Short-Circuit Duration ...............................10 sec
Operating Temperature Range
(Note 2) .............................................55°C to 125°C
Storage Temperature Range ..................65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................... 300°C
All registered trademarks and trademarks are the property of their respective owners.
TOP VIEW
V+
BALANCE/
STROBE
GND
INPUT
OUTPUT
BALANCE
+
INPUT
V
8
7
6
5
2
1
4
H PACKAGE
8-LEAD TO-5 METAL CAN
+
3
1
2
3
4
8
7
6
5
TOP VIEW
GND
+INPUT
–INPUT
V
V+
OUTPUT
J8 PACKAGE
8-LEAD CERDIP
BALANCE/
STROBE
BALANCE
OBSOLETE PACKAGE
For Reference Only
TOP VIEW
W PACKAGE
10-LEAD CERPAC
1
2
3
4
5
10
9
8
7
6
GND
+
INPUT
INPUT
NC
V
V+
OUTPUT
NC
+
BALANCE/
STROBE
BALANCE
+
15V
15V
2
3
200Ω
1.3k 50k 50k
50k
4
1
8
7
5
+
15V
2V
–15V
RH1011 BI
3
2
100k
4
1
7
604Ω
8
RH1011
2
Rev. F
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SYMBOL PARAMETER CONDITIONS
NOTES
TA = 25°C SUB-
GROUP
–55°C ≤ TA ≤ 125°C SUB-
GROUP UNITSMIN TYP MAX MIN TYP MAX
VOS Input Offset Voltage
RS ≤ 50kΩ
3
4
1.5
2.0
1
1
3.0
3.0
2,3
2,3
mV
mV
IOS Input Offset Current 3,4 4 1 20 2,3 nA
IBInput Bias Current 3
4
50
65
1
1
80
80
2,3
2,3
nA
nA
∆VOS
∆T
Input Offset Voltage Drift TMIN ≤ T ≤ TMAX 5,9 25 µV/°C
AVOL Large Signal Voltage Gain VS = ±15V, RL = 1kΩ,
–10V ≤ VOUT ≤ 14.5V
200 4 V/mV
VS = 5V, RL = 500Ω,
0.5V ≤ VOUT ≤ 4.5V
50 4 V/mV
CMRR Common Mode Rejection
Ratio
90 1 dB
Input Voltage Range VS = ±15V
VS = Single 5V
8,9
8,9
–14.5
0.5
13
3.0
–14.5
0.5
13
3.0
V
V
tdResponse Time 6,9 250 ns
VOL Output Saturation Voltage VIN = –5mV, ISINK = 8mA
ISINK = 50mA
11 0.4
1.5
1
1
0.5
1.5
2,3
2,3
V
V
Output Leakage Current VIN = 5mV, VGND = –15V,
VOUT = 20V
10 1 500 2,3 nA
Positive Supply Current 11 4.0 1 mA
Negative Supply Current 11 2.5 1 mA
Strobe Current Minimum to Ensure Output
Transistor is Turned Off
7,9,11 500 µA
Input Capacitance 6 pF
(Preirradiation) (Note 10)
TABLE 1: ELECTRICAL CHARACTERISTICS
RH1011
3
Rev. F
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SYMBOL
PARAMETER CONDITIONS NOTES
10KRAD (Si) 20KRAD (Si) 50KRAD (Si) 100KRAD (Si) 200KRAD (Si)
UNITSMIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
VOS Input Offset Voltage 1.5 1.5 1.5 2.5 4 mV
IOS Input Offset Current 4 4 4 20 50 nA
IBInput Bias Current 50 100 150 200 300 nA
AVOL Large-Signal Voltage
Gain
RL = 1kΩ,
–10V≤VOUT≤14.5V
200 200 150 100 50 V/mV
CMRR Common Mode
Rejection Ratio
90 90 90 90 86 dB
Input Voltage Range VS = ±15V
VS = Single 5V
8,9 –14.5
0.5
13
3.0
–14.5
0.5
13
3.0
–14.5
0.5
13
3.0
–14.5
0.5
13
3.0
–14.5
0.5
13
3.0
V
V
VOL Output Saturation
Voltage
VIN = –5mV, ISINK = 8mA
ISINK = 50mA
11 0.4
1.5
0.4
1.5
0.4
1.5
0.4
1.5
0.4
1.5
V
V
Output Leakage Current VIN = 5mV, VGND = –15V
VOUT = 20V
10 10 100 100 100 nA
Positive Supply Current 11 4.0 4.0 4.0 4.0 4.0 mA
Negative Supply Current 11 2.5 2.5 2.5 2.5 2.5 mA
Strobe Current Minimum to Ensure Output
Transistor is Turned Off
7,9,11 500 500 500 500 500 µA
Input Capacitance 6 (Typ) 6 (Typ) 6 (Typ) 6 (Typ) 6 (Typ) pF
TABLE 1A: ELECTRICAL CHARACTERISTICS
(Postirradiation) (Note 10)
Note 1: Inputs may be clamped to supplies with diodes so that maximum
input voltage actually exceeds supply voltage by one diode drop. See Input
Protection discussion in the LT
®
1011 data sheet.
Note 2: TJMAX = 150°C.
Note 3: Output is sinking 1.5mA with VOUT = 0V.
Note 4: These specifications apply for all supply voltages from a single 5V
to ±15V, the entire input voltage range and for both high and low output
states. The high state is ISINK = 100µA, VOUT = (V+ – 1V) and the low
state is ISINK = 8mA, VOUT = 0.8V. Therefore, this specication defines a
worst-case error band that includes effects due to common mode signals,
voltage gain and output load.
Note 5: Drift is calculated by dividing the offset difference measured at
minimum and maximum temperatures by the temperature difference.
Note 6: Response time is measured with a 100mV step and 5mV
overdrive. The output load is a 500Ω resistor tied to 5V. Time
measurement is taken when the output crosses 1.4V.
Note 7: Do not short the STROBE pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low as
500µA will strobe the RH1011 if speed is not important. External leakage
on the STROBE pin in excess of 0.2µA when the strobe is “off” can cause
offset voltage shifts.
Note 8: See graph, Input Offset Voltage vs Common Mode Voltage on the
LT1011 data sheet.
Note 9: Guaranteed by design, characterization or correlation to other
tested parameters.
Note 10: VS = ±15V, VCM = 0V, RS = 0Ω, TA = 25°C, VGND = V, output at
Pin 7, unless otherwise noted.
Note 11: VGND = 0V.
RH1011
4
Rev. F
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TABLE 2: ELECTRICAL TEST REQUIREMENTS
TOTAL DOSE BIAS CIRCUIT
MIL-STD-883 TEST REQUIREMENTS SUBGROUP
Final Electrical Test Requirements (Method 5004) 1*,2,3,4
Group A Test Requirements (Method 5005) 1,2,3,4
Group B and D End Point Electrical Parameters
(Method 5005)
1,2,3
* PDA applies to subgroup 1. See PDA Test Notes.
PDA Test Notes
The PDA is specified as 5% based on failures from group A, subgroup1,
tests after cooldown as the final electrical test in accordance with method
5004 of MIL-STD-883 Class B. The verified failures (including Delta
parameters) of group A, subgroup 1, after burn-in divided by the total
number of devices submitted for burn-in in that lot shall be used to
determine the percent for the lot.
Analog Devices, Inc. reserves the right to test to tighter limits than those
given.
+
12V
5.1k
–12V
RH1011 TDBC
2
3
4
1
7
8
12Ω
12Ω
5.1k
RH1011
5
Rev. F
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Input Offset Voltage Input Offset Current
Input Bias Current
TOTAL DOSE KRAD (Si)
1
INPUT OFFSET VOLTAGE (mV)
8
6
4
2
0
2
4
6
10 100
1000
RH1011 G01
VS = ±15V
RS = 0Ω
VCM = 0V
(3 TYPICAL UNITS)
TOTAL DOSE KRAD (Si)
1
INPUT BIAS CURRENT (nA)
300
200
100
0
10 100
1000
RH1011 G02
VS = ±15V
VCM = 0V
TOTAL DOSE KRAD (Si)
1
INPUT OFFSET CURRENT (nA)
30
20
10
0
10
20
30
40
10 100
1000
RH1011 G03
VS = ±15V
VCM = 0V
Voltage Gain Common Mode Rejection Ratio
TOTAL DOSE KRAD (Si)
1
VOLTAGE GAIN (V/mV)
700
600
500
400
300
200
100
0
10 100
1000
RH1011 G04
VS = ±15V
RL = 1k
VCM = 0V
TOTAL DOSE KRAD (Si)
1
COMMON MODE REJECTION RATIO (dB)
130
120
110
100
90
80
70
60
10 100
1000
RH1011 G05
VS = ±15V
VCM = –14.5V TO 13V
TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
GND (PIN 1): Ground.
INPUT+ (PIN 2): Non-Inverting Input of Comparator
INPUT (PIN 3): Inverting Input of Comparator
V (PIN 4): Negative Supply Voltage
OUT (PIN 7): Open-Collector Output of Comparator
BALANCE (PIN 5): Balance Input. This input can be used
to adjust the input voltage offset or to add hysteresis. If
offset balancing or hysteresis is not used, the BALANCE
pins should be connected together with a 0.1µF capacitor.
BALANCE/STROBE (PIN 6): Strobe Input Pin. Using this
pin, the output transistor can be forced to an “off” state,
giving a hi output at the collector (Pin 7). This input can
be used to adjust the input voltage offset or used to add
hysteresis. If offset balancing or hysteresis is not used,
the BALANCE pins should be connected together with a
0.1µF capacitor.
V+ (PIN 8): Positive Supply Voltage
RH1011
6
Rev. F
ANALOG DEVICES, INC. 1989-2020
08/20
www.analog.com
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
E 02/19 Obsoleting J8 package and updating document to ADI format. All Pages
F 08/20 Adding Pin Functions. 5
(Revision history begins at Rev E)