M27C512-10C6E - STMicroelectronics

1/22Novemb er 200 4

M27C512

512 Kbit (64K x8) UV EPROM and OTP EPROM

FEATURES SUMMARY

■5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

■ACCESS TIME: 45ns

■LOW POWER “CMOS” CONSUMPTION:

– Active Current 30mA

– Standby Cur re nt 100µA

■PROGRAMM ING VOLT AGE: 12.75V ± 0.25V

■PROGRAMMING TIMES of AROUND 6sec.

■ELECTRONIC SIGNATURE

– Manufactu rer Code : 20h

– Device Code : 3Dh

■PACKAGES

– Lead-Free Versions

Figure 1. Packages

FDIP28W (F)

PDIP28 (B)

PLCC32 (C)

TSOP28 (N)

8 x 13.4 mm

M27C512

2/22

TABLE OF CONTENTS

FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 4. LCC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 5. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

DEVICE OPERATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Operating Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Electronic Signature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

System Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 6. Programming Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

PRESTO IIB Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Program Verify. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

ERASURE OPERATION (APPLIES FOR UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 5. AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 7. Testing Input Output Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 8. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 6. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 7. Read Mode DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 8. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 9. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 9. Read Mode AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 10. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 11. Margin Mode AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 10.Margin Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 12. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11.Programming and Verify Modes AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3/22

M27C512

PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 12.FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline. . . . . . . . . . . . 16

Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data . . . . 16

Figure 13.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline. . . . . . . . . . . . . . . . . . . . 17

Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . 17

Figure 14.PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . 18

Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data . . . . . . . . . . 18

Figure 15.TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline . . . . . . . . 19

Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data 19

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table 17. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 18. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

M27C512

4/22

SUMMARY D ESCRIPTION

The M27C512 is a 512 Kbit EPROM offered in the

two ranges UV (ultra violet erase) and OTP (one

time programmable). It is ideally suited for applica-

tions where fast turn-around and pattern experi-

mentation are important requirements and is

organized as 65536 by 8 bits.

The FDIP28W (window ceramic frit-seal package)

has transparent lid which allows the user to ex-

pose the chip to ultraviolet light to erase the bit pat-

tern. A new pattern can then be written to the

device by following the programming procedure.

For applications where the content is programmed

only one time and erasure is not required, the

M27C512 is offered in PDIP28, PLCC32 and

TSOP28 (8 x 13.4 mm) packages.

In addition to the standard versions, the packages

are also available in Lead-free versions, in compli-

ance with J EDEC Std J-STD-020B, the ST ECO-

PACK 7191395 Specification, and the RoHS

(Restriction of Hazardous Substances) directive.

Figure 2. Logic Diagram

Table 1. Signal Names

A0-A15 Address Inputs

Q0-Q7 Data Outputs

EChip Enable

GVPP Output En ab le / Prog ra m Sup pl y

VCC Supply Voltage

VSS Ground

NC Not Connected Internally

DU Don’t Use

AI00761B

Q0-Q7

VCC

M27C512

GVPP

VSS

A0-A15

5/22

M27C512

Figure 3. DIP Connections

Figure 4. LCC Connections

Figure 5. TSOP Connections

A13

A10

A14

A11

GVPP

Q5Q1

Q2 Q3VSS Q4

A12

A15 VCC

AI00762

M27C512

14 16

AI00763

A13

A10

A14

A15

A11

VCC

M27C512

A12

GVPP

VSS

A11 Q7

GVPP E

A13

A14

A12

A15

VCC

AI00764B

M27C512

VSS

A10

M27C512

6/22

DEVICE OPERAT ION

The modes of operations of the M27C512 are list-

ed in the Operating Modes table. A single power

supply is required in the read mode. All inputs are

TTL levels except for GVPP and 12V on A9 for

Electronic Signature.

Read Mode

The M27C512 has two control functions, both of

which must be logically active in order to obtain

data at the out puts. Chip Ena ble (E) is the power

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, indepen-

dent of device selection. Assuming that the ad-

dresses are stable, the address access time

(tAVQV) is equal to the delay from E to output

(tELQV). Data is avai lable at the output after a delay

of tGLQV from the fall ing edg e of G , ass umi ng that

E has been low and the addresses have been sta-

ble for at least tAVQV-tGLQV.

Standby Mode

The M27C512 has a standby mode which reduces

the active current from 30mA to 100µA The

M27C512 is placed in the standby mode by apply-

ing a CMOS high signal to the E input. When in the

standby mode, the outputs are in a high imped-

ance state, independent of the GVPP input.

Table 2. Operating Modes

Note: X = VIH or VIL, VID = 12V ± 0.5V.

Table 3. Electronic Signature

Two Line Output Control

Because EPROMs are usually used in larger

memory arrays, the product features a 2 line con-

trol function which accommodates the use of mul-

tiple memory connection. The two line control

function allows:

a. the lowest possible memory power

dissipation,

b. complete assurance that output bus

contention will not occur.

For the most efficient use of these two control

lines, E should be decoded and used as the prima-

ry device selecting function, while G should be

made a common connection to all devices in the

array and connected to the READ line from the

system control bus. This ensures that all deselect-

ed memory devices are in their low power standby

mode and that the output pins are only active

when data is required from a particular memory

device.

System Considerations

The power switching characteristics of Advanced

CMOS EPROMs require careful decoupling of the

devices. The supply current, ICC, has three seg-

ments that are of interest to the sy stem designer:

the standby current level, th e active current le vel,

and transient current peaks that are produced by

the falling and rising edges of E. The magnitude of

the transient current peaks is dependent on the

capacitive and inductive loading of the device at

the output. The associated transient voltage peaks

ca n be suppressed by complying with the two line

output control and by properly selected decoupling

capacitors. It is recommended that a 0.1µF ceram-

ic capacitor be used on every device between VCC

and VSS. T his s hou ld b e a high fr eq uen cy c apaci -

tor of low inherent inductance and should be

placed as close to the device as possible. In addi-

Mode E GVPP A9 Q7-Q0

Read VIL VIL X Data Out

Output Dis ab le VIL VIH XHi-Z

Program VIL Pulse VPP XData In

Program Inhibit VIH VPP XHi-Z

Standby VIH XXHi-Z

Electronic Signature VIL VIL VID Codes

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code VIL 00100000 20h

Device Code VIH 00111101 3Dh

7/22

M27C512

tion, a 4.7µ F bul k electrolytic capacitor s hould be

used betw een VCC a nd V SS for ev ery eight devi c-

es. The b u lk capacitor s hou ld be located n ear the

power supply connection point.The purpose of the

bulk capacitor is to overcome the voltage drop

caused by the inductive effects of PCB traces.

Figure 6. Programming Flowchart

Programming

When delivered (and after each erasure for UV

EPROM), all bits of the M27C512 are in the '1'

state. Data is introduced by selectively program-

ming '0's into the desired bit locations. Although

only '0's will be programmed, both '1's and '0's can

be present in the data word. The only way to

change a '0' to a '1' is by die exposure to ultraviolet

light (UV EPROM). The M27C512 is in the pro-

gramming m ode whe n VPP input i s at 12 .75V a nd

E is pulsed to VIL. The data to be programmed is

applied to 8 bits in parallel to the data output pins.

The levels required for the address and data in-

puts are TTL. VCC is specified to be 6.25V ±

0.25V. The M27C512 can use PRESTO IIB Pro-

gramming Algorithm that drastically reduces the

program min g tim e (ty pic all y less tha n 6 sec on ds) .

Nevertheles s to a chieve com patibi lity with all p ro-

gramming equipments, PRESTO Programming

Algorithm can be used as well.

PRESTO IIB Programming Algorithm

PRESTO IIB Programming Algorithm allows the

whole array to be progr ammed with a gu arante ed

margin, in a typical time of 6.5 seconds. This can

be achieved with STMicroelectronics M27C512

due to several design innovations described in the

M27C512 datasheet to improve programming effi-

ciency and to provide adequate margin for reliabil-

ity. Before starting the programming the internal

MARGIN MODE circuit is set in order to guarantee

that each cell is programmed with enough margin.

Then a sequence of 100µs program pulses are ap-

plied to each byte unti l a correc t verify occurs. No

overprogram pulses are applied since the verify in

MARGIN MODE provides the necessary margin.

Program Inhibit

Programming of multiple M27C512s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including GVPP of t he pa r-

allel M27C512 may be common. A TTL low level

pulse applied to a M27C512's E input, with VPP at

12.75V, will program that M27C512. A high level E

input inhibits the other M27C512s from being pro-

grammed.

Program Ve rify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly pr og ra m me d . T h e ver i f y i s ac co mp l ished with G

at VIL. Data should be ve rifi ed wit h tELQV after the

falling edge of E.

Electronic Signature

The Electronic Signature (ES) mode allows the

reading out of a binar y co de from an EP RO M that

will identify its manufacturer and type. This mode

is intend ed for us e by progr amming eq uipment to

aut oma tica lly m atc h th e dev ice t o be pr og ram med

with its corresponding programming algorithm.

The ES mode is functional in the 25° C ± 5°C am -

bient temperature range that is required when pro-

gramming the M27C512. To activate the ES

mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the

M27C512. Two identifier bytes may then be se-

quenced from the device outputs by toggling ad-

dress line A0 from VIL to VIH. All other address

lines mu st be he ld at VIL during El ectronic Signa -

ture mode . Byte 0 (A0 = VIL) represents the man -

ufacturer code and byte 1 (A0 = VIH) the device

identifier code. For the STMicroelectronics

M27C512, these two identifier bytes are given in

Table 3. and can be read-out on outputs Q7 to Q0.

AI00738B

n = 0

Last

Addr

VERIFY

E = 100µs Pulse

++n

= 25 ++ Addr

VCC = 6.25V, VPP = 12.75V

FAIL

CHECK ALL BYTES

1st: VCC = 6V

2nd: VCC = 4.2V

YES

SET MARGIN MODE

RESET MARGIN MODE

M27C512

8/22

ERASURE OPER ATION (APPLIES FOR UV EPROM)

The erasure characteristics of the M27C512 is

such that erasure begins when the cells are ex-

posed to light with wavelengths shorter than ap-

proximately 4000 Å. It should be noted that

sunlight and some type of fluorescent lamps have

wavelengt hs in the 3000 -4 000 Å ra nge .

Research shows that constant exposure to room

level fluorescent lighting could erase a typical

M27C512 in about 3 years, while it would take ap-

proximately 1 week to cause erasure when ex-

posed to direct sunlight. If the M27C512 is to be

exposed to these types of lighting conditions for

extended periods of time, it is suggested that

opaque labels be put over the M27C512 window to

prevent un intent ional e rasu re. The rec ommend ed

erasure procedure for the M27C512 is exposure to

short wave ultraviolet light which has wavelength

2537 Å. The integrated dose (i.e. UV intensity x

exposure time) for erasure should be a minimum

of 15 W-s ec/cm2. The erasure time with this dos-

age is approximately 15 to 20 minutes using an ul-

traviolet lamp with 12000 µW/cm2 power rating.

The M27C512 should be placed within 2.5 cm (1

inch) o f the lamp tubes duri ng the eras ure. Some

lamps hav e a fi lt er on th eir tub es whi ch sho ul d be

removed before erasure.

9/22

M27C512

MAXIMUM RATING

Stressing the device outside the ratings listed in

Table 4. may cause permanent damage to the de-

vice. Th ese are s tress r atings only, and oper ation

of the device at these, or any other conditions out-

side those indicated in the Operating sections of

this specification, is not implied. Exposure to Ab-

solute Maximum Rating conditions for extended

periods may affect de vice r eliability . Refer al so to

the STM icroelec tronics SURE P rogram and other

relevant quality documents.

Table 4. Absolute Maximum Ratings

Note: 1. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assermbly), the ST ECOPACK® 7191395 specification,

and the European directive on Res trictions on Haz ardous Substances (RoHS) 2002/95/EU.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC

voltage on Output is VCC +0.5V with possible over shoot to VCC +2V f or a period less than 20ns.

3. Depends on range.

Symbol Parameter Value Unit

TAAm bie nt Op era tin g Temperatur e (3) –40 to 125 °C

TBIAS Temperature Under Bias –50 to 125 °C

TSTG Storage Temperature –65 to 150 °C

TLEAD Lead Temperature during Soldering (note 1) °C

VIO (2) Input or Output Voltage (except A9) –2 to 7 V

VCC Supply Voltage –2 to 7 V

VA9 (2) A9 Voltage –2 to 13.5 V

VPP Program Supply Voltage –2 to 14 V

M27C512

10/22

DC AND AC PARA METERS

This section summarizes the operating and mea-

suremen t cond itions, and the D C and A C ch arac -

teristics of the device. The parameters in the DC

and AC Characteristic tables that follow are de-

rived from tests performed under the Measure-

ment Conditions summarized in the relevant

tables. De si gne rs s ho uld c heck tha t th e op er ati ng

conditio ns in their circ uit match the meas urement

conditions when relying on the quoted parame-

ters.

Table 5. AC Measurement Conditions

Figure 7. Testing Input Output Waveform Figure 8. AC Testing Load Circuit

Table 6. Capacitance

Note: 1. TA = 25°C, f = 1MHz

2. Sampled only, not 100% tested.

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns

Input Pulse Voltages 0 to 3V 0.4V to 2.4V

Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

AI01822

High Speed

1.5V

2.4V

Standard

0.4V

2.0V

0.8V

AI01823B

1.3V

OUT

CL = 30pF for High Speed

CL = 100pF for Standard

CL includes JIG capacitance

3.3kΩ

1N914

DEVICE

UNDER

TEST

Symbol P ara m ete r Test Cond itio n (1,2) Min Max Unit

CIN Input Capacitance VIN = 0V 6pF

COUT Output Ca pacitanc e VOUT = 0V 12 pF

11/22

M27C512

Table 7. Read Mode DC Characteristics

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

2. Maximum DC voltage on Output is VCC +0.5V.

Table 8. Read Mode AC Characteristics

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement conditions.

Symbol Parameter Test Condition (1) Min Max Unit

ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±10 µA

ILO Output Leakage Current 0V ≤ VOUT ≤ VCC ±10 µA

ICC Supply Current E = VIL, G = VIL,

IOUT = 0mA, f = 5MHz 30 mA

ICC1 Supply Current (Standby) TTL E = VIH 1mA

ICC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA

IPP Program Current VPP = VCC 10 µA

VIL Input Low Voltage –0.3 0.8 V

VIH (2) Input High Voltage 2 VCC + 1 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage TTL IOH = –1mA 3.6 V

Output High Voltage CMOS IOH = –100µA VCC – 0.7V V

Symbol Alt Parameter Test Condition (1)

M27C512

Unit

-45 (3) -60 -70 -80

MinMaxMinMaxMinMaxMinMax

tAVQV tACC Address Valid to

Output Valid E = VIL, G = VIL 45 60 70 80 ns

tELQV tCE Chip Enable Low to

Output Valid G = VIL 45 60 70 80 ns

tGLQV tOE Output Enable Low

to Output Valid E = VIL 25 30 35 40 ns

tEHQZ (2) tDF Chip Enable Hig h

to Output Hi-Z G = VIL 025025030030ns

tGHQZ (2) tDF Output Enable

High to Output Hi-Z E = VIL 025025030030ns

tAXQX tOH Address Transition

to Output Transition E = VIL, G = VIL 0000ns

M27C512

12/22

Table 9. Read Mode AC Characteristics

Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

Figure 9. Read Mode AC Waveforms

Symbol Alt Parameter Test Condition (1)

M27C512

Unit

-90 -10 -12 -15/-20/-25

MinMaxMinMaxMinMaxMinMax

tAVQV tACC Address Valid to

Output Valid E = VIL, G = VIL 90 100 120 150 ns

tELQV tCE Chip Enable Low to

Output Valid G = VIL 90 100 120 150 ns

tGLQV tOE Output Enable Low

to Output Valid E = VIL 40 40 50 60 ns

tEHQZ (2) tDF Chip Enable Hig h

to Output Hi-Z G = VIL 030030040050ns

tGHQZ (2) tDF Output Enable

High to Output Hi-Z E = VIL 030030040050ns

tAXQX tOH Address Transition

to Output Transition E = VIL, G = VIL 0000ns

AI00735B

tAXQX

tEHQZ

A0-A15

Q0-Q7

tAVQV

tGHQZ

tGLQV

tELQV

VALID

Hi-Z

VALID

13/22

M27C512

Table 10. Programming Mode DC Characteristics

Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or af ter VPP.

Symbol Parameter Test Condition (1,2) Min Max Unit

ILI Input Leakage Current VIL ≤ VIN ≤ VIH ±10 µA

ICC Supply Cu rre nt 50 mA

IPP Program Current E = VIL 50 mA

VIL Input Low Voltage –0.3 0.8 V

VIH Input High Volt age 2 VCC + 0.5 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output Hig h Voltage TTL IOH = –1mA 3.6 V

VID A9 Voltage 11.5 12.5 V

M27C512

14/22

Table 11. Margin Mode AC Characteristics

Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or af ter VPP.

Figure 10. Margin Mode AC Waveforms

Note: A8 High level = 5V; A9 High level = 12V .

Symbol Alt Parameter Test Cond itio n (1,2) Min Max Unit

tA9HVPH tAS9 VA9 High to VPP High 2µs

tVPHEL tVPS VPP High to Chip Enable Low 2µs

tA10HEH tAS10 VA10 High to Chip Enable High (Set) 1µs

tA10LEH tAS10 VA10 Low to Chip Enable High (Reset) 1µs

tEXA10X tAH10 Chip Enable Transition to V A10 Transition 1µs

tEXVPX tVPH Chip Enable Transition to VPP Transition 2µs

tVPXA9X tAH9 VPP Transition to VA9 Tran siti on 2µs

AI00736B

tA9HVPH tVPXA9X

GVPP

A10 Set

VCC

tVPHEL

tA10LEH

tEXVPX

tA10HEH

A10 Reset

tEXA10X

15/22

M27C512

Table 12. Programming Mode AC Characteristics

Note: 1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V

2. VCC must be applied simultaneously with or before VPP and removed simultaneously or af ter VPP.

3. Sampled only, not 100% tested.

Figure 11. Programming and Verify Modes AC Waveforms

Symbol Alt Param ete r Test Cond itio n (1,2) Min Max Unit

tAVEL tAS Add ress Valid to Chip Enable Low 2 µs

tQVEL tDS Input Valid to Chip Enable Low 2 µs

tVCHEL tVCS VCC High to Chip Enable Low 2µs

tVPHEL tOES VPP High to Chip Enable Low 2µs

tVPLVPH tPRT VPP Rise Time 50 ns

tELEH tPW Chip Enable Program Pulse Width (Initial) 95 105 µs

tEHQX tDH Chip Enable High to Input Transition 2 µs

tEHVPX tOEH Chip Enable High to VPP Transiti on 2µs

tVPLEL tVR VPP Low to Chip Enable Low 2µs

tELQV tDV Chip Enable Low to Output Valid 1 µs

tEHQZ (3) tDFP Chip Enable High to Output Hi-Z 0 130 ns

tEHAX tAH Chip Enable High to Address Transition 0 ns

AI00737

tVPLEL

PROGRAM

DATA IN

A0-A15

GVPP

Q0-Q7 DATA OUT

tAVEL

tQVEL

tVCHEL

tVPHEL

tEHQX

tEHVPX

tELEH

tELQV

tEHAX

tEHQZ

VERIFY

VALID

VCC

M27C512

16/22

PACKAGE MECHANICAL

Figure 12. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline

Note: Drawing is not to scale.

Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data

Symbol millimeters inches

Typ Min Max Typ Min Max

A 5.72 0.225

A1 0.51 1.40 0.020 0.055

A2 3.91 4.57 0.154 0.180

A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022

B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012

D 36.50 37.34 1.437 1.470

D233.02– –1.300– –

E 15.24 – – 0.600 – –

E1 13.06 13.36 0.514 0.526

e 2.54 – – 0.100 – –

eA 14.99 – – 0.590 – –

eB 16.18 18.03 0.637 0.710

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098

∅7.11 – – 0.280 – –

α4° 11° 4° 11°

N28 28

FDIPW-a

B1 B e

E1 E

∅

17/22

M27C512

Figure 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline

Note: Drawing is not to scale.

Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data

Symbol millimeters inches

Typ Min Max Typ Min Max

A 4.445 0.1750

A1 0.630 0.0248

A2 3.810 3.050 4.570 0.1500 0.1201 0.1799

B 0.450 0.0177

B1 1.270 0.0500

C 0.230 0.310 0.0091 0.0122

D 36.830 36.580 37.080 1.4500 1.4402 1.4598

D2 33.020 – – 1.3000 – –

E 15.240 0.6000

E1 13.720 12.700 14.480 0.5402 0.5000 0.5701

e1 2.540 – – 0.1000 – –

eA 15.000 14.800 15.200 0.5906 0.5827 0.5984

eB 15.200 16.680 0.5984 0.6567

L 3.300 0.1299

S 1.78 2.08 0.070 0.082

α0° 10° 0° 10°

N28 28

PDIP

B1 B e1

E1 E

M27C512

18/22

Figure 14. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline

Note: Drawing is not to scale.

Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symbol millimeters inches

Typ Min Max Typ Min Max

A 3.18 3.56 0.125 0.140

A1 1.53 2.41 0.060 0.095

A2 0.38 – 0.015 –

B 0.33 0.53 0.013 0.021

B1 0.66 0.81 0.026 0.032

CP 0.10 0.004

D 12.32 12.57 0.485 0.495

D1 11.35 11.51 0.447 0.453

D2 4.78 5.66 0.188 0.223

D3 7.62 – – 0.300 – –

E 14.86 15.11 0.585 0.595

E1 13.89 14.05 0.547 0.553

E2 6.05 6.93 0.238 0.273

E310.16– –0.400– –

e 1.27 – – 0.050 – –

F 0.00 0.13 0.000 0.005

R 0.89 – – 0.035 – –

N32 32

PLCC-A

E3 E1 E

1 N

0.51 (.020)

1.14 (.045)

D2 D2

19/22

M27C512

Figure 15. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline

Note: Drawing is not to scale

Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data

millimeters inches

Symbol Typ Min Max Typ Min Max

A 1.250 0.0492

A1 0.200 0.0079

A2 0.950 1.150 0.0374 0.0453

B 0.170 0.270 0.0067 0.0106

C 0.100 0.210 0.0039 0.0083

CP 0.100 0.0039

D 13.200 13.600 0.5197 0.5354

D1 11.700 11.900 0.4606 0.4685

e 0.550 – – 0.0217 – –

E 7.900 8.100 0.3110 0.3189

L 0.500 0.700 0.0197 0.0276

α0° 5° 0° 5°

N28 28

TSOP-a

N/2

DIE

LA1 α

M27C512

20/22

PART NUMBERING

Table 17. Ordering Information Scheme

Note: 1. High Speed, see AC Charact eristics section for furthe r information.

For a list of available options (speed, package,

etc.) or for further information on any aspect of this device, please c ontact yo ur neare st ST Sal es Of-

fice.

Example: M27C512 -70 X C 1 TR

Device Type

M27

Supply Voltage

C = 5V

Device Function

512 = 512 Kbit (64Kb x8)

Speed

-45 (1) = 45 ns

-60 = 60 ns

-70 = 70 ns

-80 = 80 ns

-90 = 90 ns

-10 = 100 ns

-12 = 120 ns

-15 = 150 ns

-20 = 200 ns

-25 = 250 ns

VCC Tolerance

blank = ± 10%

X = ± 5%

Package

F = FDIP28W

B = PDIP28

C = PLCC32

N = TSOP28: 8 x 13.4 mm

Temperature Range

1 = 0 to 70 °C

3 = –40 to 125 °C

6 = –40 to 85 °C

Options

Blank = Standard Packing

TR = Tape and Reel Packing

E = Lead-free and RoHS Package, Standard Packing

F = Lead-free and RoHS Package, Tape and Reel Packing

21/22

M27C512

REVISION HISTORY

Table 18. Revision History

Date Version Revision Details

November 1998 1.0 First Issue

25-Sep-2000 1.1 AN620 Reference removed

02-Apr-2001 1.2 FDIP28W mechanical dimensions changed (Table 13.)

29-Aug-2002 1.3 Package mechanical data clarified for PDIP28 (Table 14.),

PLCC32 (Table 15., Figure 14.) and TSOP28 (Table 16., Figure 15.)

08-Nov-2004 2.0 Details of ECOPACK lead-free package options added.

Additional Burn-in option removed

M27C512

22/22

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