ACT-SF2816 High Speed 128Kx16 SRAM / 512Kx16 FLASH Multichip Module (\EROFLEX CIRCUIT TECHNOLOGY FEATURES www.aeroflex.com mg 2-128K x 8 SRAMs & 2 512K x 8 Flash Die in m Packaging Hermetic Ceramic One MCM e 66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder, m Access Times of 25ns (SRAM) and 60ns (Flash) Aeroflex code# 'P3 e 66 Pin, 1.08 x 1.08" x .185" PGA Type, With or 35ns (SRAM) and 70 or 90ns (Flash) Shoulder. Aeroflex code# "P7" yp mw Organized as 128K x 16 of SRAM and 512K x 16 e 68 Lead, .94" x .94 x .140" Single-Cavity Small of Flash Memory with Separate Data Buses Outline Gull Wing, Aeroflex code# "F18" (Drops into = Both Blocks of Memory are User Configurable as the 68 Lead JEDEC .99"SQ CQFJ footprint) 512KX8 AND 1MX8 Respectively m DESC SMD - TBD m= Low Power CMOS FLASH MEMORY FEATURES g Input and Output TTL Compatible Design = Sector Architecture (Each Die) gs MIL-PRF-38534 Compliant MCMs Available e 8 Equal Sectors of 64K bytes each = Decoupling Capacitors and Multiple Grounds for e Any combination of sectors can be erased with one Low Noise command sequence gw +5V Programing, +5V Supply m= Embedded Erase and Program Algorithms m= Hardware and Software Write Protection g Internal Program Control Time. = 10,000 Erase / Program Cycles g Industrial and Military Temperature Ranges g Industry Standard Pinouts Note: Programming information available upon request Block Diagram PGA Type Packages (P3 & P7) & CQFP (F18) Pin Description SWE1 SCE1 SWE2 SCE2 FWE1 FCE1 FWE2 FCE2 FI/O0-15 Flash Data I/O OE sl/00-15| SRAM Data I/O AO-A18 | | | Ao-18 Address Inputs p 128Kx8 128Kx8 512Kx8 512Kx8 FWE1-2 | Flash Write Enables SRAM SRAM Flash Flash SWE1-2 |SRAM Write Enables 8 8 8 8 FCE1-2 | Flash Chip Enables SCE1-2 | SRAM Chip Enables Sl/O0-7 SI/08-15 FI/O0-7 FI/O8-15 OE Output Enable NC Not Connected Vcc Power Supply GND Ground A\eroflex Circuit Technology - Advanced Multichip Modules SCD3853 REV A 5/19/98Absolute Maximum Ratings Symbol Rating Range Units Te Operating Temperature -55to+125] C Tsta Storage Temperature -65 to +150} C Ve Maximum Signal Voltage to Ground -0.5 to +7 Vv TL Maximum Lead Temperature (10 seconds) 300 C Parameter Flash Data Retention 10 Years Flash Endurance (Write/Erase Cycles) 10,000 Normal Operating Conditions Symbol Parameter Minimum Maximum Units Vec Power Supply Voltage +4.5 +5.5 V Vin Input High Voltage +2.2 Voc + 0.3 V Vit Input Low Voltage -0.5 +0.8 V Capacitance (Vix = OV, f = 1MHz, Tg = 25C) Symbol |Parameter Maximum Units Cap Ao - Ais Capacitance 50 pF Coe OE Capacitance 50 pF Cwet,2 F/S Write Enable Capacitance 20 pF Cce1,2 F/S Chip Enable Capacitance 20 pF Cilo I/Oo 1/015 Capacitance 20 pF These parameters are guaranteed by design but not tested DC Characteristics (Vcc = 5.0V, Vss = OV, Tc = -55C to +125C, unless otherwise indicated) Parameter Sym Conditions Min Max | Units Input Leakage Current lit | Voc = Max, Vin = 0 to Veo 10 | PA Output Leakage Current lLo Vos to ve OE = Vin, 10 | pA SRM Operating Supply Current x 16 loox16 hoe Fee at f = 5MHZz, Vcc = 250] mA Standby Current Isp Ven _ vee = Vin, OE = Vin, f= 5MHz, 40 | mA SRAM Output Low Voltage Vor [lop =8 MA, Veo = Min, FCE = Viy 0.4) V SRAM Output High Voltage Vou |loy =-4.0 mA, , Voc = Min, FCE = Vy 2.4 Vv Flash Vcc Active Current for Read (1)|/ !cc1 | FCE = Vy, OE = Viy, SCE = Vin 130} mA erase) Current for Program loco |FCE=V,, OF = Vy, SCE= Vy 450| mA Flash Output Low Voltage VoL |lop = 8 MA, Voc = Min, SCE = Viy 0.45) V Flash Output High Voltage Vou |loy =-2.5 mA, , Voc = Min, SCE =Vy, =| 0.85 x Voc Vv Flash Low Vcc Lock Out Voltage ViKo 3.2 V Notes: 1) The Icc current listed includes both the DC operating current and the frequency dependent component (at SMHz). The frequency component typically is less than 2mA/MHz, with OE at VIH 2) Icc active while Embedded Algorithim (program or erase) is in progress 3) DC test conditions: VIL = 0.3V, VIH = Vcc - 0.3V Aeroflex Circuit Technology 2 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700SRAM AC Characteristics (Vcc = 5.0V, Vss= OV, To= -55C to +125C) Read Cycle Parameter Symbol Min mex Min mex Units Read Cycle Time tre 25 35 ns Address Access Time taa 25 35 ns Chip Select Access Time tace 25 35 ns Output Hold from Address Change tou ) 0 ns Output Enable to Output Valid tor 15 20 ns Chip Select to Output in Low Z * teLz ns Output Enable to Output in Low Z * toLz ns Chip Deselect to Output in High Z * tenz 12 20 ns Output Disable to Output in High Z * touz 12 20 ns * Parameters guaranteed by design but not tested Write Cycle 025 035 Parameter Symbol Min Max Min Max Units Write Cycle Time twe 25 35 ns Chip Select to End of Write tow 20 25 ns Address Valid to End of Write taw 20 25 ns Data Valid to End of Write tow 15 20 ns Write Pulse Width twe 20 25 ns Address Setup Time tas ns Output Active from End of Write * tow ns Write to Output in High Z * twuz 10 20 ns Data Hold from Write Time toy ns Address Hold Time taH ns * Parameters guaranteed by design but not tested Truth Table Mode SCE OE SWE Data I/O Power Standby H x x High Z Standby Read L L H Data Out Active Output Disable L H H High Z Active Write L x L Data In Active Aeroflex Circuit Technology SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700Timing Diagrams SRAM Read Cycle Timing Diagrams Read Cycle 1 (SCE = OE = VIL, SWE = Vin) tac Ao-18 * /< taa Duo Previous Data Valid Data Valid Read Cycle 2 (SWE = VIH) tre | Ao-18 K TAA SCE tace TCHZ telz SEE NOTE __ EE NOTE OE tOHZ toe SEE NOTE tolz SEE NOTE Dvo _ High Z Data Valid UNDEFINED L | DONT CARE Write Cycle Timing Diagrams Write Cycle (SWE Controlled, OE = ViH) Ao-18 Duo YY twHz- SEE NOTE twe x -<____ taw h- tow>| 1DH Data Valid AC Test Circuit To Device Under Test CL = 50 pF tT Notes: Current Source | lot t. Current Source Vz ~ 1.5 V (Bipolar Supply) Duo Note: Guaranteed by design, but not tested. AC Test Conditions Parameter Typical Units Input Pulse Level 0-3.0 Vv Input Rise and Fall 5 ns Input and Output Timing Reference Level 1.5 Vv 1) Vz is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance ZO = 75Q. 4) VZ is typically the midpoint of VOH and VoL. 5) IOL and IOH are adjusted to simulate a typical resistance load circuit. 6) ATE Tester includes jig capacitance. Aeroflex Circuit Technology SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700Flash AC Characteristics Read Only Operations (Vcc = 5.0V, Vss = OV, Tc = -55C to +125C) Parameter Symbol ~60 770 90 Units JEDEC Standd| Min Max} Min Max| Min Max Read Cycle Time TAVAV tre 60 70 90 ns Address Access Time tavav tacc 60 70 90 ns Chip Enable Access Time tELav tce 60 70 90 ns Output Enable to Output Valid taLav toe 30 35 35 ns Chip Enable to Output High Z (1) tEHOZ tor 20 20 20 ns Output Enable High to Output High 2(1) taHaz tor 20 20 20 ns Output Hold from Address, CE or OE Change, Whichever is First taxax ton 0 0 ns Note 1. Guaranteed by design, but not tested Flash AC Characteristics Write / Erase / Program Operations, FWE Controlled (Vcc = 5.0V, Vss = OV, Tc = -55C to +125C) Parameter Symbol ~60 770 90 Units JEDEC Standd | Min Max| Min Max| Min Max Write Cycle Time tavac twe 60 70 90 ns Chip Enable Setup Time tELWL tcE 0 0 0 ns Write Enable Pulse Width tWLWH twp 40 45 45 ns Address Setup Time TAVWL tas 0 0 0 ns Data Setup Time tpvwH tos 40 45 45 ns Data Hold Time tWHDXx {oH 0 0 0 ns Address Hold Time tWLAX tAH 45 45 45 ns Write Enable Pulse Width High tWHWL twPH 20 20 20 ns Duration of Byte Programming Operation tWHWH1 14 | TYP| 14 ] TYP] 14 | TYP ys Sector Erase Time twHWH2 30 30 30 Sec Read Recovery Time before Write TaHWL 0 0 0 ys Vcc Setup Time tvcE 50 50 50 ys Chip Programming Time 50 50 50 Sec Chip Enable Hold Time toEH 1 10 10 10 ns Chip Erase Time tWHWH3 120 120 120 Sec 1. Toggle and Data Polling only. Flash AC Characteristics Write / Erase / Program Operations, FCE Controlled (Vcc = 5.0V, Vss = OV, Tc = -55C to +125C) Parameter Symbol 60 770 90 Units JEDEC Standd | Min Max} Min Max| Min Max Write Cycle Time tavac twe 60 70 90 ns Write Enable Setup Time tWLeL tws 0 0 0 ns Chip Enable Pulse Width tELEH tep 40 45 45 ns Address Setup Time TAVEL tas 0 0 0 ns Data Setup Time {tDVEH tos 40 45 45 ns Data Hold Time tEHDX {DH 0 0 0 ns Address Hold Time tELAX tAH 45 45 45 ns Chip Enable Pulse Width High tEHEL tcPH 20 20 20 ns Duration of Byte Programming tWHwH1 14 | TYP] 14 1] TYP] 14 7 TYP ys Sector Erase Time tWHWH2 30 30 30 Sec Read Recovery Time T@HEL ) ) ) ns Chip Programming Time 50 50 50 Sec Chip Erase Time tWHWH3 120 120 120 Sec 5 Aeroflex Circuit Technology SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700AC Waveforms for Flash Memory Read Operations tre Addresses X Addresses Stable X tace. > FCE \ | \ +> tor OE \ V \ FWE _/ \L tce > toH>| High Z Outputs g Output Valid Write/Erase/Program Operation for Flash Memory, FWE Controlled Data Polling Addresses twHw1 > b| f* tou Data prot 5.0V Notes: 1. PAis the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the Output of the complement of the data written to the deviced. 4. Dout is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. Aeroflex Circuit Technology 6 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700AC Waveforms Chip/Sector Erase Operations for Flash Memory r| e tan Data Polling Addresses X ssssH 2AAAH 5555H XK 5555H X 2AAAH x SA x tas} a en a ee j taHwi+> OE j \ aa # twp me [NF AS \S \S VS NS Te -\ -\ \ \ Data / LAF AAH \__/ 55H \__/ 80H \__/AAH \__/55H \__/10H/30H ~| letpos Vec L tvcE>} Notes: 1. SAis the sector address for sector erase. AC Waveforms for Data Pollin During Embedded Algorithm Operations for Flash Memory =, be-tDF-| toEH > be twHwH1 or 2. _ DQO0-DQ6 DQO-DQ6z=Invalid DQ7= High Z Valid Data * DQ7=Valid Data (The device has completed the Embedded operation). Aeroflex Circuit Technology 7 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700Write/Erase/Program Operation for Flash Memory, FCE Controlled Data Polling Addresses X 5555H X PA be two rr] [tase TAH-m} + twHwH1 + =) d Data / 5.0V Notes: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the Output of the complement of the data written to the device. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. Aeroflex Circuit Technology 8 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700Pin Numbers & Functions 66 Pins PGA-Type Pin # Function Pin # Function Pin # Function Pin # Function { S\/Os 18 Ai2 35 FI/O9 52 FWE1 2 SI/O9 19 Vcc 36 FI/O10 53 FCE1 3 SI/O10 20 SCE1 37 A6 54 GND 4 A13 | NC 38 A7 55 FI/O3 5 A14 22 Sl/O3 39 Nc 56 Fl/O15 6 A15 23 $1/O15 40 A8 57 Fl/O14 7 A16 24 $1/O14 44 Ag 58 Fl/O13 8 A17 25 $1/013 42 Fl/Oo 59 Fl/O12 9 Sl/Oo 26 $1/O12 43 FI/O1 60 Ao 10 Sl/O1 27 OE 44 Fl/O2 61 At 11 Sl/O2 28 A18 45 Vec 62 A2 12 SWE2 29 SWE1 46 FCE2 63 FI/O7 13 SCE2 30 S|/O7 47 FWE2 64 Fl/O6 14 GND 31 Sl/O6 48 Fl/O14 65 FI/O5 15 Sl/O114 32 Sl/O5 49 A3 66 Fl/O4 16 A1o 33 $l/O4 50 A4 17 Att 34 Fl/O8 51 AS "P3" 1.08" SQ PGA Type Package Standard (without shoulders) "P7" 1.08" SQ PGA Type Package (with shoulders on Pins 1, 11, 56 & 66) Side View (P7) -185 MAX 025 .035 All dimensions in inches .050 DIA TYP Bottom View (P7 & P3) Side View 1.085 Sa (P3) "MAX 1.000 TYP 600 TYP Pim . Of Pin 56-7 @@ 0@ @ @ @ @ 100 TYP O@ 4 2] 4 00 +e00+eoo} 10% t @@ @ Tt @ @ 020 00 00 .016 OROKO) @@ f Pines__t2 9 ? @oe Pin 11 65 -100 TYP _ __.160 MAX Aeroflex Circuit Technology o SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700Pin Numbers & Functions 68 Pins Dual-Cavity CQFP Pin # Function Pin # Function Pin # Function Pin # Function 1 GND 18 GND 35 OE 52 GND 2 FCE1 19 S\/Os 36 SCE2 53 FI/O7 3 A5 20 SI/O9 37 A17 54 Fl/O6 4 A4 21 SI/O10 38 SWE2 55 FI/O5 5 A3 22 SlI/O11 39 FWE1 56 Fi/O4 6 A2 23 SI/O12 40 FWE2 57 FI/O3 7 Ad 24 Sl/013 A1 Ai8 58 Fl/O2 8 Ao 25 Sl/O14 42 NC 59 FI/O1 9 NC 26 SI/O15 43 NC 60 Fl/Oo 10 S\/Oo 27 Vec 44 FI/O15 61 Voc 11 Si/O1 28 Ait 45 Fl/O14 62 Aio 12 S\/O2 29 A12 46 Fl/O13 63 Ag 13 SI/O3 30 A13 47 Fl/O12 64 As 14 S\/O4 31 A14 48 FI/O11 65 A7 15 SI/O5 32 A15 49 Fl/O10 66 A6 16 S\/O6 33 Ai6 50 FI/O9 67 SWE1 17 S\/O7 34 SCE1 51 Fl/Os 68 FCE2 "F18" CQFP Package 990 SQ oo +.010 / =) 015 7 930, $0 I +.002 y Ping Pin 61>, \ pinto FADD OOOO OOD OOM OOD | gg nce AN 4 +.002 A - 050 S = 015 REF a _{ +002 Detail A _ I _ LF .890 SQ =n 6H 80 S _[ TYP = = T |-__ Metal spacer _ I _ I _ I . _ I . _ 1 Pin 26-/ pin 44 a ; CAM EEUU UU UU Pin 27 |_ .800 REF All dimensions in inches See Detail A Aeroflex Circuit Technology 10 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700(\EROFLEX CIRCUIT TECHNOLOGY Ordering Information Model Number DESC SMD Number Speed Package ACTSF2816N26P3Q TBD 25(S) / 60(F) ns 1.08"sq PGA-Type ACTSF2816N-37P3Q TBD 35(S) / 70(F) ns 1.08"sq PGA-Type ACTSF2816N39P3Q TBD 35(S) / 90(F) ns 1.08"sq PGA-Type ACT-SF2816N-26P7Q TBD 25(S) / 60(F) ns 1.08"sq PGA-Type ACT-SF2816N-37P7Q TBD 35(S) / 70(F) ns 1.08"sq PGA-Type ACTSF2816N-39P7Q TBD 35(S) / 90(F) ns 1.08"sq PGA-Type ACT-SF2816N-26F18Q TBD 25(S) / 60(F) ns .94"sq CQFP ACT-SF2816N-37F18Q TBD 35(S) / 70(F) ns .94"sq CQFP ACT-SF2816N-39F18Q TBD 35(S) / 90(F) ns .94"sq CQFP Note: (S) = Speed for SRAM, (F) = Speed for FLASH Part Number Breakdown ACT-SF 28 16 N 26 P7 Q Aeroflex Circuit a Technology Memory Type SF = SRAM Flash Combo Module Memory Depth 2 = 2M SRAM, 8 = Locations Memory Width, Bits Options, N = none Memory Speed Code 26 = 25ns SRAM & 60ns FLASH 37 = 35ns SRAM & 70ns FLASH 39 = 35ns SRAM & 90ns FLASH Li Screening C = Commercial Temp, 0C to +70C | = Industrial Temp, -40C to +85C T = Military Temp, -55C to +125C M = Military Temp, -55C to +125C, Screening * Q = MIL-PRF-38534 Compliant / SMD Package Type & Size Surface Mount Packages Thru-Hole Packages F18 = .94"SQ 68 Lead Dual-Cavity P3 = 1.085"SQ PGA 66 Pins CQFP with out shoulder P7 = 1.085"SQ PGA 66 Pins with shoulder * Screened to the individual test methods of MIL-STD-883 Specifications subject to change without notice. Aeroflex Circuit Technology 35 South Service Road Plainview New York 11830 Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: 1-(800) 843-1553 Aeroflex Circuit Technology 4 SCD3853 REV A 5/19/98 Plainview NY (516) 694-6700