October 1998 7-11
MicrelMIC5800/5801
7
MIC5800/5801
4/8-Bit Parallel-Input Latched Drivers
Ordering Information
Part Number Temperature Range Package
MIC5800BN – 40°C to + 85°C 14–Pin Plastic DIP
MIC5800BM – 40°C to + 85°C 14–Pin SOIC
MIC5801BN – 40°C to +85°C 22–Pin Plastic DIP
5962-8764001WA1 – 55°C to +125°C 22–Pin CERDIP
MIC5801BV – 40°C to + 85°C 28–Pin PLCC
MIC5801BWM – 40°C to +85°C 24–Pin SOIC
1Standard Military Drawing number for MIC5801AJBQ
General Description
The MIC5800/5801 latched drivers are high-voltage, high-
current integrated circuits comprised of four or eight CMOS
data latches, a bipolar Darlington transistor driver for each
latch, and CMOS control circuitry for the common CLEAR,
STROBE, and OUTPUT ENABLE functions.
The bipolar/MOS combination provides an extremely low-
power latch with maximum interface flexibility. MIC5800
contains four latched drivers; MIC5801 contains eight latched
drivers.
Data input rates are greatly improved in these devices. With
a 5V supply, they will typically operate at better than 5MHz.
With a 12V supply, significantly higher speeds are
obtained.The CMOS inputs are compatible with standard
CMOS, PMOS, and NMOS circuits. TTL or DTL circuits may
require the use of appropriate pull-up resistors. The bipolar
outputs are suitable for use with relays, solenoids, stepping
motors, LED or incandescent displays, and other high-power
loads.Both units have open-collector outputs and integral
diodes for inductive load transient suppression. The output
transistors are capable of sinking 500mA and will sustain at
least 50V in the OFF state. Because of limitations on package
power dissipation, the simultaneous operation of all drivers at
maximum rated current can only be accomplished by a
reduction in duty cycle. Outputs may be paralleled for higher
load current capability.
Functional Diagram
VDD
INn
STROBE
CLEAR
OUTPUT
ENABLE
COMMON MOS
CONTROL TYPICAL MOS
LATCH TYPICAL BIPOLAR
DRIVER
GND
OUTn
COMMON
Features
• 4.4MHz Minimum Data Input Rate
• High-Voltage, Current Sink Outputs
• Output Transient Protection
• CMOS, PMOS, NMOS, and TTL Compatible Inputs
• Internal Pull-Down Resistors
• Low-Power CMOS Latches
MicrelMIC5800/5801
7-12 October 1998
8 COMGND 7
114
213
312
411
510
69
LATCHES
CLEAR OE
STROBE VDD
IN1 OUT1
IN2 OUT2
IN3 OUT3
IN4 OUT4
MIC5800BN, BM
Absolute Maxim um Ratings: (Notes 1–6)
at +25°C Free-Air Temperature
Output Voltage, VCE 50V
Supply Voltage, VDD 15V
Input Voltage Range, VIN –0.3V to VDD + 0.3V
Continuous Collector Current, IC500mA
Package Power Dissipation:
MIC5800 Plastic DIP (Note 1) 2.1W
MIC5801 Plastic DIP (Note 2) 2.5W
MIC5800 SOIC (Note 3) 1.0W
MIC5801 PLCC (Note 4) 2.25W
MIC5801 CERDIP (Note 5) 3.1W
Operating Temperature Range, TA–40°C to +85°C
Storage Temperature Range, TS–65°C to +125°C
Note 1: Derate at 16.7 mW/°C above TA = +25°C
Note 2: Derate at 20 mW/°C above TA = +25°C
Note 3: Derate at 8.5 mW/°C above TA = +25°C
Note 4: Derate at 18.2 mW/°C above TA = +25°C
Note 5: Derate at 25 mW/°C above TA = +25°C
Note 6: Micrel CMOS devices have input-static protection but are
susceptible to damage when exposed to extremely high static
electrical charges.
Pin Configuration
Typical Input
IN
DD
V
122
221
320
419
518
617
716
15
14
13
12
LATCHES
CLEAR OE
STROBE VDD
IN1 OUT1
IN2 OUT2
IN3 OUT3
IN4 OUT4
IN5 OUT5
OUT6
OUT7
OUT8
COM
IN6
IN7
IN8
GND
8
9
10
11
MIC5801BN, AJBQ
MIC5801BWM
124
223
322
421
520
619
718
817
916
10 15
11 14
12 13
OE VDD
CLEAR NC
STROBE OUT1
IN1 OUT2
IN2 OUT3
IN3 OUT4
IN4 OUT5
IN5 OUT6
IN6 OUT7
IN7 OUT8
IN8 NC
GND COM
October 1998 7-13
MicrelMIC5800/5801
7
Allowable Output Current As A Function of Duty Cycle
Pin Configurations (continued)
MIC5801BV
6
IN1
OUT224
7
IN2
OUT323
8
IN3
OUT422
9
IN4
OUT521
10
IN5
OUT620
11
IN6
OUT719
5
CLEAR
OUT125
12 13 14 15 16 17 18
4 3 2 1 28 27 26
OE
VDD
NC
NC
STROBE
NC
GND
NC
COM
OUT8
NC
NC
IN8
IN7
LATCHES
0102030405060708090100
450
400
350
300
250
200
150
100
PERCENT DUTY CYCLE
ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C
321
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
4
0102030405060708090100
450
400
350
300
250
200
150
100
PERCENT DUTY CYCLE
ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C
3
1 or 2
4
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
5
6
7
8
MIC5801BN, AJBQ
MIC5800BN, BM
MicrelMIC5800/5801
7-14 October 1998
Electrical Characteristics: at TA = +25°C, VDD = 5V (unless otherwise noted)
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Output Leakage Current ICEX VCE = 50 V, TA = +25°C50µA
VCE = 50 V, TA = +70°C 100
Collector-Emitter VCE(SAT) IC = 100 mA 0.9 1.1 V
Saturation Voltage IC = 200 mA 1.1 1.3
IC = 350 mA, VDD = 7.0 V 1.3 1.6
Input Voltage VIN(0) 1.0 V
VIN(1) VDD = 12 V 10.5
VDD = 10 V 8.5
VDD = 5.0 V (See Note) 3.5
Input Resistance RIN VDD = 12 V 50 200 kΩ
VDD = 10 V 50 300
VDD = 5.0 V 50 600
Supply Current IDD(ON) VDD = 12 V, Outputs Open 1.0 2.0 mA
(Each VDD = 10 V, Outputs Open 0.9 1.7
Stage) VDD = 5.0 V, Outputs Open 0.7 1.0
IDD(OFF) VDD = 12 V, Outputs Open, Inputs = 0 V 200 µA
(Total) VDD = 5.0 V, Outputs Open, Inputs = 0 V 50 100
Clamp Diode IRVR = 50 V, TA = +25°C50µA
Leakage Current VR = 50 V, TA = +70°C 100
Clamp Diode Forward Voltage VFIF = 350 mA 1.7 2.0 V
NOTE : Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic “1”.
CLEAR
F
STROBE
OUTPUT
ENABLE
IN
CBA
G
N
E
CBA
G
D
CB
E
OUTN
Timing Conditions
(Logic Levels are VDD and Ground)
A. Minimum data active time before strobe enabled (data set-up time) .......................................................................50ns
B. Minimum data active time after strobe disabled (data hold time).............................................................................50ns
C. Minimum strobe pulse width...................................................................................................................................125ns
D. Typical time between strobe activation and output on to off transition...................................................................500ns
E. Typical time between strobe activation and output off to on transition...................................................................500ns
F. Minimum clear pulse width.....................................................................................................................................300ns
G. Minimum data pulse width......................................................................................................................................225ns
October 1998 7-15
MicrelMIC5800/5801
7
Truth Table Output OUTN
INNStrobe Clear Enable t-1 t
0 1 0 0 X OFF
11 0 0XON
X X 1 X X OFF
X X X 1 X OFF
X 0 0 0 ON ON
X 0 0 0 OFF OFF
X = Irrelevant
t-1 = previous output state
t = present output state
Information present at an input is transferred to its latch when
the STROBE is high. A high CLEAR input will set all latches
to the output OFF condition regardless of the data or
STROBE input levels. A high OUTPUT ENABLE will set all
outputs to the off condition, regardless of any other input
conditions. When the OUTPUT ENABLE is low, the outputs
depend on the state of their respective latches.
Typical Application
Unipolar Stepper-Motor Drive
MIC5800
UNIPOLAR WAVE DRIVE UNIPOLAR 2-PHASE DRIVE
STROBE
IN1
OUT1
IN2
IN3
IN4
OUT2
OUT3
OUT4
STROBE
IN1
OUT1
IN2
IN3
IN4
OUT2
OUT3
OUT4
8
9
2
3
4
5
6
7
114
13
12
11
10
VDD
OUT1
OUT2
OUT3
OUT4
IN4
IN3
IN2
IN1
STROBE
CLEAR
LATCHES
µP
0.1µF
+30V
0.1µF
+30V
STEPPER
MOTOR
OUTPUT ENABLE
MicrelMIC5800/5801
7-16 October 1998
Typical Applications, Continued
1
2
3
4
5
6
7
14
13
12
11
10
9
8
LATCHES
+24V
+5V
INPUT 4
INPUT 3
INPUT 2
INPUT 1
0.1µµ
µµ 22µµ
µµ
+
1
2
3
4
5
6
7
22
21
20
19
18
17
16
LATCHES
8
9
10
11
15
14
13
12
K1
K3
K2
K8
K7
K6
K5
K4
INPUT 1
INPUT 8
INPUT 7
INPUT 6
INPUT 5
INPUT 4
INPUT 3
INPUT 2
+12V
+5V
STROBE
Relays: Guardian Electric 1725-1C-12D
0.1µµ
µµ 22µµ
µµ
+
MIC5801 Relay Driver
MIC5800 Incandescent/Halogen Lamp Driver
Note:
Lamp inrush current
is approximately 10×
lamp operating current.
