biel? Wane anes | DATA Slr 74LVC257A = | Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) Product specification Superceded data of 1997 Sep 26 IC24 Data Handbook Philips Semiconductors 1998 Jul 29 PHILIPSPhilips Semiconductors Quad 2-input multiplexer with 5 Voit tolerant inputs/outputs (3-State) FEATURES Wide supply voltage range of 1.2 to 3.6. V in accordance with JEDEC standard no. 8-1A @ CMOS lower power consumption Direct interface with TTL levels Output drive capability 50 @ transmission lines at 85C 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt togic which select 4 bits of data from two sources and are controlled by a Product specification 74LVC257A DESCRIPTION The 74LVC257A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3:3V or 5.0V devices. in 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC257A is a quad 2-input- muttiplexer with 3-state outputs, common data select input (S). The data inputs from source 0 (lp to 4\p) are selected when input S is LOW and the data inputs from source 1 (1], to 41,) are selected when S in HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74LVC2574 is the tagic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high impedance OFF-state when SE is HIGH. QUICK REFERENCE DATA GND = 0 V; Tamp = 25C; t, =t} < 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT Propagation delay C, = 50 pF; ten ApH Nip, ni to n Veco = 3.3 V 3.9 ns Stony 3.5 Cc Input capacitance 5.0 pF Cpp Power dissipation capacitance per channel V, = GND to Voc! 30 pF NOTE: 1. Cpp is used to determine the dynamic power dissipation (Pp in uW) Pp = Cpp x Vec* xf + = (CL x Ver? x fg) where: f, = input frequency in MHz; C, = output load capacitance in pF; fp = output frequency in MHz; Voc = supply voltage in V; (CL x Voc? x fp) = sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA PKG. DWG. # 16-Pin Plastic SO ~40C to +85C 74LVC257A D 74LVC257A D | SOT109-1 16-Pin Plastic SSOP Type II ~40C to +85C 74LVC257A DB 74LVC257A DB SOT338-1 16-Pin Plastic TSSOP Type | 40C to +85C 74LVG257A PW. 74\VC257APW DH | SOT403-1 PIN CONFIGURATION LOGIC SYMBOL s[ 7 | 116] Voc 2 3 5 6 11 10 14 13 sof 2 | iS | OF Litt ELE {3 al Alo Tig 11, 2iy 2h, Big 3h 4Iy 44 vy] 4 13 | at 1 ] ao fe] eq oF auf 6 iT] 30 1V ay 3Y 4Y c] TT! 7 9 12 cro 2 [>] y SVO0637 SV00636 1998 Jul 29 2 853-2101 19802Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant . 7T4LVC257A inputs/outputs (3-State) PIN DESCRIPTION FUNCTION TABLE PIN NUMBER SYMBOL FUNCTION INPUTS OUTPUTS 1 s Common data select input OE S nly ny ny 2,5, 11,14 | 1Ipto 4ig | Data inputs from source 0 H x x x Zz 3,6, 10,13 | 11,1041, | Data outputs from source 1 L H x L L 4, 7,9, 12 1 to 4Y | 3-State multiplexer outputs L H x H H 8 GND Ground (0 V) L L L x L 3-State output enable input (active 1 OE LOW) L L H x H it; NOTES: 16 Vec Positive supply voltage : H = HIGH voltage level L = LOW voltage level LOGIC SYMBOL (IEEENEC) X = don'tcare Z = _ high impedance OFF-state LOGIC DIAGRAM 15 ty 2 U0 4 3 2ly $ 7 2p 6 3h; i 9 Sto 10 14 ah 13 = to $00638 OE s FUNCTIONAL DIAGRAM svoossa 3-STATE SELECTOR MULTIPLEXER OUTPUTS 12 $V00639 1998 Jul 29 3Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) 7ALVC257A RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS _LIMITS UNIT MIN MAX Vec DG supply voltage (for max. speed performance) 2.7 3.6 Vv DC supply voltage (for low-voltage applications) 1.2 3.6 Vi DC input voltage range 9 5.5 v Vo DC input voltage range; output HIGH or LOW state 0 Vec V DC output voltage range; output 3-State 0 .5 Tamb Operating free-air temperature range ~40 +85 C tn | Input rise and fall times Wen 27 wo aey 4 nsiV ABSOLUTE MAXIMUM RATINGS? in accordance with the Absolute Maximum Rating System (IEC 134); Voltages are referenced to GND (ground = 0V) SYMBOL PARAMETER CONDITIONS RATING UNIT Veco DC supply voitage . 0.5 to +6.5 Vv lx DC input diode current Vi<.0 ~50 mA Vv; DC input voltage Note 2 0.5 to +5.5 Vv lox DC output diode current Vo >VecorVo < 0 +50 mA Vo DC output voltage; output HIGH or LOW Note 2 ~0.5 to Voc 40.5 V DC output voltage; output 3-State Note 2 ~0.5 to 6.5 lo DC output source or sink current Vo =0to Veco +50 mA leno: loc =| OC Veg or GND current +100 mA Tstg Storage temperature range 65 to +150 C Power dissipation per package Pror ~ plastic mini-pack (SO) above +70C derate linearly with 8 mW/K 500 plastic shrink mini-pack (SSOP and TSSOP) above +60C derate linearly with 5.5 mW/K 500 mw NOTES: i. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1898 Jul 29 4Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant ; 74LVC257A inputs/outputs (3-State) 97 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = OV) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to 485C =| UNIT MIN TYP! | MAX Veco = 1.2V Vv Vin HIGH level Input voltage ce Vv Voc = 2.7 to 3.6V 2.0 Veg = 1.2V GND Vit LOW level Input voltage Vv Vec = 2.7 to 3.6V. 0.8 Voc = 2.7V; Vi = Vin or Vii ig = -12MA Veo -0.5 Veo = 3.0V; Vy = Vin of Vizs igo =-100pA Veo~0.2:} V Vou HIGH level output voltage < _ ce = Vv Voc = 3.0V; Vy = Vix or Vip. ig = -18mA Veco ~ 0.6 Veco = 3.0V; Vy = Vin or Viz; Ip = ~24mnA Veco - 0.8 Veco = 2.7V; Vi = Vig or Vit; ig = T2MA 0.40 Vor LOW level output voltage Vec = 3.0V; Vy = Vin or Vit; Io = TO0pA GND | 0.20 Vv Veco = 3.0V; V; = Vip or Vin lo = 24mA 0.55 hk Input leakage current Voc = 3.6V; V; = 5.5V or GND +0.1 +5 BA loz 3-State output OFF-state current Voc = 3.6V; Vi = Vin Or Vili Vo = Voc or GND 0.1 5 pA lorF Power off leakage current Voc = 0.0V; V;.or Vg = .5V 0.1 +10 pA lec Quiescent supply current Vec = 3.6V; Vi = Vec or GND; Ig = 0 CO. 10 BA Alec moat pin quiescent supply current per Veco = 2.7V to 3.6V; V) = Voc -0.6V; Ip = 0 5 500 HA NOTES: 1. All typical values are at Voc = 3.3V and Tamp = 26C. AC CHARACTERISTICS GND = 0 V; t= t) < 2.5 ns; C, = 50 pF; R_ = 5008; Tamp = -40C to +85C LIMITS SYMBOL PARAMETER WAVEFORM Veo = 3.3V 10.3V Veco = 2.7V Veco =1.2V | UNIT MIN | TYP? | MAX | MIN | TYP? [ MAX TYP Propagation delay teui/teuy Nig to nY Figures 1,3 16 3.9 5.1 1.5 3.3 6.1 11 ns ni; to nY teyv/tpun Eropagation delay Figues1,3 | 15 | 35 | 64 | 15 | 43 | 75 14 ns tezwten. | sete ouput enabletime | Figues2,3 | 15 | 3.7 | 65 | 15 | 46 | 75 15 ns tpzterz | Sete oMtputdisabletime | Figures2,3 | 16 | 32 | 52 | 15 | 35 | 62 12 ns NOTE: 1, These typical values are at Veco = 3.3V and Tamp = 25C. 1998 Jul 29 5Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Voit tolerant inputs/outputs (3-State) 74LVC257A AC WAVEFORMS TEST CIRCUIT Va = 0.5 x Vee at Vor < 2.7 V Vu = 1.5 VatVoco 2 2.7V Vy = Veg + 0:3 V at Voc 2 2.7 V Vx = Voy + 0.1 x Voc at Ver < 2.7 V Vy = Von - 0.3 Vat Vog 2 2.7V puse | oh Vy = Von - 0.1 x Vee at Veo < 2.7 V GENERATOR Vo. and Voy, are the typical output voltage drop that occur with the output load. Voc Test Sy S, nig, oF INPUTS Voc Mi ter ate, Open GND <27V Veo terztez. 2x Voc 2.7V-3.6v | 2.7 tpyztezy GND Vou SY00003 nY OUTPUT Figure 3. Load circuitry for switching times. Vo. SV0064T Figure 1. Input (S, nip, ni) to output (nY) propagation delays. vy DE INPUT GNO Voc OUTPUT LOW-to-OFF OFF-to-LOW Vou VoH OUTPUT HIGH-to-OFF OFF-to-HIGH GND Figure 2. 3-state enable and disable times. 1998 Jul 29 6Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) 74LVC257A $016: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 OD] y } |? WHER AAS | ' ye ee SUGReEGR OE o 0 25 5mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT ne A, | Ao | Ag | bp e } pM] eM] 6 | He | OL tp | a v w y | 27 @ mm | 1.75 | 45 | 128 | 28] oss or| 99 | a8 | t7| se |] oa | 06 | 28/925] ot | Oo] gs ches | oono| 2870] 9887] wor [2818] 9G70o| 088 | 278 | ono] 2288] ones] 9058] 2828] oc | oor | oaoe| U8) Note 1, Plastic or metal protrusions of 0.15 mm maximum per side are not included. VERSION IEC ae EIA paougcrion | 'SSUEDATE SOT109-1 076E07S MS-012AC =} woe 7 1998 Jul 29Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) TALVC257A SSOP16: plastic shrink smail outline package; 16 leads; body width 5.3 mm SOT338-1 0 2.5 5mm ee DIMENSIONS (mm are the original dimensions) unr] A | Ar | Az | As | bp] ec | OMP eM] e fae} ce fet a] vi wif y fzt e mm | 20 | 065 | 65 | 925 | o25 | 000 | 60 | s2 || re | 128] a3] or | 02 | O49] o4 | O88 | Ge Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. VERBION EC ee BIA PROJECTION ISSUE DATE $OT338-1 MO-150AC E-} orepae, 1998 Jul 29 8Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) TALVC257A TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D 1. ly] yr? ABAAARA A 4 i t | | ff. } fo yt MA OT it te yO = fe] p _ 0 25 Smm fo scale DIMENSIONS (mm are the original dimensions) unr} A joa, | a2 | As | bp | [OM] em] o | me |] DUP tp | @ | vd hw | oy | 2d max. 0.15 | 0.95 030 | 02 | 54 | 45 66 0.75 | 04 0.40 | 8 mm | 1:10) 505 | 080 | 25} o19] 01 | a9 | 43 | P] 62 | 1 | oso] o3 | %2 | F] %1 | goog | oe Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum perside are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE lec JEDEC ElAJ S0T403-1 MO-153 E36 rem 1998 Jul 29 9Philips Semiconductors Product specification Quad 2-input multiplexer with 5 Volt tolerant . 74LVC257A inputs/outputs (3-State) Data sheet status Data sheet Product Definition [1 status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -~ Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these.products for use in such applications do s0 at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or tiability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue Ail rights reserved. Printed in U.S.A. P.O. Box 3409 Sunnyvale, California 94088-3409 print code Date of release: 08-98 Telephone 800-234-7381 Document order number: 9397-750-04504 Philips Semiconductors