a Evaluation Board for the ADV7190/91 Digital Video Encoder Eval-ADV7190/91EB REVA FEATURES On-Board Reference On-Board Clock 8 or16 bit Pixel Data Input ADuC812 Microconverter + Switch Control Direct Hook-Up to Printer Port of PC PC Software for Control of ADV7190/91 modes INTRODUCTION This Application Note describes the ADV7190/91EB REVA evaluation board which supports the ADV7190/91 Digital Video Encoder. The device accepts CCIR601 data and converts into analog Composite, Y/C, RGB or YUV video signals in PAL or NTSC format. Full data on the ADV7190/91 is available in the ADV7190/91 data sheet, available from Analog Devices and should be consulted in conjunction with this note when using the Evaluation Board. REQUIREMENTS The ADV7190/91 requires a DC power supply which is able to deliver a minimum of 3.3V. Ideal operating voltage for the ADV7190/91EB REVA is 5V. Current requirements are approx. 0.5 A. To run the software which is supplied with the ADV7190/91 it is necessary to connect the printer port LPT1 of the PC to the boards 36pin Centronics connector. In order to run the software on a PC the operating system needs to be Windows 95 or Windows 98. The system requirements ask for any Pentium I, PMMx or Pentium II PC. GENERAL DESCRIPTION The ADV7190/91EB REVA provides a 25-pin input port over which pixel data in CCIR601 format can be input. Test pattern generators providing these standards are the Tektronix TSG601 handheld signal generator or the Tektronix TPG20. The input pixel data is converted from ECL level to TTL level via the MC10125TTLs. If a different clock source as that provided by the pixel data is required, the ADV7190/91EB REVA features a 27Mhz Oscillator (Y1) which can be connected over jumper J2. The ADV7190/91 contains an internal PLL which synchronizes 27MHz operation with 54 MHz operation. Two on-board push-buttons provide control over the SCRESET/RTC/TR pin and the RESET pin. According to the setttings in Mode Register 4, whenever PB2 is pressed, a timing reset or a SCreset is applied. When RESET (PB1) is pressed the internal registers of the ADV7190/91 reset to default register settings (see following page). The ADV7190/91EB REVA also features an external Voltage Reference (U16) which provides 1.235V Output Voltage. The DAC outputs are fed to a low-pass filter followed by an AD847 buffer op-amp (U1-U6) before being output over the BNC connection. The DAC outputs can be accessed at different points in the output filter circuit using the 0R resitors. The ADV7190/91EB REVA is fitted with the ADuC812 Microconverter. With the supplied software, there is an additional 8051 .asm Code. This code contains different demo settings for the ADV7190/91. According to the switch setting of SW1 the individual demos can be displayed. The ADuC812 is optional and is not required to make full use of the ADV7190/91EB REVA. Rev B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9105, Norwood. MA 02052-9105, U.S.A. Tel: 517/329-4700 Eval-ADV7190/91EB REVA REGISTER SETTINGS ON POWER-UP AND ON RESET After pressing the reset button PB1 on the evaluation board, the register settings of the ADV7190/ 91 will set up as follows: NTSC Video Standard. 2xOversampling Mode DAC A, B, C off DAC D, E, F on Disabled: MR2: Sleep Mode Control, Pixel Data Valid, Standard I2C, Square Pixel, SCART MR3: Closed Captioning, TTX Bit Request, Teletext, VBI MR4: Color Bars, VSYNC_3H MR5: CLAMP, RGB Sync, Y-Level Control MR7: Sharpness Filter, Brightness Control, Hue Adjust, Luma Saturation, Color Control MR8: Gamma Control, DNR, Double Buffering, MR9: Undershoot Limiter OCR:CLKOUT Pin MR0 MR1 MR2 MR3 MR4 MR5 MR6 MR7 MR8 MR9 OCR TR0 TR1 SFR0 SFR1 SFR2 SFR3 SPR 00hex 07hex 08hex 00hex 00hex 00hex 00hex 00hex 00hex 00hex 72hex 08hex 00hex CBhex 8Ahex 09hex 2Ahex 00hex all other registers : 00hex After powering up the ADV7190/91EB REVA a hardware reset should be applied (PB1). Enabled: MR2: Pedestal, MR4: Burst, Chrominance MR6: PLL, Power-Up Sleep Mode Output Configuration: DAC A: G DAC B: B DAC C: R DAC D: CVBS DAC E: LUMA DAC F: CHROMA Timing Mode 0, Slave, Blank Disabled Interlaced Mode, 720 active pixel line duration, normal operating mode (no genlock), UV default levels, VSO output, HSO Out, 8-bit Pixel Port, no Chroma Delay Subcarrier Subcarrier Subcarrier Subcarrier Frequency Frequency Frequency Frequency Register Register Register Register 0: 1: 2: 3: CB 8A 09 2A The following register settings will correspond to the above settings: Rev B Eval-ADV7190/91EB REVA EVALUATION SOFTWARE IMPORTANT THINGS TO KNOW: In order to give the user complete control over the ADV7190/91, a computer program is supplied with the board. Validity of Settings: The evaluation software can automatically check for an acknowledge or, when any register is changed can automatically read-back the new value stored in that register. The ACKcheck function is in the Options menu. The Continuous Read function may be enabled in the Register Access menu. Setting Up: Insert DISK 1 into the floppy drive and double click on SETUP.EXE and you will be prompted for all other necessary information. Running the Software: Double clicking the ADV7190/91 icon will run the software for the evaluation board. Initialisation: After starting the software you will be asked to load a preset. If you are not familiar with the software it is recommended to o.k. this message. You will have the ADV7190/91 immediately configured in such a way that it will output a color bar signal when the DAC A BNC output is connected to a NTSC monitor. For this configuration it is not necessary to provide an input signal because the internal color bars are enabled. The register settings for this preset can be checked in clicking on the READ ALL REGISTERS in the main window. Otherwise it is recommended to consult the datasheet for information about each control. I2C Compatible Programming: This version of software does not take into account the ability of the ADV7190/91 to accept continuous streams of data. Instead, for every register write or read, it completely re-initiates a start sequence (see the ADV7190/91 Data sheet for information on different ways registers can be written to). This means that more information has to be written to the MPU port extending the time required to program the ADV7190/91.This, while being a valid way of writing to the ADV7190/91 is not the optimum method of writing to the ADV7190/91. Dynamically Linked Menu System: All menues in this software are interactive, so when (for example) you change the value of a register all switch settings relevant to that register change will automatically change to the correct state, the inverse is also correct. Rev B Eval-ADV7190/91EB REVA LINK HEADERS ADV7190/91 LINKS These links are used for operating the ADV7190/ 91 encoder: J1: Link AGND and DGND. J2: Clock Mode J2A: ADV7190/91 is clocked from the on-board 27Mhz clock. J2B : ADV7190/91 is clocked from the clock contained in the pixel input. J3: Link clock line to header P8. For example, to use different clock source from those mentioned above. J4: Link DGND and GND. J5: Link ALSB pin to Ground. This jumper should be inserted when ALSB is chosen to be set low. J6: J7: Link PAL_NTSC pin to Ground. Inserting this jumper will configure the ADV7190/91 to run in NTSC mode regardless of the settings in Mode Register 0. The settings in Mode Register 2 can however override this pin (Standard I2C Control). J8: Link BLANK pin to Ground. This allows control over the BLANK pin functionality over the software. If unconnected the BLANK pin is disabled permanently and the software can not control the BLANK pin functionality. J20: If the external Vref (U2) is required this jumper should be inserted. Timing Reset or SCReset / PB2 J6A: The SCRESET/RTC pin and PB2 are configured as a Timing Reset. J6B: The SCRESET/RTC pin is configured as a Subcarrier Phase Reset input pin or as a RTC input pin, according to the settings in Mode Register 4. When Mode Register 4 is configured in Subcarrier Reset mode, PB2 will initiate a Subcarrier Phase reset and the Subcarrier Phase will reset to Field 0 at the start of the next Field. Rev B Eval-ADV7190/91EB REVA MICROCONVERTER ADuC812 LINKS These links are required in conjunction with the ADuC812 Microconverter: J9: Link Vertical Sync signals to Interrrupt. J9A: the vertical sync signal VSO initiates an interrrupt. J9B: the vertical sync signal VSYNC initiates an interrupt. J10: Link Horizontal Sync signal to Interrrupt. J10A: the horizontal sync signal HSO initiates an interrrupt. J10B: the horizontal sync signal HSYNC initiates an interrupt. J11: Link TTX signal to Interrrupt. J12: Link TTXRQ signal to Interrupt. J13: If the Microconverter is to be used with the ADV7190/91 this link sets the SDA of the I2C interface. This link must be set whenever the Microconverter is to be used with the ADV7190/91. J14: If the Microconverter is to be used with the ADV7190/91 this link sets the SCL of the I2C interface. This link must be set whenever the Microconverter is to be used with the ADV7190/91. J15: When this link is set, serial download on power-up or external Reset is enabled. After downloading the program this jumper must never be inserted, otherwise the ADuC program will be lost forever. Rev B Eval-ADV7190/91EB REVA ADuC812 MICROCONVERTER Guide for the QuickStartTM Development System V1.1 which is the software to interface the PC and the Microconverter. All can be obtained from Analog Devices. To make moste efficent use of the ADuC812s capacities, it is recommended to consult the datasheet for the ADuC812 and the Get Started In this application the ADuC812 is used to load some presets, which are controlled over the Mode Control switch SW1: ADV7190/91 :SW ITCHES FUNCTIONALITIES SW 8 Sw itches not used SW 7 SW 6 SW 5 ON => PIX DA TA OFF => COLOR BARS ON=> 2x Oversampling OFF=>4x O versampling SW 4 SW 3 SW 2 M ACROVISIO N ON/OFF* M acrovision TYPE ( SW 4 represents the LSB )* SW 1 ON => NTSC OFF => PAL ON => YCbCr OFF => RGB * Macrovision is only available on the ADV7190 In order to make use of this facility the following instructions should be followed: 1. The ADV7190/91EB REVA has to be connected over the 25pin pixel port to a signal generator supplying valid CCIR601 data. Jumper J2 has to be set to J2B. 2. The disks supplied with the ADV7190/91EB REVA contain a file called 90dem.asm. Double click on ASM51.exe and name the path and filename of the .asm file. A message should come up which reads: ASSEMBLY COMPLETE, 0 ERRORS FOUND 3. Connect the 5pin connector to P9 (N.C. on pin 5). Insert jumper J15. Power-up the board. This special cable can be provided or requested from Analog Devices. 4. Double click on DEBUG812.exe. Under SESSION, click on DEMO.SES. In the CONFIGURATION window, click on FILES and load the compiled .lst and .hex files for 90dem.asm, that is 90dem.lst and 90dem.hex. 5. Press the RESET button on the board. Click on RESET in the CONFIGURATION window. The data will be uploaded and the status bar should read: DATA UPLOADED SUCCESSFULLY. 6. Click on the PROG icon in the ADuC812 Debugger. The status bar should read: DATA UPLOADED SUCCESSFULLY. 7. Click on the RUN icon (next to PROG). 8. Load the ADV7190/91 Evaluation Software. Cancel the message which shows up in the main window. Remove jumper J15 and press RESET on the evaluation board. The switch settings will operate as indicated above. Note, when setting individual switches all other switches have to be set to ON. Rev B Eval-ADV7190/91EB REVA ADV7190/91EB REVA CONNECTIONS PO W E R S UP P L Y -5 V G r ou n d + 5 V BNC C E N T R O N IC S 3 6 fe m a le PR IN T E R PO R T BNC S -V ID E O OR BNC OR RG B C o n ne c to rs BNC PC P RIN T E R PO R T BNC BNC BNC P0 - P1 5 1 6 -BIT IN P U T INT E RF A C E D B1 5 fe m a l e PIX E L IN P UT C O NN E C T O R V ID E O D A T A GENERAT OR Rev B