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74LV688
8-bit magnitude comparator
Product specification
Supersedes data of 1997 May 15
IC24 Data Handbook
1998 Jun 23
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
2
1998 Jun 23 853-1878 19618
FEATURES
•Wide operating voltage: 1.0 to 5.5V
•Optimized for low voltage applications: 1.0V to 3.6V
•Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
•Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V,
Tamb = 25°C
•Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V,
Tamb =25°C
•Compare two 8-bit words
•Output capability: standard
•ICC category: MSI
DESCRIPTION
The 74LV688 is a high-speed Si-gate CMOS device, pin compatible
with the 74HC/HCT688
The 74LV688 is an 8-bit magnitude comparator. It performs
comparisons of two 8-bit binary or BCD words. The output provides
P = Q (equal-to).
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH Propagation delay Pn, Qn to P=Q CL = 15pF
VCC = 3.3V 17 ns
CIInput capacitance 3.5 pF
CPD Power dissipation capacitance per gate VI = GND to VCC122 pF
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V ;
(CL × VCC2 × fo) = sum of outputs.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
20-Pin Plastic DIL –40°C to +125°C74LV688 N 74LV688 N SOT146-1
20-Pin Plastic SO –40°C to +125°C74LV688 D 74LV688 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +125°C74LV688 DB 74LV688 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +125°C74LV688 PW 74LV688PW DH SOT360-1
PIN CONFIGURATION
14
13
12
1110
9
8
7
6
5
4
3
2
1
GND
VCC
15
16
17
18
19
20E
P0
Q0
P1
Q1
P2
Q2
P3
Q3
P = Q
Q7
P7
Q6
P6
Q5
P5
Q4
P4
SY00054
PIN DESCRIPTION
PIN NO. SYMBOL FUNCTION
1 E Enable input (active LOW)
2, 4, 6, 8, 11,
13, 15, 17 P0 to P7 Word inputs
3, 5, 7, 9, 12,
14, 16, 18 Q0 to Q7 W ord inputs
10 GND Ground (0V)
19 P=Q Equal to output
20 VCC Positive Supply Voltage
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 3
LOGIC SYMBOL
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
SY00055
19P = Q
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7 E
LOGIC SYMBOL (IEEE/IEC)
1
2
4
6
8
11
13
15
5
7
9
12
14
16
18
SY00056
19
G1
17
3
0
7
P
0
7
Q
(P = Q) 1
LOGIC DIAGRAM
P = Q
P7
Q7
P6
Q6
P5
Q5
P4
Q4
P3
Q3
P2
Q2
P1
Q1
P0
Q0
E
SY00057
FUNCTION TABLE
INPUTS OUTPUT
DATA
Pn, Qn ENABLE
EP = Q
P = Q L L
X H H
P > Q L H
P < Q L H
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 4
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL PARAMETER CONDITIONS MIN MAX UNIT
VCC DC supply voltage –0.5 +7.0 V
IIK DC input diode current VI < –0.5 V or V1 > VCC + 0.5V –±20 mA
IOK DC output diode current VO < –0.5 V or V0 > VCC + 0.5V –± 50 mA
IODC output source or sink current
– standard outputs –0.5V < VO < VCC +0.5V ±25 mA
±IGND,
±ICC
DC VCC or GND current for types with
– standard outputs ±50 mA
Tstg Storage temperature range –65 +150 °C
Ptot
power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic medium-shrink SO (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
–
–
–
750
500
400 mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute–maximum–rated conditions for extended periods may affect device reliability.
2. The performance capability of a high–performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
.
TYP
.
MAX
.
UNIT
VCC DC supply voltage see note 1 1.0 3.3 5.5 V
VIDC Input voltage 0 – VCC V
VODC output voltage 0 – VCC V
Tamb Operating ambient temperature range in
free–air See DC and AC characteristics –40
–40 –
–+85
+125 °C
tr, tf
(∆t/∆v) Input rise and fall times VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
–
–
–
–
500
200
100
50 ns/V
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS
SYMBOL PARAMETER TEST CONDITIONS -40°C to +85°C -40°C to +125°CUNIT
MIN TYP1MAX MIN MAX
VCC = 1.2V 0.9 0.9
VIH
HIGH level Input VCC = 2.0V 1.4 1.4
V
V
IH voltage VCC = 2.7 to 3.6V 2.0 2.0
V
VCC = 4.5 to 5.5V 0.7VCC 0.7VCC
VCC = 1.2V 0.3 0.3
VIL
LOW level Input VCC = 2.0V 0.6 0.6
V
V
IL voltage VCC = 2.7 to 3.6V 0.8 0.8
V
VCC = 4.5 to 5.5 0.3VCC 0.3VCC
VCC = 1.2V ; V I = VIH or VIL; –IO = 100µA 1.2
HIGH level output
VCC = 2.0V ; V I = VIH or VIL; –IO = 100µA 1.8 2.0 1.8
HIGH
l
eve
l
ou
t
pu
t
voltage
;
all out
p
uts
VCC = 2.7V ; V I = VIH or VIL; –IO = 100µA 2.5 2.7 2.5
V
voltage
all
out uts
VCC = 3.0V ; V I = VIH or VIL; –IO = 100µA 2.8 3.0 2.8
V
V
OH VCC = 4.5V ; V I = VIH or VIL; –IO = 100µA 4.3 4.5 4.3
V
HIGH level output
voltage; VCC = 3.0V ; V I = VIH or VIL; –IO = 6mA 2.40 2.82 2.20
g
STANDARD
outputs VCC = 4.5V ; V I = VIH or VIL; –IO = 12mA 3.60 4.20 3.50
VCC = 1.2V ; V I = VIH or VIL; IO = 100µA 0
LOW level output
VCC = 2.0V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
LOW
l
eve
l
ou
t
pu
t
voltage
;
all out
p
uts
VCC = 2.7V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
V
voltage
all
out uts
VCC = 3.0V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
V
V
OL VCC = 4.5V ; V I = VIH or VIL; IO = 100µA 0 0.2 0.2
V
LOW level output
voltage; VCC = 3.0V ; V I = VIH or VIL; IO = 6mA 0.25 0.40 0.50
g
STANDARD
outputs VCC = 4.5V ; V I = VIH or VIL; IO = 12mA 0.35 0.55 0.65
IIInput leakage
current VCC = 5.5V ; V I = VCC or GND 1.0 1.0 µA
ICC Quiescent supply
current; MSI VCC = 5.5V ; V I = VCC or GND; IO = 0 20.0 160 µA
∆ICC Additional
quiescent supply
current VCC = 2.7V to 3.6V ; VI = VCC – 0.6V 500 850 µA
NOTE:
1. All typical values are measured at Tamb = 25°C.
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 6
AC CHARACTERISTICS
GND = 0V ; tr = tf = 2.5ns; CL = 50pF; RL = 1KΩ
CONDITION
LIMITS
SYMBOL PARAMETER WAVEFORM
CONDITION
–40 to +85 °C–40 to +125 °CUNIT
VCC(V) MIN TYP1MAX MIN MAX
1.2 100 – –
2.0 28 45 57
tPHL/tPLH
ropaga
on
e
ay
=
22.7 20 32 40 ns
,
3.0 to 3.6 16226 33
4.5 to 5.5 11218 22
1.2 50 – –
2.0 17 29 38
tPHL/tPLH
ropaga
on
e
ay
=
12.7 13 21 27 ns
3.0 to 3.6 10217 22
4.5 to 5.5 7212 15
NOTES:
1. Unless otherwise stated, all typical values are at Tamb = 25°C.
2. Typical value measured at VCC = 3.3V.
3. Typical value measured at VCC = 5.0V.
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V ; VM = 0.5 VCC at VCC t 2.7V.
VOL and VOH are the typical output voltage drop that occur with the
output load.
E INPUT VM
tPLH tPHL
VOL
VI
VM
GND
VOH
P = Q OUTPUT
SV00195
W aveform 1. Propagation delays from the enable input (E) to
the equal-to output (P = Q).
Pn, Qn INPUT VM
VM
P = Q OUTPUT
VM
VM
tPHL tPLH
SV00194
W aveform 2. Propagation delays from the inputs (Pn, Qn) to
the equal-to output (P = Q).
TEST CIRCUIT
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CLRL= 1k
Vcc
Test Circuit for Outputs
DEFINITIONS
VCC VI
< 2.7V
2.7–3.6V
VCC
2.7V
TEST
tPLH/tPHL
≥4.5 V VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
50pF
RT = Termination resistance should be equal to ZOUT of pulse generators.
SV00902
W aveform 3. Load circuitry for switching times
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 7
APPLICATION INFORMATION
Two or more “688” 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8 bits.
SV00196
688
8 MSB
An
Bn
ENABLE
INPUT
688An-1
Bn-1
688
8 LSB
A0
B0
A = BA
= BA
= BOUTPUT
ENABLE
INPUT ENABLE
INPUT
Waveform 4. Binary or BCD comparator
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 8
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 9
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 10
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 11
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
Philips Semiconductors Product specification
74LV6888-bit magnitude comparator
1998 Jun 23 12
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appl iances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-04456
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