LTC2904/LTC2905
1
29045fa
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
■
Monitors Two Inputs Simultaneously
■
Nine Threshold Combinations
■
Three Supply Tolerances (5%, 7.5%, 10%)
■
Guaranteed Threshold Accuracy: ±1.5% of
Monitored Voltage Over Temperature
■
Internal V
CC
Auto Select
■
Power Supply Glitch Immunity
■
200ms Reset Time Delay (LTC2904 Only)
■
Adjustable Reset Time Delay (LTC2905 Only)
■
Open Drain RST Output
■
Guaranteed RST for V1 ≥ 1V or V2 ≥ 1V
■
Low Profile (1mm) SOT-23 (ThinSOT
TM
) and Plastic
(3mm x 2mm) DFN Packages
■
Desktop and Notebook Computers
■
Handheld Devices
■
Network Servers
■
Core, I/O Monitor
Precision Dual Supply Monitors
with Pin-Selectable Thresholds
The LTC
®
2904/LTC2905 are dual supply monitors in-
tended for systems with two supply voltages. The dual
supply monitors have a common reset output with delay
(200ms for the LTC2904 and adjustable using an external
capacitor for the LTC2905). This product provides a
precise, space-conscious and micropower solution for
supply monitoring.
The LTC2904/LTC2905 feature a tight 1.5% threshold
accuracy over the whole operating temperature range,
and glitch immunity to ensure reliable reset operation
without false triggering. The open drain RST output is
guaranteed to be in the correct state for inputs down to 1V.
The LTC2904/LTC2905 also feature three programming
input pins, which program the threshold and tolerance
level without requiring any external components. These
three programming pins provide a total of 27 different
voltage level and tolerance combinations, eliminating
the need to have different parts for development and
implementation of different systems with different voltage
levels requiring monitoring function.
, LTC and LT are registered trademarks of Linear Technology Corporation.
V1
S1
S2
TOL
V2
TMR
GND
RST
LTC2905
22nF
0.1µF0.1µF
DC/DC
CONVERTER
SYSTEM
LOGIC
29045 TA01
3.3V
5V
5V, 3.3V Dual Supply Monitor with 5% Tolerance Table 1. Voltage Threshold Programming
V1 V2 S1 S2
5.0 3.3 V1 V1
3.3 2.5 Open GND
3.3 1.8 V1 Open
3.3 1.5 Open V1
3.3 1.2 Open Open
2.5 1.8 GND GND
2.5 1.5 GND Open
2.5 1.2 GND V1
2.5 1.0 V1 GND
APPLICATIO S
U
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of
their respective owners.
LTC2904/LTC2905
2
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Terminal Voltages
V1, V2 ..................................................... –0.3V to 7V
S1, S2, TOL .............................. –0.3V to (V
CC
+0.3V)
RST ......................................................... –0.3V to 7V
RST (LTC2904) ....................................... –0.3V to 7V
TMR (LTC2905) ...................................... –0.3V to 7V
ORDER PART
NUMBER
DDB8 PART MARKING
T
JMAX
= 125°C, θ
JA
= 76°C/W
LBCZ
LBDB
LAJF
LBCY
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Notes 1, 2)
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted.
(Notes 2, 3, 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
RT50
5V, 5% Reset Threshold V1 Input Threshold ●4.600 4.675 4.750 V
5V, 7.5% Reset Threshold ●4.475 4.550 4.625 V
5V, 10% Reset Threshold ●4.350 4.425 4.500 V
V
RT33
3.3V, 5% Reset Threshold V1, V2 Input Threshold ●3.036 3.086 3.135 V
3.3V, 7.5% Reset Threshold ●2.954 3.003 3.053 V
3.3V, 10% Reset Threshold ●2.871 2.921 2.970 V
V
RT25
2.5V, 5% Reset Threshold V1, V2 Input Threshold ●2.300 2.338 2.375 V
2.5V, 7.5% Reset Threshold ●2.238 2.275 2.313 V
2.5V, 10% Reset Threshold ●2.175 2.213 2.250 V
V
RT18
1.8V, 5% Reset Threshold V2 Input Threshold ●1.656 1.683 1.710 V
1.8V, 7.5% Reset Threshold ●1.611 1.638 1.665 V
1.8V, 10% Reset Threshold ●1.566 1.593 1.620 V
V
RT15
1.5V, 5% Reset Threshold V2 Input Threshold ●1.380 1.403 1.425 V
1.5V, 7.5% Reset Threshold ●1.343 1.365 1.388 V
1.5V, 10% Reset Threshold ●1.305 1.328 1.350 V
V
RT12
1.2V, 5% Reset Threshold V2 Input Threshold ●1.104 1.122 1.140 V
1.2V, 7.5% Reset Threshold ●1.074 1.092 1.110 V
1.2V, 10% Reset Threshold ●1.044 1.062 1.080 V
V
RT10
1V, 5% Reset Threshold V2 Input Threshold ●0.920 0.935 0.950 V
1V, 7.5% Reset Threshold ●0.895 0.910 0.925 V
1V, 10% Reset Threshold ●0.870 0.885 0.900 V
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Operating Temperature Range
LTC2904C/LTC2905C ................................ 0°C to 70°C
LTC2904I/LTC2905I ..............................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
TSOT Lead Temperature (Soldering, 10 sec) ........ 300°C
ORDER PART
NUMBER
TS8 PART MARKING
LTC2904CDDB
LTC2904IDDB
LTC2905CDDB
LTC2905IDDB
LTC2904CTS8
LTC2904ITS8
LTC2905CTS8
LTC2905ITS8
LTBCJ
LTBCK
LTAJD
LTAJE
TOP VIEW
DDB8 PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
EXPOSED PAD IS GND (PIN 9),
MUST BE SOLDERED TO PCB
5
6
7
8
4
3
2
1GND
RST
RST/TMR*
V2
TOL
S1
S2
V1
9
V2 1
RST/TMR* 2
RST 3
GND 4
8 V1
7 S2
6 S1
5 TOL
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
T
JMAX
= 125°C, θ
JA
= 250°C/W
* RST FOR LTC2904
TMR FOR LTC2905
* RST FOR LTC2904
TMR FOR LTC2905
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LTC2904/LTC2905
3
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ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted.
(Notes 2, 3)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The greater of V1, V2 is the internal supply voltage (V
CC
).
Note 3: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 4: For reset thresholds test conditions refer to the voltage threshold
programming table in the Applications Information section.
Note 5: The output pins RST and RST have an internal pull-up to V
CC
of
typically –6µA. However, an external pull-up resistor may be used when
faster rise time is required or for V
OH
voltages greater than V
CC
.
Note 6: The input current to the three-state input pins are the pull-up and
the pull-down current when the pins are either set to V1 or GND
respectively. In the open state, the maximum leakage current to V1 or GND
permissible is 10µA.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CCMIN
Minimum Internal Operating Voltage (Note 2) RST in Correct Logic State ●1V
I
V1
V1 Input Current Includes Input Current to Three-State Pins ●65 130 µA
I
V2
V2 Input Current ●0.4 1.0 µA
I
TMR(UP)
TMR Pull-Up Current (LTC2905) V
TMR
= 0V ●–1.5 –2.1 –2.7 µA
I
TMR(DOWN)
TMR Pull-Down Current (LTC2905) V
TMR
= 1.4V ●1.5 2.1 2.7 µA
t
RST
Reset Time-Out Period (LTC2904) ●140 200 260 ms
t
RST
Reset Time-Out Period (LTC2905) C
TMR
= 22nF ●140 200 260 ms
t
UV
Vx Undervoltage Detect to Vx Less than Reset Threshold V
RTX
150 µs
RST or RST by More than 1%
V
OL
Output Voltage Low RST, RST I = 2.5mA ●0.15 0.4 V
I = 100µA; V1 = 1V (RST Only) ●0.05 0.3 V
V
OH
Output Voltage High RST, RST I = –1µA●V
CC
–1 V
(Notes 2, 5)
Three-State Inputs S1, S2, TOL
V
IL
Low Level Input Voltage ●0.4 V
V
IH
High Level Input Voltage ●1.4 V
V
Z
Pin Voltage when Left in Open State I = –10µA●0.7 V
I = 0µA 0.9 V
I = 10µA●1.1 V
I
VPG
Programming Input Current (Note 6) ●±25 µA
LTC2904/LTC2905
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TEMPERATURE (°C)
THRESHOLD VOLTAGE, V
RT50
(V)
29045 G01
TEMPERATURE (°C)
TEMPERATURE (°C) TEMPERATURE (°C)
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
THRESHOLD VOLTAGE, V
RT33
(V)
3.120
3.070
3.020
2.970
2.920
2.870
29045 G02
THRESHOLD VOLTAGE, V
RT25
(V)
29045 G03
2.375
2.325
2.275
2.225
2.175
THRESHOLD VOLTAGE, V
RT18
(V)
29045 G04
1.705
1.685
1.665
1.645
1.625
1.605
1.585
1.565
THRESHOLD VOLTAGE, V
RT15
(V)
29045 G05
1.425
1.405
1.385
1.365
1.345
1.325
1.305
THRESHOLD VOLTAGE, V
RT12
(V)
1.135
1.125
1.115
1.105
1.095
1.085
1.075
1.065
1.055
1.045
29045 G06
THRESHOLD VOLTAGE, V
RT10
(V)
29045 G07
0.950
0.940
0.930
0.920
0.910
0.900
0.890
0.880
0.870
4.75
4.70
4.65
4.60
4.55
4.50
4.45
4.40
4.35
I
V1
(µA)
21.5
21.0
20.5
20.0
19.5
19.0
29045 G08
I
V2
(µA)
29045 G09
1.8
1.7
1.6
1.5
1.4
1.3
1.2
–50 100
25 75
–25 050 –50 100
25 75
–25 050 –50 100
25 75
–25 050
–50 100
25 75
–25 050 –50 100
25 75
–25 050 –50 100
25 75
–25 050
–50 100
25 75
–25 050 –50 100
25 75
–25 050
–50 100
25 75
–25 050
5%
7.5%
10%
5%
7.5%
10%
5%
7.5%
10%
5%
7.5%
10%
5%
7.5%
10%
5%
7.5%
10%
5%
7.5%
10%
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
5V Threshold Voltage vs
Temperature
3.3V Threshold Voltage vs
Temperature
2.5V Threshold Voltage vs
Temperature
1.8V Threshold Voltage vs
Temperature
1.5V Threshold Voltage vs
Temperature
1.2V Threshold Voltage vs
Temperature
1V Threshold Voltage vs
Temperature IV1 vs Temperature IV2 vs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Specifications are at TA = 25°C unless otherwise noted.
LTC2904/LTC2905
5
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TEMPERATURE (°C)
I
V2
(µA)
29045 G10
20.0
19.5
19.0
18.5
18.0
17.5
17.0
COMPARATOR OVERDRIVE VOLTAGE (% OF V
RTX
)
0.1
TYPICAL TRANSIENT DURATION (µs)
700
600
500
400
300
200
100
0
1 10 100
29045 G11
RESET OCCURS
ABOVE CURVE
C
TMR
(FARAD)
10p 100p 1n 10n 100n 1µ
RESET TIME OUT PERIOD, t
RST
(ms)
29045 G12
10000
1000
100
10
1
0.1
TEMPERATURE (°C)
RESET TIME-OUT PERIOD, t
RST
(ms)
29045 G13
235
230
225
220
215
210
205
200
195
V1 (V)
0
RST OUTPUT VOLTAGE (V)
5
4
3
2
1
0
–1 1234
29045 G14
5
V2 = S1 = S2 = TOL = V1
10k PULL-UP RESISTOR
V1 (V)
0
RST OUTPUT VOLTAGE (V)
5
4
3
2
1
0
–1 1234
29045 G15
5
V2 = S1 = S2 = TOL = V1
10k PULL-UP RESISTOR
SUPPLY VOLTAGE, V
CC
(V)
0
RST PULL-DOWN CURRENT, I
RST
(mA)
5
4
3
2
1
0
4
29045 G17
123 5
RST AT 150mV
RST AT 50mV
V1 (V)
0
RST OUTPUT VOLTAGE (V)
5
4
3
2
1
0
–1 1234
29045 G16
5
V2 = S1 = S2 = TOL = V1
10pF CAPACITOR AT RST
SUPPLY VOLTAGE, V
CC
(V)
0
RST PULL-DOWN CURRENT, I
RST
(mA)
5
4
3
2
1
0
4
29045 G18
123 5
RST AT 150mV
RST AT 50mV
S1 = V2 = V1
TOL = S2 = GND
NO PULL-UP R
V2 = S1 = S2 = TOL = V1
NO PULL-UP R
–50 100
25 75
–25 050
–50 100
25 75
–25 050
CRT = 22nF
(FILM)
V1 = 2.5V
V2 = 3.3V
S1 = S2 = TOL = 1.4V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
IV2 vs Temperature
Typical Transient Duration vs
Comparator Overdrive (V1, V2)
Reset Time Out Period (tRST)
vs Capacitance (CTMR)
Reset Time-Out Period (tRST)
vs Temperature RST Output Voltage vs V1 RST Output Voltage vs V1
RST Output Voltage vs V1
RST Pull-Down Current (IRST)
vs Supply Voltage (VCC)
RST Pull-Down Current (IRST)
vs Supply Voltage (VCC)
Specifications are at TA = 25°C unless otherwise noted.
LTC2904/LTC2905
6
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RST PULL-DOWN CURRENT, I
RST
(mA)
0
RST OUTPUT VOLTAGE LOW, V
OL
(V)
20
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
29045 G19
10 50 604030
SUPPLY VOLTAGE, V
CC
(V)
2.0
RST PULL-UP CURRENT, I
RST
(µA)
4.0
–18
–16
–14
–12
–10
–8
–6
–4
–2
0
29045 G21
3.0 5.0
2.5 4.5
3.5
SUPPLY VOLTAGE, V
CC
(V)
2.0 4.0
29045 G22
3.0 5.0
2.5 4.5
3.5
25°C
85°C
–40°C
V1 = 5V
V2 = 3V
S1 = S2 = TOL = V1
NO PULL-UP R
OUTPUT SOURCE CURRENT, I
RST
(µA)
–12
RST OUTPUT VOLTAGE HIGH, V
OH
(V)
3.0
2.5
2.0
1.5
1.0
0.5
–10 –8 –6 –4
29045 G23
–2 0
V1 = 3.3V
V2 = 1.8V
S1 = TOL =V1
S2 = OPEN
NO PULL-UP R
25°C
85°C
–40°C
OUTPUT SOURCE CURRENT, I
RST
(µA)
–7
RST OUTPUT VOLTAGE HIGH, V
OH
(V)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
–1
–8 –6 –3–4–5
29045 G24
–2 0
V1 = 3.3V
V2 = 1.5V
S1 = TOL = V1
S2 = OPEN
NO PULL-UP R
25°C
85°C
TEMPERATURE (°C)
I
S1
, I
S2
, I
TOL
(µA)
20
19
18
17
16
15
14
13
12
11
10
29045 G25
TEMPERATURE (°C)
I
S1
, I
S2
, I
TOL
(µA)
–20
–19
–18
–17
–16
–15
–14
–13
–12
–11
–10
29045 G26
V
RT25
V
RT33
V
RT50
TOL = GND
RST PULL-DOWN CURRENT, I
RST
(mA)
0
RST OUTPUT VOLTAGE LOW, V
OL
(V)
20
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
29045 G20
10 50 604030
25°C
85°C
–40°C
V1 = 5V
V2 = 3.3V
S1 = S2 = TOL = V1
NO PULL-UP R
–40°C
RST PULL-UP CURRENT, I
RST
(µA)
–16
–14
–12
–10
–8
–6
–4
–2
0
TOL = V1
V
RT25
V
RT33
V
RT50
–50 100
25 75
–25 050 –50 100
25 75
–25 050
S1 = S2 = TOL = 3.3V S1 = S2 = TOL = GND
TYPICAL PERFOR A CE CHARACTERISTICS
UW
RST Output Voltage High (VOH) vs
RST Output Source Current (IRST)
RST Output Voltage Low (VOL) vs
RST Pull-Down Current (IRST)
RST Output Voltage Low (VOL) vs
RST Pull-Down Current (IRST)
RST Pull-Up Current (IRST) vs
Supply Voltage (VCC)
RST Pull-Up Current (IRST) vs
Supply Voltage (VCC)
RST Output Voltage High (VOH) vs
RST Output Source Current (IRST)
IS1, IS2, ITOL vs Temperature IS1, IS2, ITOL vs Temperature
Specifications are at TA = 25°C unless otherwise noted.
LTC2904/LTC2905
7
29045fa
UU
U
PI FU CTIO S
(TS8 Package/DDB8 Package)
V2 (Pin 1/Pin 4): Voltage Input 2. Input for V2 monitor.
Select from 3.3V, 2.5V, 1.8V, 1.5V, 1.2V or 1.0V. Refer to
Table 1 for details. The greater of V1, V2 is also the internal
supply voltage, V
CC
. Bypass this pin to ground with a 0.1µF
(or greater) capacitor.
RST (Pin 2/Pin 3): (LTC2904 Only) Reset Logic Output.
When all voltage inputs are above the reset threshold for
at least the programmed delay time, this pin pulls low. This
pin has a weak pull-up to V
CC
and may be pulled above V
CC
using an external pull-up.
TMR (Pin 2/Pin 3): (LTC2905 Only) Reset Delay Time
Programming Pin. Attach an external capacitor (C
TMR
) to
GND to set a reset delay time of 9ms/nF. Leaving the pin
open generates a minimum delay of approximately 200µs.
A 22nF capacitor will generate a 200ms reset delay time.
RST (Pin 3/Pin 2): Inverted Reset Logic Output. Pulls low
when any voltage input is below the reset threshold and is
held low for programmed delay time after all voltage
inputs are above threshold. This pin has a weak pull-up
to V
CC
and may be pulled above V
CC
using an external
pull-up.
GND (Pin 4/Pin 1, Pin 9): Ground.
TOL (Pin 5/Pin 8): Three-state Input for Supply Tolerance
Selection (5%, 7.5% or 10%). See the Applications Infor-
mation section for tolerance selection chart (Table 2).
S1 (Pin 6/Pin 7): Voltage Threshold Select Three-State
Input. Connect to V1, GND or leave unconnected in open
state (See Table 1).
S2 (Pin 7/Pin 6): The Second Voltage Threshold Select
Three-State Input. Connect to V1, GND or leave uncon-
nected in open state (See Table 1).
V1 (Pin 8/Pin 5): Voltage Input 1. Input for V1 monitor.
Select from 5V, 3.3V, or 2.5V. See Table 1 for details. The
greater of V1, V2 is also the internal supply voltage, V
CC
.
Bypass this pin to ground with a 0.1µF (or greater)
capacitor.
–
+
–
+
200ms
RESET PULSE
GENERATOR
THREE-STATE DECODER
RESISTOR
NETWORK
POWER
DETECT
BAND GAP
REFERENCE
V
CC
V
CC
LTC2904
2904 BD
S1 TOLS2
RST
RST
V
CC
GND
V1
V2
6µA
6µA
BLOCK DIAGRA
W
LTC2904/LTC2905
8
29045fa
V
X
RST
RST
t
UV
t
RST
1V
1V
V
RTX
29045 TD
BLOCK DIAGRA
W
TI I G DIAGRA
UWW
–
+
–
+
RESET PULSE
GENERATOR
THREE-STATE DECODER
RESISTOR
NETWORK
POWER
DETECT
BAND GAP
REFERENCE
VCC
VCC
LTC2905
2905 BD
S1 TOLS2
TMR
RST
GND
V1
V2
6µA
VX Monitor Timing
LTC2904/LTC2905
9
29045fa
leakage current allowable from the pin to either GND or V1
is 10µA.
In margining applications, all the 3-state input pins can be
driven using a tri-state buffer. Note however the low and
high output of the tri-state buffer has to satisfy the V
IL
and
V
IH
of the 3-state pin listed in the Electrical Characteristics
Table. Moreover, when the tri-state buffer is in the high
impedance state, the maximum leakage current allowed
from the pin to either GND or V1 is 10µA.
Monitor Programming
Connecting S1 and S2 to GND, V1 or leaving them open
selects the LTC2904/LTC2905 input voltage combina-
tions. Table 1 shows the nine possible combinations of
nominal input voltages and their corresponding S1, S2
connections.
Table 1. Voltage Threshold Programming
V1 V2 S1 S2
5.0 3.3 V1 V1
3.3 2.5 Open GND
3.3 1.8 V1 Open
3.3 1.5 Open V1
3.3 1.2 Open Open
2.5 1.8 GND GND
2.5 1.5 GND Open
2.5 1.2 GND V1
2.5 1.0 V1 GND
Note: Open = open circuit or driven by a three state buffer in high
impedance state with leakage current less than 10µA.
Tolerance Programming
The three-state input pin, TOL programs the common
supply tolerance for both V1 and V2 input voltages (5%,
7.5% or 10%). The larger the tolerance the lower the trip
threshold. Table 2 shows the tolerances selection corre-
sponding to a particular connection at the TOL pin.
Supply Monitoring
The LTC2904/LTC2905 are low power, high accuracy dual
supply monitors with a common reset output and select-
able thresholds. Reset delay is set to a nominal of 200ms
for the LTC2904 and is adjustable using an external
capacitor for the LTC2905.
The two three-state input pins (S1 and S2) select one of
nine possible threshold voltage combinations. Another
three-state input pin sets the supply tolerance (5%, 7.5%
or 10%). Both input voltages (V1 and V2) must be above
predetermined thresholds for the reset not to be invoked.
The LTC2904/LTC2905 assert the reset outputs during
power-up, power-down and brownout conditions on
either of the voltage inputs.
Power-Up
The greater of V1, V2 is the internal supply voltage (V
CC
).
V
CC
powers the drive circuits for the RST pin. Therefore as
soon as V1 or V2 reaches 1V during power-up, the RST
output asserts low.
V
CC
also powers the drive circuits for the RST pin in the
LTC2904. Therefore, RST weakly pulls high when V1 or V2
reaches at least 1V.
Threshold programming is complete when V1 reaches at
least 2.17V. After programming, if either V1 or V2 falls
below its programmed threshold, RST asserts low (RST
weakly pulls high) as long as V
CC
is at least 1V.
Once V1 and V2 rise above their thresholds, an internal
timer is started. After the programmed delay time, RST
weakly pulls high (RST asserts low).
Power-Down
On power-down, once either V1 or V2 inputs drops below
its threshold, RST asserts logic low and RST weakly pulls
high. V
CC
of at least 1V guarantees a logic low of 0.4V at
RST.
Programming Pins
The three 3-state input pins: S1, S2 and TOL should be
connected to GND, V1 or left unconnected during normal
operation. Note that when left unconnected, the maximum
APPLICATIO S I FOR ATIO
WUUU
Table 2. Tolerance Programming
Tolerance TOL
5% V1
7.5% Open
10% GND
LTC2904/LTC2905
10
29045fa
Threshold Accuracy
Reset threshold accuracy is of the utmost importance in a
supply sensitive system. Ideally such a system should not
reset while supply voltages are within a specified margin
below the rated nominal level. Both of the LTC2904/
LTC2905 inputs have the same relative threshold accu-
racy. The specification for LTC2904/LTC2905 is ±1.5% of
the programmed nominal input voltage (over the full
operating temperature range).
For example, when the LTC2904/LTC2905 are programmed
to handle a 5V input with 10% tolerance (S1 = S2 = V1 and
TOL = GND, refer to Table 1 and Table 2), it does not issue
a reset command when V1 is above 4.5V. The typical 10%
trip threshold is at 11.5% below the nominal input voltage
level. Therefore, the typical trip threshold for the 5V input
is 4.425V. With ±1.5% accuracy, the trip threshold range
is 4.425V ±75mV over temperature (i.e. 10% to 13%
below 5V). This implies that the monitored system must
operate reliably down to 4.35V over temperature.
The same system using a supervisor with only ±2.5%
accuracy needs to work reliably down to 4.25V (4.375V
±125mV) or 15% below 5V, requiring the monitored
system to work over a much wider operating voltage
range.
In any supervisory application, supply noise riding on the
monitored DC voltage can cause spurious resets, particu-
larly when the monitored voltage is near the reset thresh-
old. A less desirable but common solution to this problem
is to introduce hysteresis around the nominal threshold.
Notice however, this hysteresis introduces an error term
in the threshold accuracy. Therefore, a ±2.5% accurate
monitor with ±1.0% hysteresis is equivalent to a ±3.5%
monitor with no hysteresis.
The LTC2904/LTC2905 takes a different approach to solve
this problem of supply noise causing spurious reset. The
first line of defense against this spurious reset is a first
order low pass filter at the output of the comparator. Thus,
the comparator output goes through a form of integration
before triggering the output logic. Therefore, any kind of
transient at the input of the comparator needs to be of
sufficient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the programmed delay time
t
RST
(200ms for LTC2904 and using an external capacitor
for LTC2905). This delay will eliminate the effect of any
supply noise whose frequency is above 1/t
RST
on the RST
and RST output.
When either V1 or V2 drops below its programmed
threshold, the RST pin asserts low (RST weakly pulls
high). Then when the supply recovers above the pro-
grammed threshold, the reset-pulse-generator timer starts
counting.
If the supply remains above the programmed threshold
when the timer finishes counting, the RST pin weakly pulls
high (RST asserts low). However, if the supply falls below
the programmed threshold any time during the period
when the timer is still counting, the timer resets and it
starts fresh when the supply next rises above the pro-
grammed threshold.
Note that this second line of defense is only effective for a
rising supply and does not affect the sensitivity of the
system to a falling supply. Therefore, the first line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrificing the threshold
accuracy.
Selecting the Reset Timing Capacitor
The reset time-out period for LTC2905 is adjustable in
order to accommodate a variety of microprocessor appli-
cations. Connecting a capacitor, C
TMR
, between the TMR
pin and ground sets the reset time-out period, t
RST
. The
following formula determines the value of capacitor needed
for a particular reset time-out period:
C
TMR
= t
RST
• 110 • 10
–9
[F/s]
For example, using a standard capacitor value of 22nF
would give a 22000/110 = 200ms delay.
APPLICATIO S I FOR ATIO
WUUU
LTC2904/LTC2905
11
29045fa
Figure 1 shows the desired delay time as a function of the
value of the timer capacitor that should be used:
As noted in the Power-Up and Power-Down sections the
circuits that drive RST and RST are powered by V
CC
.
During fault condition, V
CC
of at least 1V guarantees a
maximum V
OL
= 0.4V at RST. However, at V
CC
= 1V the
weak pull-up current on RST is barely turned on. There-
fore, an external pull-up resistor of no more than 100k is
recommended on the RST pin if the state and pull-up
strength of the RST pin is crucial at very low V
CC
.
Note however, by adding an external pull-up resistor, the
pull-up strength on the RST pin is increased. Therefore, if
it is connected in a wired-OR connection, the pull-down
strength of any single device needs to accommodate this
additional pull-up strength.
Output Rise and Fall Time Estimation
The RST and RST outputs have strong pull-down capabil-
ity. The following formula estimates the output fall time
(90% to 10%) for a particular external load capacitance
(C
LOAD
):
t
FALL
≈ 2.2 • R
PD
• C
LOAD
where R
PD
is the on-resistance of the internal pull-down
transistor estimated to be typically 40Ω at room tempera-
ture (25°C) and C
LOAD
is the external load capacitance on
the pin. Assuming a 150pF load capacitance, the fall time
is about 13ns.
The rise time, on the RST and RST pins is limited by weak
internal pull-up current sources to V
CC
. The following
formula estimates the output rise time (10% to 90%) at the
RST and RST pins:
t
RISE
≈ 2.2 R
PU
• C
LOAD
where R
PU
is the on-resistance of the pull-up transistor.
Notice that this pull-up transistor is modeled as a 6µA
current source in the Block Diagram as a typical represen-
tation.
The on-resistance as a function of the V
CC
= Max (V1, V2)
voltage (for V
CC
> 1V) at room temperature is estimated as
Figure 1. Reset Time-Out Period vs Capacitance
Leaving the TMR pin open with no external capacitor
generates a reset time-out of approximately 200µs. For
long reset time-out, the only limitation is the availability of
large value capacitor with low leakage. The TMR capacitor
will never charge if the leakage current exceeds the mini-
mum TMR charging current of 2.1µA (typical).
RST and RST Output Characteristics
The DC characteristics of the RST and RST pull-up and
pull-down strength are shown in the Typical Performance
Characteristics section. Both RST and RST have a weak
internal pull-up to V
CC
= Max (V1, V2) and a strong pull-
down to ground.
The weak pull-up and strong pull-down arrangement allow
these two pins to have open-drain behavior while possess-
ing several other beneficial characteristics.
The weak pull-ups eliminate the need for external pull-up
resistors when the rise time on these pins is not critical. On
the other hand, the open-drain RST configuration allows
for wired-OR connections and can be useful when more
than one signal needs to pull down on the RST line.
APPLICATIO S I FOR ATIO
WUUU
C
TMR
(FARAD)
10p 100p 1n 10n 100n 1µ
RESET TIME OUT PERIOD, t
RST
(ms)
29045 F01
10000
1000
100
10
1
0.1
LTC2904/LTC2905
12
29045fa
2.5V, 1.2V Supply Monitor, 10% Tolerance
3.3V, 1.2V Dual Supply Monitor with LED Power Good Indicator,
7.5% Tolerance and Adjustable Timer
TYPICAL APPLICATIO S
U
V2
RST
RST
GND
V1
S2
S1
TOL
LTC2904
2.5V1.2V
0.1µF
0.1µF
SYSTEM
RESET
2904 TA02
V2
S2
S1
GND
V1
RST
RST
TOL
LTC2904
3.3V
1.2V
0.1µF
0.1µF
2905 TA03
510Ω
LED
SYSTEM
RESET
APPLICATIO S I FOR ATIO
WUUU
follow:
RMAX V V V
PU =Ω
610
12 1
5
•
(, )–
At V
CC
= 3.3V, R
PU
is about 260k. Using 150pF for load
capacitance, the rise time is 86µs. An external pull-up
resistor may be used if the output needs to pull up faster
and/or to a higher voltage, for example: the rise time
reduces to 3.3µs for a 150pF load capacitance, when using
a 10k pull-up resistor.
LTC2904/LTC2905
13
29045fa
3.3V, 1.2V Dual Supply Monitor with Asymmetric Hysteresis, 5%
Tolerance (Supplies Rising), 10% Tolerance (After RST Goes Low)
V2
S2
S1
GND
V1
RST
TOL
RST
LTC2904
3.3V1.2V
0.1µF
0.1µF
SYSTEM
RESET
2904 TA04
10k
TYPICAL APPLICATIO S
U
V1
S1
S2
TOL
V2
TMR
GND
RST
LTC2905
0.1µF
22nF
0.1µF
29045 TA06
V
IN
SUPPLY
CONTROLLER
THREE-STATE
DC/DC
CONVERTER
SYSTEM
LOGIC
5V
3.3V
5V, 3.3V Dual Supply Monitor with Voltage
Margining for Automated On-Board Testing
LTC2904/LTC2905
14
29045fa
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
U
PACKAGE DESCRIPTIO
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.15 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
14
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB8) DFN 1103
0.25 ± 0.05
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.675 ±0.05
2.50 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
PIN 1
CHAMFER OF
EXPOSED PAD
0.50 BSC
LTC2904/LTC2905
15
29045fa
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
TS8 TSOT-23 0802
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.52
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
U
PACKAGE DESCRIPTIO
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC2904/LTC2905
16
29045fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2003
LT/LT 0905 REV A • PRINTED IN USA
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GND
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LTC2905
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S2
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LED
Quad Supply Monitor with LED Undervoltage Indicator,
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