LTC1046
1
Rev. C
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TYPICAL APPLICATION
FEATURES DESCRIPTION
“Inductorless”
5V to –5V Converter
The LT C
®
1046 is a 50mA monolithic CMOS switched
capacitor voltage converter. It plugs in for the ICL7660/
LTC1044 in 5V applications where more output current
is needed. The device is optimized to provide high cur-
rent capability for input voltages of 6V or less. It trades
off operating voltage to get higher output current. The
LTC1046 provides several voltage conversion functions:
the input voltage can be inverted (VOUT = –VIN), divided
(VOUT = VIN/2) or multiplied (VOUT = ±nVIN).
Designed to be pin-for-pin and functionally compatible
with the ICL7660 and LTC1044, the LTC1046 provides
2.5 times the output drive capability.
APPLICATIONS
n 50mA Output Current
n Plug-In Compatible with ICL7660/LTC1044
n ROUT = 35Ω Maximum
n 300μA Maximum No Load Supply Current at 5V
n Boost Pin (Pin 1) for Higher Switching Frequency
n 97% Minimum Open-Circuit Voltage Conversion
Efficiency
n 95% Minimum Power Conversion Efficiency
n Wide Operating Supply Voltage Range: 1.5V to 6V
n Easy to Use
n Low Cost
n Conversion of 5V to ±5V Supplies
n Precise Voltage Division, VOUT = VIN/2
n Supply Splitter, VOUT = ±VS/2
All registered trademarks and trademarks are the property of their respective owners.
Generating – 5V from 5V
Output Voltage vs Load Current for V+ = 5V
LOAD CURRENT, IL (mA)
0
0
OUTPUT VOLTAGE (V)
–1
–2
–3
–4
–5
10 20 30 40
1046 TA02
50
ICL7660/LTC1044,
ROUT = 55Ω
TA = 25°C
LTC1046,
ROUT = 27Ω
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
10µF
10µF
1046 TA01
5V INPUT
–5V OUTPUT
+
+
Operating Temperature Range
LTC1046C ........................................0°C ≤ TA ≤ 70°C
LTC1046I .....................................–40°C ≤ TA ≤ 85°C
LTC1046M (OBSOLETE) ................. –55°C to 125°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ................. 300°C
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1046CN8#PBF LTC1046CN8#TRPBF 8-Lead PDIP 0°C to 70°C
LTC1046IN8#PBF LTC1046IN8#TRPBF 8-Lead PDIP –40°C to 85°C
OBSOLETE PACKAGE
LTC1046MJ8#PBF LTC1046MJ8#TRPBF 8-Lead CERDIP –55°C to 125°C
LTC1046CS8#PBF LTC1046CS8#TRPBF 1046 8-Lead Plastic SO 0°C to 70°C
LTC1046IS8#PBF LTC1046IS8#TRPBF 1046I 8-Lead Plastic SO –40°C to 85°C
Contact the factory for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
1
2
3
4
8
7
6
5
TOP VIEW
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
J8 PACKAGE
8-LEAD CERDIP
TJMAX = 160°C, θJA = 100°C
OBSOLETE PACKAGE
Consider the N8 or S8 for Alternate Source
1
2
3
4
8
7
6
5
TOP VIEW
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
N8 PACKAGE
8-LEAD PDIP
TJMAX = 110°C, θJA = 130°C (N8)
1
2
3
4
8
7
6
5
TOP VIEW
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C
PIN CONFIGURATION
LTC1046
2
Rev. C
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ABSOLUTE MAXIMUM RATINGS
Supply Voltage .........................................................6.5V
Input Voltage on Pins 1, 6 and 7
(Note 2) .................................–0.3 < VIN < (V+) +0.3V
Current into Pin 6 ....................................................20µA
Output Short Circuit Duration
(V+ ≤ 6V) ...................................................Continuous
(Note 1)
LTC1046
3
Rev. C
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ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, COSC = 0pF, unless otherwise noted.
LTC1046C LTC1046I/M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
ISSupply Current RL = ∞, Pins 1 and 7 No Connection
RL = ∞, Pins 1 and 7 No Connection,
V+ = 3V
165
35
300 165
35
300 µA
µA
V+LMinimum Supply Voltage RL = 5kΩl1.5 1.5 V
V+HMaximum Supply Voltage RL = 5kΩl6 6 V
ROUT Output Resistance V+ = 5V, IL = 50mA (Note 3)
V+ = 2V, IL = 10mA
l
l
27
27
60
35
45
85
27
27
60
35
50
90
Ω
Ω
Ω
fOSC Oscillator Frequency V+ = 5V (Note 4)
V+ = 2V
20
4
30
5.5
20
4
30
5.5
kHz
kHz
PEFF Power Efficiency RL = 2.4kΩ95 97 95 97 %
VOUTEFF Voltage Conversion Efficiency RL = ∞97 99.9 97 99.9 %
IOSC Oscillator Sink or Source
Current
VOSC = 0V or V+
Pin 1 = 0V
Pin 1 = V+
l
l
4.2
15
35
45
4.2
15
40
50
µA
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Connecting any input terminal to voltages greater than V+ or less
than ground may cause destructive latch-up. It is recommended that no
inputs from sources operating from external supplies be applied prior to
power-up of the LTC1046.
Note 3: ROUT is measured at TJ = 25°C immediately after power-on.
Note 4: fOSC is tested with COSC = 100pF to minimize the effects of test
fixture capacitance loading. The 0pF frequency is correlated to this 100pF
test point, and is intended to simulate the capacitance at pin 7 when the
device is plugged into a test socket and no external capacitor is used.
LTC1046
4
Rev. C
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TYPICAL PERFORMANCE CHARACTERISTICS
(Using Test Circuit in Figure 1)
SUPPLY VOLTAGE, V+ (V)
0
10
OUTPUT RESISTANCE, RO (Ω)
100
1000
2 5 6 7
1046 G02
1 3 4
TA = 25°C
IL = 3mA
COSC = 100pF
COSC = 0pF
AMBIENT TEMPERATURE (°C)
–55
10
OUTPUT RESISTANCE (Ω)
30
40
50
60
70
80
25 50 100 125
1046 G03
20
–25 0 75
C1 = C2 = 10µF
V+ = 2V, COSC = 0pF
V+ = 5V, COSC = 0pF
LOAD CURRENT, IL (mA)
0
–2.5
OUTPUT VOLTAGE (V)
–2.0
–1.5
–1.0
–0.5
0.0
0.5
2468
1046 G07
10 12 14 16 18 20
1.0
1.5
2.0
2.5
SLOPE = 52Ω
TA = 25°C
V+ = 2V
fOSC = 8kHz
C1 = C2 = 10µF
LOAD CURRENT, IL (mA)
0
–5
OUTPUT VOLTAGE (V)
–4
–3
–2
–1
0
1
10 20 30 40
1046 G08
50 60 70 80 90 100
2
3
4
5
SLOPE = 27Ω
TA = 25°C
V+ = 5V
fOSC = 30kHz
C1 = C2 = 10µF
EXTERNAL CAPACITOR (PIN 7 TO GND), COSC (pF)
1
0.1
OSCILLATOR FREQUENCY, fOSC (kHz)
1
10
100
10 100 10000
1046 G09
1000
V+ = 5V
TA = 25°C
PIN 1 = OPEN
PIN 1 = V+
Output Resistance vs
Oscillator Frequency
Output Resistance vs
Temperature
Output Resistance vs
Supply Voltage
Power Conversion Efficiency vs
Oscillator Frequency
Power Conversion Efficiency vs
Load Current for V+ = 2V
Power Conversion Efficiency vs
Load Current for V+ = 5V
Oscillator Frequency as a
Function of COSC
Output Voltage vs Load Current
for V+ = 5V
Output Voltage vs Load Current
for V+ = 2V
OSCILLATOR FREQUENCY, fOSC (Hz)
100
0
OUTPUT RESISTANCE, RO (Ω)
200
300
400
500
1k 10k 100k
1046 G01
100
TA = 25°C
V+ = 5V
IL = 10mA
C1 = C2
= 1µF
C1 = C2
= 10µF
C1 = C2
= 100µF
LOAD CURRENT, IL (mA)
0
30
POWER CONVERSION EFFICIENCY, PEFF (%)
50
60
70
80
90
100
3 4 6 7
1046 G04
40
1 2 5
PEFF
IS
20
10
0
TA = 25°C
V+ = 2V
C1 = C2 = 10µF
fOSC = 8kHz
8 9 10
3
5
6
7
8
9
10
4
2
1
0
SUPPLY CURRENT (mA)
LOAD CURRENT, IL (mA)
0
30
POWER CONVERSION EFFICIENCY, PEFF (%)
50
60
70
80
90
100
30 40 60 70
1046 G05
40
10 20 50
PEFF
IS
20
10
0
TA = 25°C
V+ = 5V
C1 = C2 = 10µF
fOSC = 30kHz
30
50
60
70
80
90
100
40
20
10
0
SUPPLY CURRENT (mA)
OSCILLATOR FREQUENCY, fOSC (Hz)
100
80
POWER CONVERSION EFFICIENCY, PEFF (%)
86
92
98
100
1k 10k 100k 1M
1046 G06
96
94
90
88
84
82
V+ = 5V
TA = 25°C
C1 = C2
A = 100µF, 1mA
B = 100µF, 15mA
C = 10µF, 1mA
D = 10µF, 15mA
E = 1µF, 1mA
F = 1µF, 15mA
A
C
B
E
D
F
LTC1046
5
Rev. C
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TYPICAL PERFORMANCE CHARACTERISTICS
TEST CIRCUIT
AMBIENT TEMPERATURE (°C)
0
1
OSCILLATOR FREQUENCY, fOSC (kHz)
10
100
1 4 5 7
1046 G10
2 3 6
TA = 25°C
COSC = 0pF
AMBIENT TEMPERATURE (°C)
–55
26
OSCILLATOR FREQUENCY, fOSC (kHz)
30
32
34
36
38
40
25 50 100 125
1046 G11
28
–25 0 75
V+ = 5V
COSC = 0pF
Oscillator Frequency as a
Function of Supply Voltage
Oscillator Frequency vs
Temperature
COSC
EXTERNAL
OSCILLATOR
C2
10µF
VOUT
V+ (5V)
RL
IS
IL
1046 F01
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
10µF
+
+
Figure 1
(Using Test Circuit in Figure 1)
Examination of Figure 4 shows that the LTC1046 has
the same switching action as the basic switched capaci-
tor building block. With the addition of finite switch ON
resistance and output voltage ripple, the simple theory,
although not exact, provides an intuitive feel for how the
device works.
For example, if you examine power conversion efficiency
as a function of frequency (see typical curve), this simple
theory will explain how the LTC1046 behaves. The loss,
and hence the efficiency, is set by the output impedance.
As frequency is decreased, the output impedance will
eventually be dominated by the 1/fC1 term and power effi-
ciency will drop. The typical curves for power efficiency
versus frequency show this effect for various capacitor
values.
Note also that power efficiency decreases as frequency
goes up. This is caused by internal switching losses which
occur due to some finite charge being lost on each switch-
ing cycle. This charge loss per unit cycle, when multiplied
by the switching frequency, becomes a current loss. At
high frequency this loss becomes significant and the
power efficiency starts to decrease.
1046 F04
CAP+
(2)
CAP–
(4)
GND
(3)
VOUT
(5)
V+
(8)
LV
(6)
3x
(1)
OSC
(7)
OSC +2
CLOSED WHEN
V+ > 3.0V
C1
C2
BOOST
SW1 SW2
φ
φ
+
+
LTC1046
6
Rev. C
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Theory of Operation
To understand the theory of operation of the LTC1046,
a review of a basic switched capacitor building block is
helpful.
In Figure 2, when the switch is in the left position, capaci-
tor C1 will charge to voltage V1. The total charge on C1
will be q1 = C1V1. The switch then moves to the right,
discharging C1 to voltage V2. After this discharge time,
the charge on C1 is q2 = C1V2. Note that charge has been
transferred from the source, V1, to the output, V2. The
amount of charge transferred is:
Δq = q1 – q2 = C1(V1 – V2).
If the switch is cycled “f” times per second, the charge
transfer per unit time (i.e., current) is:
I = f • Δq = f • C1(V1 – V2).
APPLICATIONS INFORMATION
Rewriting in terms of voltage and impedance equivalence,
IVV
fC
VV
REQUIV
=
()
=
12
11
12
–
/
–.
A new variable, REQUIV, has been defined such that
REQUIV = 1/fC1. Thus, the equivalent circuit for the
switched capacitor network is as shown in Figure 3.
C1
f
C2
1046 F02
V2V1
RL
C2
REQUIV =
1046 F03
V2V1
RL
REQUIV
1
fC1
Figure 2. Switched Capacitor Building Block
Figure 3. Switched Capacitor Equivalent Circuit
Figure 4. LTC1046 Switched Capacitor Voltage Converter
Block Diagram
CMOS logic gate is best because it can operate over a
wide supply voltage range (3V to 15V) and has enough
voltage swing to drive the internal Schmitt trigger shown
in Figure 5. For 5V applications, a TTL logic gate can be
used by simply adding an external pull-up resistor (see
Figure 6).
Capacitor Selection
While the exact values of CIN and COUT are noncritical,
good quality, low ESR capacitors such as solid tantalum
are necessary to minimize voltage losses at high cur-
rents. For CIN the effect of the ESR of the capacitor will
be multiplied by four, due to the fact that switch currents
are approximately two times higher than output current,
and losses will occur on both the charge and discharge
cycle. This means that using a capacitor with 1Ω of ESR
for CIN will have the same effect as increasing the output
impedance of the LTC1046 by 4Ω. This represents a sig-
nificant increase in the voltage losses. For COUT the effect
of ESR is less dramatic. COUT is alternately charged and
discharged at a current approximately equal to the output
current, and the ESR of the capacitor will cause a step
function to occur, in the output ripple, at the switch transi-
tions. This step function will degrade the output regula-
tion for changes in output load current, and should be
avoided. Realizing that large value tantalum capacitors
can be expensive, a technique that can be used is to par-
allel a smaller tantalum capacitor with a large aluminum
electrolytic capacitor to gain both low ESR and reasonable
cost. Where physical size is a concern some of the newer
chip type surface mount tantalum capacitors can be used.
These capacitors are normally rated at working voltages
in the 10V to 20V range and exhibit very low ESR (in the
range of 0.1Ω).
LV (Pin 6)
The internal logic of the LTC1046 runs between V+ and
LV (Pin 6). For V+ greater than or equal to 3V, an internal
switch shorts LV to GND (Pin 3). For V
+
less than 3V,
the LV pin should be tied to ground. For V+ greater than
or equal to 3V, the LV pin can be tied to ground or left
floating.
OSC (Pin 7) and BOOST (Pin 1)
The switching frequency can be raised, lowered or driven
from an external source. Figure 5 shows a functional dia-
gram of the oscillator circuit.
By connecting the BOOST (Pin 1) to V+, the charge and
discharge current is increased and, hence, the frequency
is increased by approximately three times. Increasing the
frequency will decrease output impedance and ripple for
higher load currents.
Loading Pin 7 with more capacitance will lower the fre-
quency. Using the BOOST pin in conjunction with exter-
nal capacitance on Pin 7 allows user selection of the fre-
quency over a wide range.
Driving the LTC1046 from an external frequency source
can be easily achieved by driving Pin 7 and leaving the
BOOST pin open, as shown in Figure 6. The output cur-
rent from Pin 7 is small, typically 15μA, so a logic gate
is capable of driving this current. The choice of using a
OSC
(7)
1046 F05
LV
(6)
BOOST
(1)
~14pF
I2I
I2I
V+
SCHMITT
TRIGGER
C2
V+
100k
OSC INPUT
REQUIRED FOR TTL LOGIC
–(V+)
1046 F06
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
NC
+
+
LTC1046
7
Rev. C
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APPLICATIONS INFORMATION
Figure 5. Oscillator Figure 6. External Clocking
Negative Voltage Converter
Figure 7 shows a typical connection which will provide
a negative supply from an available positive supply. This
circuit operates over full temperature and power supply
ranges without the need of any external diodes. The LV
pin (Pin 6) is shown grounded, but for V+ ≥ 3V, it may
be floated, since LV is internally switched to GND (Pin 3)
for V+ ≥ 3V.
The output voltage (Pin 5) characteristics of the circuit
are those of a nearly ideal voltage source in series with an
27Ω resistor. The 27Ω output impedance is composed of
two terms: 1) the equivalent switched capacitor resistance
(see Theory of Operation), and 2) a term related to the ON
resistance of the MOS switches.
At an oscillator frequency of 30kHz and C1 = 10μF, the
first term is:
R= 1
f/2
EQUIV
OSC
()
=
=
•
•• .
•–
C1
1
15 10 10 10 67
36
Ω.
Notice that the equation for REQUIV is not a capacitive
reactance equation (XC = 1/ωC) and does not contain a
2π term.
The exact expression for output impedance is complex,
but the dominant effect of the capacitor is clearly shown
on the typical curves of output impedance and power ef-
ficiency versus frequency. For C1 = C2 = 10μF, the output
impedance goes from 27Ω at fOSC = 30kHz to 225Ω at
fOSC = 1kHz. As the 1/fC term becomes large compared
to switch ON resistance term, the output resistance is
determined by 1/fC only.
Voltage Doubling
Figure 8 shows a two diode, capacitive voltage doubler.
With a 5V input, the output is 9.1V with no load and 8.2V
with a 10mA load.
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
10µF
10µF
1046 F07
V+
1.5V TO 6V
VOUT = –V+
REQUIRED FOR V+ < 3V
TMIN ≤ TA ≤ TMAX
+
+
Ultraprecision Voltage Divider
An ultraprecision voltage divider is shown in Figure 9. To
achieve the 0.0002% accuracy indicated, the load current
should be kept below 100nA. However, with a slight loss
in accuracy, the load current can be increased.
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
10µF 10µF
VDVD
+
+
1046 F08
V+
1.5V TO 6V
VOUT = 2
(VIN – 1)
REQUIRED
FOR
V+ < 3V + +
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
10µF
C2
10µF
TMIN ≤ TA ≤ TMAX
IL ≤ 100nA
REQUIRED FOR V+ < 6V
1046 F09
V+
3V TO 12V
+
+
±0.002%
V+
2
Figure 7. Negative Voltage Converter Figure 9. Ultrtaprecision Voltage Divider
Figure 8. Voltage Doubler
LTC1046
8
Rev. C
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TYPICAL APPLICATIONS
Battery Splitter
A common need in many systems is to obtain positive
and negative supplies from a single battery or single
power supply system. Where current requirements are
small, the circuit shown in Figure 10 is a simple solution.
It provides symmetrical positive or negative output volt-
ages, both equal to one half the input voltage. The output
voltages are both referenced to Pin 3 (output common). If
the input voltage between Pin 8 and Pin 5 is less than 6V,
Pin 6 should also be connected to Pin 3, as shown by the
dashed line.
Paralleling for Lower Output Resistance
Additional flexibility of the LTC1046 is shown in Figures
Figure 11 and Figure 12. Figure 11 shows two LTC1046s
connected in parallel to provide a lower effective output
resistance. If, however, the output resistance is dominated
by 1/fC1, increasing the capacitor size (C1) or increasing
the frequency will be of more benefit than the paralleling
circuit shown.
Figure 12 makes use of “stacking” two LTC1046s to pro-
vide even higher voltages. In Figure 12, a negative voltage
doubler or tripler can be achieved depending upon how
Pin 8 of the second LTC1046 is connected, as shown
schematically by the switch.
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
10µF
VB
9V
C2
10µF
OUTPUT COMM0N
REQUIRED FOR VB < 6V
3V ≤ VB ≤ 12V 1046 F10
+VB/2
4.5V
–VB/2
–4.5V
+
+
Figure 10. Battery Splitter
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
C1
10µF
C1
10µF
+
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
1/4 CD4077
+
C2
20µF
1046 F11
VOUT = –(V+)
OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE
V+
+
Figure 11. Paralleling for 100mA Load Current
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
V+
10µF
C1
10µF
–(V+)
+
1
2
3
4
8
7
6
5
V+
OSC
LV
VOUT
BOOST
CAP+
GND
CAP–
LTC1046
FOR VOUT = –2V+
FOR VOUT = –3V+
+
10µF10µF
1046 F12
VOUT
++
Figure 12. Stacking for Higher Voltage
LTC1046
9
Rev. C
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TYPICAL APPLICATIONS
LTC1046
10
Rev. C
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PACKAGE DESCRIPTION
OBSOLETE PACKAGE
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1 2 34
8 7 6 5
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
LTC1046
11
Rev. C
For more information www.analog.com
PACKAGE DESCRIPTION
N8 REV I 0711
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ±.005
(3.302 ±0.127)
.020
(0.508)
MIN
.018 ±.003
(0.457 ±0.076)
.120
(3.048)
MIN
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
( )
1 2 34
87 65
.255 ±.015*
(6.477 ±0.381)
.400*
(10.160)
MAX
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
LTC1046
12
Rev. C
For more information www.analog.com
PACKAGE DESCRIPTION
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 REV G 0212
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
C 05/19 Obsolete CERDIP package 2, 10
(Revision history begins at Rev C)
LTC1046
13
Rev. C
For more information www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LTC1046
14
Rev. C
For more information www.analog.com
ANALOG DEVICES, INC. 1991
05/19
www.analog.com
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