MGA-635T6 GPS Low Noise Amplifier with Variable Bias Current and Shutdown Function Data Sheet Description Features Avago Technologies' MGA-635T6 is a LNA designed for GPS/ISM/Wimax applications in the (0.9-2.4)GHz frequency range. The LNA uses Avago Technologies's proprietary GaAs Enhancement-mode pHEMT process to achieve high gain operation with very low noise figures and high linearity. Noise figure distribution is very tightly controlled. Gain and supply current are guaranteed parameters. A CMOS compatible shutdown pin is included to turn the LNA off and provide a variable bias. x Low Noise Figure : 0.74dB The MGA-635T6 LNA is useable down to 1V operation. It achieves low noise figures and high gain even at 1V, making it suitable for use in critical low power GPS/ISM band applications. x CMOS compatible shutdown pin (VSD) current @ 2.85V : 60uA Component Image Surface Mount 2.0x1.3x0.4 mm3 6-lead UTSLP x High Gain : 14.5dB x High linearity and P1dB x GaAs E-pHEMT Technology x Low component count x Wide Supply Voltage : 1V to 3.6V x Shutdown current : < 0.1uA x Adjustable bias current via one single external resistor/voltage x Shutdown function x Small Footprint: 2 x 1.3mm2 x Low Profile : 0.4 mm . 3FYM Top View Bottom View Note: Package marking provides orientation and identification "3F" = Product Code "Y" = Year of manufacture "M" = Month of manufacture x Ext matching for non-GPS freq band operation Specifications At 1.575GHz, 2.85V 6.3mA (Typ) Gain = 14.5 dB (Typ) NF = 0.74 dB (Typ) IIP3 = 3.5 dBm (Typ) IP1dB = 2.5 dBm (Typ) S11 = -8 dB (Typ) S22 = -10.4 dB (Typ) At 1.575GHz, 2.85V 8mA (Typ) Gain = 15.7 dB (Typ) NF = 0.8 dB (Typ) IIP3 = 3.5 dBm (Typ) IP1dB = 1 dBm (Typ) S11 = -11.8 dB (Typ) S22 = -9.3 dB (Typ) Applications x GPS, ISM & WiMax Bands LNA Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 40 V ESD Human Body Model = 250 V Refer to Avago Technologies Application Note A004R: Electrostatic Discharge, Damage and Control. Absolute Maximum Rating [1] TA=25qC Thermal Resistance [3] (Vdd = 2.85V, Ids = 4.9mA), Tjc = 73 qC/W Symbol Parameter Units Absolute Max. Vdd Device Drain to Source Voltage [2] V 3.6 Ids Drain Current [2] mA 15 Pin,max CW RF Input Power (Vdd = 2.85V, Ids=4.9mA) dBm +10 Pdiss Total Power Dissipation [4] mW 54 Tj Junction Temperature C 150 TSTG Storage Temperature C -65 to 150 Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage. 2. Assuming DC quiescent conditions 3. Thermal resistance measured using Infra-Red measurement technique. 4. Board (module belly) temperature TB is 25 qC. Derate 14mW/ qC for TB>146 qC. Product Consistency Distribution Charts [5,6] stdev=0.42 stdev=0.06 13 14 15 16 .5 Figure1. Gain @ 1.575GHz; LSL = 12.5dB, Nominal = 14.5dB, USL=16.3dB .6 .7 .8 .9 1 1.1 1.2 1.3 Figure2. NF @ 1.575GHz; Nominal = 0.74dB, USL=1.3dB stdev=0.96 3 4 5 6 7 8 9 10 Figure3. Ids @ 1.575GHz; Nominal = 6.3mA, USL = 10mA Note: 5. Distribution data sample size is 5000 samples taken from 2 different non-consecutive wafer lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. 6. Measurements are made on a production test board, which can show a variance of up to 1dB in gain and OIP3 compared to a soldered-down demo board. Input trace losses have been de-embedded from actual measurements. 2 Electrical Specifications TA = 25 C, DC bias for RF parameters is Vdd = Vsd = +2.85V , measured on demo board (see Fig. 4) unless otherwise specified. VDD= VSD = +2.85V, R1 = 22K Ohm, Freq=1.575GHz - Typical Performance[7] Table 1. Performance table at nominal operating conditions Symbol Parameter and Test Condition Units Min. Typ Max. G Gain dB 12.5 14.5 16.3 NF Noise Figure dB - 0.74 1.3 IP1dB Input 1dB Compressed Power dBm 2.5 IIP3[8] Input 3rd Order Intercept Point (2-tone @ Fc +/- 2.5MHz) dBm 3.5 S11 Input Return Loss dB -8 S22 Output Return Loss dB - 10.4 Ids Supply Current mA 6.3 Ish Shutdown Current @ VSD = 0V uA 0.1 Vds Supply Voltage V 2.85 IP1dB1710M Out of Band IP1dB (DCS 1710MHz) blocking dBm 4 IIP3OUT Out of Band IIP3 (DCS 1775MHz & 1950MHz) dBm 6.5 10 VDD = +2V, VDD= +1.5V & VDD= +1.0V, Freq=1.575GHz - Typical Performance (VSD=VDD, R1=0 Ohm) Table 2. Typical performance at low operation voltages with R1 (see Fig 4) set to 0 Ohm Symbol Parameter and Test Condition Units Vdd=2V Vdd=1.5V Vdd=1V G Gain dB 16.2 15.5 13.8 NF Noise Figure dB 0.7 0.8 0.9 IP1dB Input 1dB Compressed Power dBm -1.8 -3.5 -5.2 IIP3[8] Input 3rd Order Intercept Point (2-tone @ Fc +/- 2.5MHz) dBm 7.5 5.3 3.6 S11 Input Return Loss dB -10.4 -9 -7.5 S22 Output Return Loss dB -14 -13 -11 Ids Supply Current mA 15 10 4.5 Ish Shutdown Current @ VSD = 0V uA 0.1 0.1 0.1 Vds Supply Voltage V 2 1.5 1.0 IP1dB1710M Out of Band IP1dB (DCS 1710MHz) blocking dBm -0.5 -2.2 -4 IIP3OUT Out of Band IIP3 (DCS 1775MHz & 1950MHz) dBm 10.5 8.3 7 Notes: 7. Measurements at 1.575GHz obtained using demo board described in Fig 4. 8. 1.575GHz IIP3 test condition: FRF1 = 1575 MHz, FRF2 = 1577.5 GHz with input power of -20dBm per tone measured at lower side band 3 Circuit Symbol Size Desciption L1 0402 5.6 nH Inductor L2 0402 12 nH Inductor L3 0402 6.8 nH Inductor L4 0402 33 nH Inductor C1, C2 0402 6.8 pF Capacitor C3 0603 0.1 uF Capacitor R1 0402 22K Ohm Resistor R2 0402 12 Ohm Resistor Figure 4. Demoboard and application circuit components table 4 Vdd = +2.85V C C3 C=0.1 uF C C2 C=6.8 pF Vs d = +2.85V P RL P RL1 R2 =12 Ohm L4 =33 nH Toko 0402 C C1 C=6.8 pF R R1 R=22 kOhm 4 L L3 L=6.8 nH R= Toko 0402 6 BIAS RF_IN 5 RF_OUT 2 L L1 L=5.6 nH Toko 0402 C C Amplifie r2 AMP 1 L L2 L=12 nH Toko 0402 GND Figure 5. Demoboard schematic diagram Notes 1. L1 and L2 form the input matching network. The LNA module has a built-in coupling and DC-block capacitor at the input and output. Best noise performance is obtained using high-Q wirewound inductors. This circuit demonstrates that low noise figures are obtainable with standard 0402 chip inductors. Replacing L1, L2 and L3 with high-Q wirewound inductors (eg. Cilcraft 0402CS series) will yield 0.1dB lower NF and 0.2dB higher Gain. 2. L3 is an output matching inductor. 3. C1 is a RF bypass capacitor. 4. PRL1 is a network that isolates the measurement demoboard from external disturbances. C2 and C3 mitigates the effect of external noise pickup on the VSD and VDD lines. These components are not required in actual operation. 5. Bias control is achieved by either varying the VSD voltage without R1 or fixing the VSD voltage to VDD and varying R1. Typical value for R1 is 22k Ohm for 5mA total current at VDD=+2.85V. 5 MGA-635T6 Typical Performance Curves, Vdd=Vsd=+2.85V, R1=22KOhm measured on demoboard (see Fig.4) at 1.575GHz (At 25C unless specified otherwise) 16 1.2 15 1.1 14 1 NF (dB) Gain (dB) 13 12 11 10 0.9 0.8 0.7 9 1.575 GHz 8 2 GHz 0.6 7 2.45 GHz 0.5 1.575 GHz 2 GHz 2.45 GHz 6 2.4 2.6 2.8 3 3.2 0.4 3.4 2.4 2.6 2.8 Vdd (V) 6 7 5 6 3.4 5 4 3 2 1.575 GHz 1 2 GHz 4 3 2 1.575 GHz 2 GHz 2.45 GHz 1 2.45 GHz 0 0 2.4 2.6 2.8 3 3.2 3.4 2.4 2.6 Vdd (V) Figure 9. IP1dB vs Vdd vs Freq 8 7 6 5 4 3 1.575 GHz 2 2 GHz 1 2.45 GHz 0 2.4 2.6 2.8 3 Vdd (V) Figure 10. Ids vs Vdd vs Freq 2.8 3 Vdd (V) Figure 8. IIP3 vs Vdd vs Freq Ids (mA) 3.2 Figure 7. NF vs Vdd vs Freq IP1dB (dBm) IIP3 (dBm) Figure 6. Gain vs Vdd vs Freq 6 3 Vdd (V) 3.2 3.4 3.2 3.4 MGA-635T6 Typical Performance Curves, Vdd=Vsd=+2.85V, R1=22KOhm measured on demoboard (see Fig.4) (At 25C unless specified otherwise) 18 1.4 16 1.2 1 NF (dB) Gain (dB) 14 12 25 deg 10 85 deg 2.6 2.8 3 3.2 0 3.4 2.4 Vdd (V) 2.6 3.2 3.4 4 5 3.5 4 IP1dB (dBm) 3.5 3 2.5 2 25 deg 1.5 -40 deg 1 3 2.5 2 1.5 85 deg 25 deg -40 deg 85 deg 1 0.5 0 0.5 2.4 2.6 2.8 3 3.2 3.4 2.4 2.6 Vdd (V) Figure 14. IP1dB vs Vdd vs Temp 8 7 6 5 4 3 25 deg 2 -40 deg 1 85 deg 0 2.4 2.6 2.8 3 Vdd (V) Figure 15. Ids vs Vdd vs Temp 2.8 3 Vdd (V) Figure 13. IIP3 vs Vdd vs Temp Ids (mA) 3 Figure 12. NF vs Vdd vs Temp 4.5 7 2.8 Vdd (V) Figure 11. Gain vs Vdd vs Temp IIP3 (dBm) 25 deg -40 deg 85 deg 0.2 6 2.4 0.6 0.4 -40 deg 8 0.8 3.2 3.4 3.2 3.4 Package Dimensions PIN #1 DOT BY MARKING PIN #1 INDICATOR R 0.10 0.40 0.05 0.20 0.15 2.00 0.05 1.10 1.30 0.05 0.50 3FYM 1.20 0.20 TOP VIEW SIDE VIEW BOTTOM VIEW PCB Land Pattern 1.700 1.100 0.435 0.286 0.300 R0.100 0.350 1.300 0.350 Top Metal Solder Mask Opening 0.230 0.332 0.310 Land Pattern With Via 1.960 1.700 0.435 1.700 0.435 0.260 0.500 0.510 0.260 0.500 0.230 0.310 Stencil Opening Notes: 1. All dimension are in MM 2. Via hole is optional. 3. Recommend to use standard 4 mils Stencil thickness 8 0.230 Combined Land Pattern & Stencil Opening 0.260 0.286 Stencil Outline Drawing and Combined Land Pattern & Stencil Layout Device Orientation REEL USER FEED DIRECTION 3FYM CARRIER TAPE USER FEED DIRECTION 3FYM 3FYM TOP VIEW END VIEW COVER TAPE Tape Dimensions 1.50 0.10 4.0 0.10 2.00 0.05 4.0 0.10 1.75 0.10 3.50 0.05 8.00 +0.30/-0.10 0.20 0.20 0.15 45 MAX. 45 MAX. 0.73 0.05 2.17 0.05 Ao Ko Part Number Ordering Information 9 Part Number No. of Devices Container MGA-635T6-BLKG 100 Antistatic bag MGA-635T6-TR1G 3000 7" Reel MGA-635T6-TR2G 10000 13" Reel 1.67 0.05 Bo Reel Dimensions O178.01.0 FRONT BACK SEE DETAIL "X" RECYCLE LOGO FRONT VIEW 7.9-10.9** 65 45 8.4 +1.5* -0.0 R10.65 R5.2 O55.00.5 BACK 60 O178.01.0 FRONT Slot hole 'b' Slot hole 'a' EMBOSSED RIBS RAISED: 0.25mm, WIDTH: 1.25mm O51.20.3 BACK VIEW For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2009 Avago Technologies. All rights reserved. Obsoletes AV01-0188EN AV02-0215EN - November 17, 2009 14.4* MAX.