PET2000-12-074xA is a 2000 Watt AC to DC, power-factor corrected
(PFC) power supply that converts standard AC power into a main
output of +12 VDC.
PET2000-12-074xA utilizes full digital control architecture for greater
efficiency, control and functionality.
This power supply meets international safety standards and displays
the CE-Mark for the European Low Voltage Directive (LVD).
Best-in-class, 80 PLUS Certified “Platinum” Efficiency
Auto-Selected Input Voltage Ranges: 90 - 140 VAC, 180 - 264 VAC
AC Input with Power Factor Correction
2000 W Continuous Output Power Capability
Always-On 12 V Standby Output
Hot-Plug Capable
Parallel Operation with Active Current Sharing
Full Digital Controls for Improved Performance
High Density Design: 42.1 W/in3
Small Form Factor: 265 x 73.5 x 40 mm (10.43 x 2.89 x 1.57 in)
Power Management Bus Communication Protocol for Control,
Programming
and Monitoring
Status LED with Fault Signaling
Networking Switches
Servers & Routers
Telecommunications
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Power Level
Dash
V1 Output
Dash
Width
Airflow
Input
AC Inlet1
2000 W
12 V
74 mm
N: Normal
R: Reverse
A: AC
Blank: C14
C: C16
A: Saf-D-Grid®
The PET2000-12-074xA AC/DC power supply is a fully DSP controlled, highly efficient front-end power supply. It incorporates
resonance-soft-switching technology to reduce component stresses, providing increased system reliability and very high efficiency.
With a wide input operational voltage range the PET2000-12-074xA maximizes power availability in demanding server, network, and
other high availability applications. The supply is fan cooled and ideally suited for integration with a matching airflow path.
The PFC stage is digitally controlled using a state-of-the-art digital signal processing algorithm to guarantee best efficiency and
unity power factor over a wide operating range.
The DC/DC stage uses soft switching resonant techniques in conjunction with synchronous rectification. An active OR-ing device
on the output ensures no reverse load current and renders the supply ideally suited for operation in redundant power systems.
The always-on standby output provides power to external power distribution and management controllers. It is protected with an
active OR-ing device for maximum reliability.
Status information is provided with a front-panel LED. In addition, the power supply can be controlled and the fan speed set via the
I2C bus. The I2C bus allows full monitoring of the supply, including input and output voltage, current, power, and inside temperatures.
Cooling is managed by a fan controlled by the DSP controller. The fan speed is adjusted automatically depending on the actual
power demand and supply temperature and can be overridden through the I2C bus.
Logic Signals
V1_SENSE
L
Curr
ent
limit
Aux
Converter
GND
V1
VSB
N
PFC
DC
DC
Digital
Primary
Controls
V1_SENSE_RTN
I2C
PWM
Filter
PE
PWM
Communication Bus
A2..0
Digital
Secondary
Controls
EEPROM
Fan
ISHARE
Figure 1. PET2000-12-074xA Block Diagram
Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-term reliability and
cause permanent damage to the supply.
PARAMETER
CONDITIONS / DESCRIPTION
MIN
MAX
UNITS
Vi maxc
Maximum Input
Continuous
264
VAC
1
C14 = IEC 60320-C14 type, C16 = IEC 60320-C16 type, Saf-D-Grid® = Anderson Saf-D-Grid®
PET2000-12-074xA
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General Condition: TA = 0… 55 °C, unless otherwise noted.
PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
Vi nom
Nominal Input Voltage
Rated Voltage High Line (
Vi nom HL
)
200
230
240
VAC
Rated Voltage Low Line (
Vi nom LL
)
100
115
127
VAC
Vi
Input Voltage Ranges
Normal operating (
Vi min HL
to
Vi max HL
), High Line
180
264
VAC
Normal operating (
Vi min LL
to
Vi max LL
), Low Line
90
140
VAC
Ii max
Maximum Input Current
Vi
=100 VAC,
I1
= 83 A,
ISB
= 5 A
13
ARMS
Vi
= 200 VAC,
I1
=167 A,
ISB
= 5 A
12
Vi
= 200 VAC,
I1
= 145 A,
ISB
= 5 A
10
Vi
= 220 VAC,
I1
= 158 A,
ISB
= 5 A
10
Vi
= 230 VAC,
I1
= 167 A,
ISB
= 5 A
10
Ii inrush
Inrush Current Limitation
Vi min
to
Vi max
,
TNTC
= 25°C, 5 ms
10
Ap
fi
Input Frequency
47
50/60
63
Hz
PF
Power Factor
Vi
= 230 VAC, 10% load
0.8
0.880
W/VA
Vi
= 230 VAC, 20% load
0.9
0.950
W/VA
Vi
= 230 VAC, 50% load
0.9
0.997
W/VA
Vi
= 230 VAC, 100% load
0.95
0.999
W/VA
THD
Total Harmonic Distortion
TBD
TBD
%
Vi on
Turn-on Input Voltage2
Ramping up
87
90
VAC
Vi off
Turn-off Input Voltage2
Ramping down
82
87
VAC
η
Efficiency3
Vi
= 230 VAC, 10% load
90
91.6
%
Vi
= 230 VAC, 20% load
91
93.8
%
Vi
= 230 VAC, 50% load
94
94.4
%
Vi
= 230 VAC, 100% load
91
92.8
%
TV1 holdup
Hold-up Time
V1
Vi
= 230 VAC, 50% load, 0°
18
ms
Vi
= 230 VAC, 100% load, 0°
9
ms
TVSB holdup
Hold-up Time
VSB
Vi
= 90 to 264 VAC, 0 to 100% load
70
ms
2
The Front-End is provided with a minimum hysteresis of 3 V during turn-on and turn-off within the ranges
3
Efficiency measured without fan power per EPA server guidelines
4.1 INPUT CONNECTOR
PET2000-12-074NA power supply is available in 3 different input connector configurations. The versions with IEC 60320-C14
and IEC 60320-C16 have a limited current of 10 A for areas outside North America, in addition the IEC 60320-C14 has a
limited component temperature of 70°C. The Anderson Saf-D-Grid® has no limitation with respect to both current and
temperature.
The PET2000-12-074NA power supply is available with IEC 60320-C14.
Below table shows the maximum rated operating conditions for the different input connector options. The applied operating
condition must remain within these conditions to allow safety compliant operation.
See also 10.3 MAXIMUM OUTPUT POWER VERSUS INLET TEMPERATURE FOR SAFETY COMPLIANCY for detailed
derating curves.
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TYPE
INPUT CONNECTOR
REGION
APPLIED RATED
MAINS AC VOLTAGE4
MAX
I
5
MAXIMUM
DERATED
I1
AT
MAXIMUM
TA
PET2000-12-074RA
IEC 60320-C14
North America
100 to 127 VAC
83.3 A
50 A at
TA
= 55°C
200 to 240 VAC
167 A
100 A at
TA
= 55°C
Other than
North America
100 to 127 VAC
67 A / 83.3 A
for BSMI
50 A at
TA
= 55°C
200 to 220 VAC
145 A
100 A at
TA
= 55°C
220 to 230 VAC
158 A
100 A at
TA
= 55°C
230 to 240 VAC
167 A
100 A at
TA
= 55°C
PET2000-12-074NA
IEC 60320-C14
North America
100 to 127 VAC
83.3 A
50 A at
TA
= 70°C
200 to 240 VAC
167 A
100 A at
TA
= 70°C
Other than
North America
100 to 127 VAC
67 A / 83.3 A
for BSMI
17.5 A at
TA
= 65°C
200 to 220 VAC
145 A
32.5 A at
TA
= 65°C
220 to 230 VAC
158 A
40 A at
TA
= 65°C
230 to 240 VAC
167 A
43 A at
TA
= 65°C
PET2000-12-074NAC
IEC 60320-C16
North America
100 to 127 VAC
83.3 A
50 A at
TA
= 70°C
200 to 240 VAC
167 A
100 A at
TA
= 70°C
Other than
North America
100 to 127 VAC
67 A / 83.3 A
for BSMI
40 A at
TA
= 70°C
200 to 220 VAC
145 A
87 A at
TA
= 70°C
220 to 230 VAC
158 A
95 A at
TA
= 70°C
230 to 240 VAC
167 A
100 A at
TA
= 70°C
PET2000-12-074NAA
Anderson Saf-D-Grid®
All
100 to 127 VAC
83.3 A
50 A at
TA
= 70°C
200 to 240 VAC
167 A
100 A at
TA
= 70°C
4
Nominal grid voltage, does not include typical fluctuations of ±10%; e.g. listed range 230-240 VAC allows operation
at 230 VAC -10% to 240 VAC +10%, so 207 … 264 VAC actual voltage to account for grid fluctuations
5
Maximum Input current for PET2000-12-074RA at
TA
= 40°C and for PET2000-12-074NAx at
TA
= 55°C
4.2 INPUT FUSE
Time-lag 16 A input fuse (5 x 20 mm) in series with the L-line inside the power supply protects against severe defects.
The fuse is not accessible from the outside and is therefore not a serviceable part.
4.3 INRUSH CURRENT
The AC-DC power supply exhibits an X-capacitance of only 5.9 μF, resulting in a low and short peak current, when the supply
is connected to the mains. The internal bulk capacitor will be charged through an NTC which will limit the inrush current.
NOTE:
Do not repeat plug-in / out operations within a short time, or else the internal in-rush current limiting device (NTC) may not
sufficiently cool down and excessive inrush current or component failure(s) may result.
4.4 INPUT UNDER-VOLTAGE
If the sinusoidal input voltage stays below the input undervoltage lockout threshold Vi on, the supply will be inhibited.
Once the input voltage returns within the normal operating range, the supply will return to normal operation again.
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4.5 POWER FACTOR CORRECTION
Power factor correction (PFC) is achieved by controlling the input current waveform synchronously with the input voltage.
A fully digital controller is implemented giving outstanding PFC results over a wide input voltage and load ranges.
The input current will follow the shape of the input voltage. If for instance the input voltage has a trapezoidal waveform, then
the current will also show a trapezoidal waveform.
4.6 EFFICIENCY
High efficiency (see
Figure 2)
is achieved by using state-of-the-art silicon power devices in conjunction with soft-transition
topologies minimizing switching losses and a full digital control scheme. Synchronous rectifiers on the output reduce the
losses in the high current output path. The speed of the fan is digitally controlled to keep all components at an optimal
operating temperature regardless of the ambient temperature and load conditions.
Figure 2. Efficiency vs. Load current (ratio metric loading)
Figure 3. Power factor vs. Load current
Figure 4. Inrush current, Vi = 230Vac, 90°
CH2: Vi (200V/div), CH3: Ii (5A/div)
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
V1 nom
Nominal Output Voltage
0.5
I1 nom
,
TA
= 25°C
12.0
VDC
V1 set
Output Setpoint Accuracy
-0.5
+0.5
%
V1 nom
dV1 tot
Static Regulation
Vi min LL
to
Vi max HL
, 0 to 100%
I1 nom
-1
+1
%
V1 nom
P1 nom
Nominal Output Power6
Vi min HL
to
Vi max HL
2000
W
Vi min LL
to
Vi max LL
1000
W
P1 peak
Peak Output Power6
Vi min HL
to
Vi max HL
2100
W
Vi min LL
to
Vi max LL
1320
W
I1 nom
Output Current
Vi min HL
to
Vi max HL
0
167
ADC
I1 nom red
Vi min LL
to
Vi max LL
0
83
ADC
I1 peak
Peak Output Current7
Vi min HL
to
Vi max HL
0
175
ADC
I1 peak red
Vi min LL
to
Vi max LL
0
110
ADC
V1 pp
Output Ripple Voltage8
Vi min LL
to
Vi max HL
, 0 to 75%
I1 nom
,
Cext
= 0 mF
120
mVpp
Vi min LL
to
Vi max HL
, 75 to 100%
I1 nom
,
Cext
= 0 mF
150
mVpp
Vi min LL
to
Vi max HL
, 0 to 100%
I1 nom
,
Cext
1 mF/Low ESR
120
mVpp
dV1 load
Load Regulation
0 to 100%
I1 nom
-83
-110
-138
mV
dV1 line
Line Regulation
Vi min HL
to
Vi max HL
, 0.5
I1 nom
-24
0
24
mV
dV1 temp
Thermal Drift
0.5
I1 nom, TA
= 0 ... 55°C
-0.4
mV/°C
dI1 share
Current Sharing
Difference between individual
I1
,
1 … 8 power supplies in parallel
-6
+6
ADC
VISHARE
Current Share Bus Voltage
VISHARE
at 167A
8
VDC
VISHARE
Current Share Bus Voltage
I1 peak
9.14
VDC
dV1 lt
Load Transient Response
Δ
I
1 = 50%
I1 nom
,
I1
= 5 … 100%
I1 nom
,
Cext
= 0 mF
0.35
0.6
VDC
dV1 lt
Δ
I
1 = 10%
I1 nom
,
I1
= 0 … 10%
I1 nom
,
Cext
= 0 mF
0.35
0.6
VDC
trec
Recovery Time
d
I
1/d
t
= 1A/μs, recovery within 1% of
V1 nom
0.5
1
ms
V1 dyn
Dynamic Load Regulation
Δ
I
1 = 60%
I1 nom
,
I1
= 5 … 167 A,
f
= 50 ... 5000 Hz, Duty cycle = 10 ... 90%,
Cext
= 2 ... 30 mF
11.4
12.6
V
tV1 rise
Output Voltage Rise Time
V1
= 10…90%
V1 nom
,
Cext
< 10 mF
1
30
ms
tV1 ovr sh
Output Turn-on Overshoot
0 to 100%
I1 nom
0.6
V
dV1 sense
Remote Sense
Compensation for cable drop, 0 to 100%
I1 nom
0.25
V
CV1 load
Capacitive Loading
0
30
mF
6
See also chapter TEMPERATURE AND FAN CONTROL
7
Peak combined power for all outputs must not exceed 2100 W; maximum of peak power duration is 20 seconds without asserting
the SMBAlert signal
8
Measured with a 10 uF low ESR capacitor in parallel with a 0.1 uF ceramic capacitor at the point of measurement
5.1 MAIN OUTPUT V1
General Condition: TA = 0…40 °C (PET2000-12-074RA), TA = 0…55 °C (PET2000-12-074NA), Vi = 230 VAC unless otherwise
noted.
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
VSB nom
Nominal Output Voltage
ISB = 0 A
,
TA
= 25°C
12.1
VDC
VSB set
Output Setpoint Accuracy
-1
+1
%V
SBnom
dVSB tot
Total Regulation
Vi min LL
to
Vi max HL
, 0 to 100%
ISB nom
-5
+1
%V
SBnom
PSB nom
Nominal Output Power
Vi min LL
to
Vi max HL
PET2000-12-074RA
PET2000-12-074NA
36
60
W
W
PSB peak
Peak Output Power8
Vi min LL
to
Vi max HL
PET2000-12-074RA
PET2000-12-074NA
36
60
W
ISB nom
Output Current
Vi min LL
to
Vi max HL
PET2000-12-074RA
PET2000-12-074NA
0
3
5
ADC
ISB peak
Peak Output Current9
Vi min LL
to
Vi max HL
PET2000-12-074RA
PET2000-12-074NA
0
3.3
5.3
ADC
VSB pp
Output Ripple Voltage7
Vi min LL
to
Vi max HL
, 0 to 100%
ISB nom
,
Cext
= 0 mF
120
mVpp
dVSB load
Load Regulation
0 to 100%
ISB nom
PET2000-12-074RA
PET2000-12-074NA
-144
-290
-240
-430
-330
-570
mV
mV
dVSB line
Line Regulation
Vi min HL
to
Vi max HL
,
ISB nom = 0 A
-24
0
24
mV
dVSB temp
Thermal Drift
ISB = 0 A
-0.5
mV/°C
dISB share
Current Sharing
Deviation from
ISB tot
/ N,
ISB
= 0.5
ISB nom
-1
+1
ADC
VSB dyn
Load Transient Response
Δ
ISB
= 50%
ISB nom
,
ISB
= 5 … 100%
ISB nom
,
d
ISB
/d
t
= 1A/μs, recovery within 1% of
VSB nom
0.2
0.3
VDC
trec
Recovery Time
1
2
ms
VSB dyn
Dynamic Load Regulation
Δ
ISB
= 1A,
ISB
= 0 …
ISB nom
,
f
= 50 ... 5000 Hz,
Duty cycle = 10 ... 90%,
Cext
= 0 ... 5 mF
11.4
12.6
V
tVSB rise
Output Voltage Rise Time
VSB
= 10…90%
VSB nom
,
Cext
< 1 mF
1
2
5
ms
tVSB ovr sh
Output Turn-on Overshoot
0 to 100%
ISB nom
0.6
V
CVSB load
Capacitive Loading
0
3100
μF
Figure 5. Turn-On AC Line 230VAC, full load (200ms/div)
CH1: Vin (400V/div) CH2: PWOK_H (5V/div)
CH3: V1 (2V/div) CH4: VSB (2V/div)
Figure 6. Rise time V1 at 230VAC, full load (2ms/div)
CH3: V1 (2V/div)
9
In single power supply configuration
5.2 STANBY OUTPUT VSB
General Condition: TA = 0…40 °C (PET2000-12-074RA), TA = 0…55 °C (PET2000-12-074NA), Vi = 230 VAC unless otherwise
noted.
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Figure 7. Rise time VSB at 230VAC, full load (2ms/div)
CH4: VSB (2V/div)
Figure 8. Turn-Off AC Line 230VAC, full load (20ms/div)
CH1: Vin (400V/div) CH2: PWOK_H (5V/div)
CH3: V1 (2V/div) CH4: VSB (2V/div)
Figure 9. Turn-Off AC Line 230VAC, half load (20ms/div)
CH1: Vin (400V/div) CH2: PWOK_H (5V/div)
CH3: V1 (2V/div) CH4: VSB (2V/div)
Figure 10. Short circuit on V1 (10ms/div)
CH3: V1 (2V/div) CH4: I1 (100A/div)
Figure 11. Load transient V1, 83 to 167A (500
μ
s/div)
CH3: V1 (200mV/div) CH4: I1 (50A/div)
Figure 12. Load transient V1, 167 to 83A (500
μ
s/div)
CH3: V1 (200mV/div) CH4: I1 (50A/div)
5.3 OUTPUT GROUND / CHASSIS CONNECTION
The output return path serves as power and signal ground. All output voltages and signals are referenced to these pins. To
prevent a shift in signal and voltage levels due to ground wiring voltage drop a low impedance ground plane should be used
as shown in
Figure 13
. Alternatively, separated ground signals can be used as shown in
Figure 14.
In this case the two ground planes should be connected together at the power supplies ground pins.
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
F
Input fuse (L)
Not use accessible, time-lag (T)
16
A
V1 OV
OV Threshold
V1
Over Voltage
V1
Protection, Latch-off Type
13.3
13.9
14.5
VDC
tV1 OV
OV Trip Time
V1
1
ms
VSB OV
OV Threshold
VSB
Over Voltage
V1
Protection, Automatic retry each 1s
13.3
13.9
14.5
VDC
tVSB OV
OV Trip Time
VSB
1
ms
I1 OC Slow
OC Limit
V1
Over Current Limitation, Latch-off,
Vi min HL
to
Vi max HL
169
175
ADC
Over Current Limitation, Latch-off,
Vi min LL
to
Vi max LL
85
88
ADC
tV1 OC Slow
OC Trip time
V1
Over Current Limitation, Latch-off time
20
s
IV1 OC Fast
Fast OC Limit
V1
Fast Over Current Limit., Latch-off,
Vi min HL
to
Vi max HL
176
180
ADC
Fast Over Current Limit., Latch-off,
Vi min LL
to
Vi max LL
110
115
ADC
tV1 OC Fast
Fast OC Trip time
V1
Fast Over Current Limitation, Latch-off time
50
55
60
ms
I1 SC
Max Short Circuit Current
V
1
V1
< 3 V
180
A
tV1 SC
Short Circuit Regulation Time
V1
< 3 V, time until
I1
is limited to <
I1 sc
2
ms
ISB OC
OC Limit
VSB
Over Current Limitation, Constant-Current Type
5.2
7.5
A
tVSB OC
OC Trip time
VSB
Over Current Limit., time until
ISB
is limited to
ISB OC
1
ms
TSD
Over Temperature
See chapter 10.2
°C
NOTE:
Within the power supply the output GND pins are connected to the Chassis, which in turn is connected to the Protective Earth
terminal on the AC inlet. Therefore, it is not possible to set the potential of the output return (GND) to any other than Protective
Earth potential.
Figure 13. Common low impedance ground plane
Figure 14. Separated power and signal ground
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6.1 OVERVOLTAGE PROTECTION
PET2000-12-074xA front-end provides a fixed threshold overvoltage (OV) protection implemented with a HW comparator for
both the main and the standby output. Once an OV condition has been triggered on the main output, the supply will shut down
and latch the fault condition. The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the
PSON_L input. The standby output will continuously try to restart with a 1 s interval after OV condition has occurred.
6.2 UNDERVOLTAGE DETECTION
Both main and standby outputs are monitored. LED and PWOK_H pin signal if the output voltage exceeds ±5% of its
nominal voltage.
The main output will latch off if the main output voltage
V1
falls below 10 V (typically in an overload condition) for more than
55 ms. The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the PSON_L input.
If the standby output leaves its regulation bandwidth for more than 2 ms then the main output is disabled to protect the system.
6.3 CURRENT LIMITATION
MAIN OUTPUT
The main output exhibits a substantially rectangular output characteristic controlled by a software feedback loop. If output
current exceeds
IV1 OC Fast
it will reduce output voltage in order to keep output current at
IV1 OC Fast
. If the output voltage drops
below ~10.0 VDC for more than 55 ms, the output will latch off (standby remains on), see also
Undervoltage Detection.
Figure 15. Current Limitation on V1
at Vi = 90 ... 140
VAC
Figure 16 .Current Limitation on V1
at Vi = 180 … 264
VAC
A second SW controlled current limit will latch off the main output if the power supply is operated for long duration in its peak
current capability region. This protection trips as soon as the output current exceeds
I1 OC Slow
for a duration of more than 20 s.
The third current limitation implemented as a fast hardware circuit will immediately switch off the main output if the output
current increases beyond the peak current trip point, occurring mainly if a short circuit is applied to the output voltage.
The supply will re-start 4 ms later with a soft start, if the short circuit persists (
V1
< 10.0 V for >55 ms) the output will latch off;
otherwise it continuous to operate.
The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the PSON_L input.
The main output current limitation thresholds for
I1 OC Slow
and
I1 OC Fast
depend on the actual input voltage range applied to the
power supply. In addition, the threshold for
I1 OC Slow
is reduced when ambient temperature exceeds 55°C, see
Figure 38
for
PET2000-12-074RA and
Figure 46
for PET2000-12-074NA.
STANDBY OUTPUT
The standby output exhibits a substantially rectangular output characteristic down to 0 V (no hiccup mode / latch off).
The current limitation of the standby output is independent of the AC input voltage.
Running in current limitation causes the output voltage to fall, this will trigger under voltage protection and disables the main
output, see also
Undervoltage Detection.
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
Vi mon
Input RMS Voltage
Vi min LL
Vi
Vi max HL
-3
+3
VAC
Ii mon
Input RMS Current
Ii
> 6.7 Arms
-3
+3
%
Ii
6.7 Arms
-0.2
+0.2
Arms
Pi mon
True Input Power
Pi
> 500 W
-4
+4
%
50 W <
Pi
500 W
-20
+20
W
V1 mon
V1 Voltage
-0.1
+0.1
VDC
I1 mon
V1 Current
I1
> 50 A
-1
+1
%
5 A <
I1
50 A
-0.5
+0.5
ADC
P1 nom
V1 Output Power
Pi
> 1000 W
-1
+1
%
50 W <
Pi
1000 W
-10
+10
W
VSB mon
VSB Voltage
-0.1
+0.1
VDC
ISB mon
VSB Current
-0.1
+0.1
ADC
TA mon
Inlet Temperature
TA min
TA
TA max
-2
+2
°C
PET2000-12-074RA
PET2000-12-074NA
Figure 17. Current Limitation on VSB
The power supply operating parameters can be accessed through I2C interface. For more details refer to chapter
I2C / POWER MANAGEMENT BUS COMMUNICATION and document URP.00234 (PET Front-End Power Management Bus
Communication Manual).
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
PSON_H / HOTSTANDBYEN_H
VIL
Input Low Level Voltage
PSON_L: Main output enabled
-0.2
0.8
V
HOTSTANDBYEN_H: Hot Standby mode
not allowed
VIH
Input High Level Voltage
PSON_L: Main output disabled
2
3.5
V
HOTSTANDBYEN_H: Hot Standby mode
allowed
IIL,H
Maximum Input Sink or Source Current
VI
= -0.2 V to +3.5 V
-1
1
mA
Rpull up
Internal Pull up Resistor to internal 3.3 V
10
k
RLOW
Maximum external Pull down Resistance
to GND to obtain Low Level
1
k
RHIGH
Minimum external Pull down Resistance
to GND to obtain High Level
50
k
PWOK_H
VOL
Output Low Level Voltage
V1
or
VSB
out of regulation,
VIsink
< 4 mA
0
0.4
V
VOH
Output High Level Voltage
V1
and
VSB
in regulation
, Isource
< 0.5 mA
2.4
3.5
V
Rpull up
Internal Pull up Resistor to internal 3.3 V
1
k
IOL
Maximum Sink Current
VO
< 0.4 V
4
mA
8.1 ELECTRICAL CHARACTERISTICS
8.2 SENSE INPUTS
The main output has sense lines implemented to compensate for voltage drop on load wires in both positive and negative
path. The maximum allowed voltage drop is 200 mV on the positive rail and 50 mV on the GND rail.
With open sense inputs the main output voltage will rise by 270 mV. Therefore, if not used, these inputs should be connected
to the power output and GND at the power supply connector. The sense inputs are protected against short circuit. In this case
the power supply will shut down.
8.3 CURRENT SHARE
The PET front-ends have an active current share scheme implemented for
V1
. All the ISHARE current share pins need to be
interconnected in order to activate the sharing function. If a supply has an internal fault or is not turned on, it will disconnect
its ISHARE pin from the share bus. This will prevent dragging the output down (or up) in such cases.
The current share function uses an analog bus to transmit and receive current share information. The controller implements a
Master/Slave current share function. The power supply providing the largest current among the group is automatically the
Master. The other supplies will operate as Slaves and increase their output current to a value close to the Master by slightly
increasing their output voltage. The voltage increase is limited to +250 mV.
The standby output uses a passive current share method (droop output voltage characteristic).
8.4 PSON_L INPUT
The PSON_L is an internally pulled-up (3.3 V) input signal to enable/disable the main output
V1
of the front-end. With low level
input the main output is enabled. This active-low pin is also used to clear any latched fault condition. The PSON_L can be
either controlled by an open collector device or by a voltage source.
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PSU 1 PDU
PSU 2
3.3V
3.3V
PSU 1 PDU
PSU 2
3.3V
3.3V
PSON_L
PSON_L
PSON_L
PSON_L
Figure 18. PSON_L connection
8.5 PWOK_H OUTPUT
The PWOK_H is an open drain output with an internal pull-up to 3.3 V indicating whether both
VSB
and
V1
outputs are within
regulation. This pin is active-high.
An external pull down resistor ensures low level when there is no power supply seated. When combining PWOK_H outputs of
several power supplies, circuits as shown in
Figure 19
should be used.
PSU 1 PDU
PSU 2
3.3V
PWOK_H
3.3V
PWOK_H
PSU PDU
3.3V
>10kΩ
PSU 1 PDU
PSU 2
3.3V
PWOK_H
3.3V
PWOK_H 1kΩ
3.3V
>10kΩ
PWOK_H
Figure 19. PWOK_H connection
8.6 HOT-STANDBY IN-/OUTPUT
The hot-standby operation is an operating mode allowing to further increase efficiency at light load conditions in a redundant
power supply system. Under specific conditions one of the power supplies is allowed to disable its DC/DC stage. This will
save the power losses associated with this power supply and at the same time the other power supply will operate in a load
range having a better efficiency. In order to enable the hot standby operation, the HOTSTANDBYEN_H and the ISHARE pins
need to be interconnected between the power supplies. A power supply will only be allowed to enter the hot-standby mode,
when the HOTSTANDBYEN_H pin is high, the load current is low, see
Figure 20
, and the supply was allowed to enter the hot-
standby mode by the system controller via the appropriate I2C command (by default disabled). The system controller needs to
ensure that only one of the power supplies is allowed to enter the hot-standby mode.
If a power supply is in a fault condition, it will pull low its active-high HOTSTANDBYEN_H pin which indicates to the other
power supply that it is not allowed to enter the hot-standby mode or that it needs to return to normal operation should it already
have been in the hot-standby mode.
NOTE:
The system controller needs to ensure that only one of the power supplies is allowed to enter the hot-standby mode.
Figure 21
shows the achievable power loss savings when using the hot-standby mode operation. A total power loss reduction
of approx. 10 W is achievable.
14
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1 PSU on
2 PSU on
80A37.5A
Total
System
Current
167A
Figure 20. Hot-standby enable/disable current thresholds
Figure 21. PSU power losses with/without hot-standby mode
PSU 1 PSU 2
VSB
CS
HOTSTANDBYEN_H
V1
VSB
CS
HOTSTANDBYEN_H
V1
Figure 22. Recommended hot-standby configuration
8.7 PRESENT_L OUTPUT
The PRESENT_L pin is wired through a 100 Ohms resistor to internal GND within the power supply. This pin does indicate that
there is a power supply present in this system slot. An external pull-up resistor has to be added within the application. Current
into PRESENT_L should not exceed 5 mA to guarantee a low level voltage if power supply is seated.
PSU PDU
PRESENT_L
100Ω
Vext
Figure 23. PRESENT_L connection
8.8 SIGNAL TIMING
AC
Input
VSB
V1
tAC VSB tVSB rise
tV1 rise
tAC V1
tPWOK_H del
tVSB V1 del
PSON_L
PWOK_H
AC
Input
VSB
V1
tV1 holdup
tV1 off
tPWOK_H warn
tAC drop1
tAC drop2
PSON_L
PWOK_H tPWOK_H holdup
Figure 24. AC turn-on timing
Figure 25. AC short dips
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PARAMETER
DESCRIPTION /
CONDITION
MIN
NOM
MAX
UNIT
tAC VSB
AC Line to 90%
VSB
1.5
s
tAC V1
AC Line to 90%
V1
PSON_L = Low
1.5
4 10
s
tVSB V1 del
VSB
to
V1
delay
PSON_L = Low
50
150
1000
ms
tV1 rise
V1
rise time
See chapter
OUTPUT
tVSB rise
VSB
rise time
See chapter
OUTPUT
tAC drop1
AC drop without
V1
leaving regulation
0.5
I1 nom
,
ISB nom
17
ms
0.7
I1 nom
,
ISB nom
13
ms
I1 nom
,
ISB nom
5
ms
tAC drop2
AC drop without
VSB
leaving regulation
I1 nom
,
ISB nom
70
ms
tV1 holdup
Loss of AC to
V1
leaving regulation
See chapter
INPUT
tVSB holdup
Loss of AC to
VSB
leaving regulation
See chapter
INPUT
tPWOK_H del
Outputs in regulation to PWOK_H asserted
100
150
200
ms
tPWOK_H warn
Warning time from de-assertion of PWOK_H to
V1
leaving regulation
0.15
ms
tPWOK_H holdup
Loss of AC to PWOK_H de-asserted
Vi nom HL, I1 nom
,
ISB nom
10
ms
tPWOK_H low
Time PWOK_H is kept low after being de-asserted
100
ms
tPSON_L V1 on
Delay PSON_L active to
V1
in regulation
Cext
= 0 mF
5
10
20
ms
tPSON_L V1 off
Delay PSON_L de-asserted to
V1
disabled
2
3
4
ms
tPSON_L PWOK_H
Delay PSON_L de-asserted to PWOK_H de-asserted
1
2
ms
tV1 off
Time
V1
is kept off after leaving regulation
1
s
tVSB off
Time
VSB
is kept off after leaving regulation
1
s
10
At repeated ON-OFF cycles the start-up times may increase by 1s
AC
Input
VSB
V1
tVSB holdup
tV1 holdup
tV1 off
tVSB off
tPWOK_H warn
PSON_L
PWOK_H
tPWOK_H holdup
VSB
AC
Input
V1
PSON_L
PWOK_H
tPSON_L V1 on
tV1 rise
tPWOK_H del
tPSON_L PWOK_H
tPWOK_H warn
tPSON V1 off
tV1 off
tPWOK_H low
Figure 26. AC long dips
Figure 27. PSON_L turn-on/off timing
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OPERATING CONDITION 11
LED SIGNALING
No AC or AC Line in UV condition,
VSB
not present from paralleled power supplies
Off
PSON_L High
Blinking Green 1 Hz
Hot-Standby Mode
No AC or AC Line in UV condition,
VSB
present from paralleled power supplies
Solid Amber
V
1 or
V
SB out of regulation
Over temperature shutdown
Output over voltage shutdown (
V
1 or
V
SB)
Output over current shutdown (
V
1 or
V
SB)
Fan error (>15%)
Over temperature warning
Blinking Amber 1 Hz
Minor fan regulation error (>5%, <15%)
Firmware boot loading in process
Blinking Green 2 Hz
Outputs V1 and VSB in regulation
Solid Green
Table 1. LED Status
11
The order of the criteria in the table corresponds to the testing precedence in the controller
8.9 LED INDICATOR
The front-end has one front LED showing the status of the supply. The LED is bi-colored: green and amber, and indicates AC
and DC power presence and warning or fault conditions.
Table 1
lists the different LED status.
The PET front-end is a communication Slave device only; it never initiates messages on the I2C / SMBus by itself. The
communication bus voltage and timing is defined in
Table 2
and further characterized through:
The SDA/SCL IOs use 3.3 V logic levels
External pull-up resistors on SDA/SCL required for
correct signal edges
Full SMBus clock speed of 100 kbps
Clock stretching limited to 1 ms
SCL low time-out of >25 ms with recovery within 10 ms
Recognizes any time Start/Stop bus conditions
3.3V
Rpull-up
TX
RX
SDA/SCL
3.3V
10kΩ
DSP or EEPROM
TX_EN
Figure 28. Physical layer of communication interface
Communication to the DSP or the EEPROM will be possible as long as the input AC voltage is provided. If no AC is present,
communication to the unit is possible as long as it is connected to a life
VSB
output (provided e.g. by the redundant unit).
If only
V1
is provided, communication is not possible.
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PARAMETER
DESCRIPTION
CONDITION
MIN
MAX
UNIT
SCL / SDA
V
iL
Input low voltage
-0.5
1.0
V
V
iH
Input high voltage
2.3
3.5
V
V
hys
Input hysteresis
0.15
V
V
oL
Output low voltage
3 mA sink current
0
0.4
V
t
r
Rise time for SDA and SCL
20+0.1Cb1
300
ns
t
of
Output fall time ViHmin ViLmax
10 pF < Cb1 < 400 pF
20+0.1Cb1
250
ns
I
i
Input current SCL/SDA
0.1 VDD < Vi < 0.9 VDD
-10
10
μA
C
i
Internal Capacitance for each SCL/SDA
50
pF
f
SCL
SCL clock frequency
0
100
kHz
R
pull-up
External pull-up resistor
fSCL 100 kHz
1000 ns / Cb1
t
HDSTA
Hold time (repeated) START
fSCL 100 kHz
4.0
μs
t
LOW
Low period of the SCL clock
fSCL 100 kHz
4.7
μs
t
HIGH
High period of the SCL clock
fSCL 100 kHz
4.0
μs
t
SUSTA
Setup time for a repeated START
fSCL 100 kHz
4.7
μs
t
HDDAT
Data hold time
fSCL 100 kHz
0
3.45
μs
t
SUDAT
Data setup time
fSCL 100 kHz
250
ns
t
SUSTO
Setup time for STOP condition
fSCL 100 kHz
4.0
μs
t
BUF
Bus free time between STOP and START
fSCL 100 kHz
5
ms
1 Cb = Capacitance of bus line in pF, typically in the range of 10…400 pF
Table 2. I2C / SMBus Specification
Figure 29. I2C / SMBus Timing
ADDRESS SELECTION
The address for I2C communication can be configured by pulling address input pins A2, A1 and A0 either to GND
(Logic Low) or leave them open (Logic High). An internal pull up resistor will cause the A2 / A1 / A0 pin to be in High Level if
left open. A fixed addressing offset exists between the Controller and the EEPROM.
tr
tLOW
tHIGH
tLOW
tHDSTA
tSUSTA tHDDAT tSUDAT tSUSTO tBUF
tof
SDA
SCL
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A2
A1
A0
I2C Address12
Controller
EEPROM
0
0
0
0xB0
0xA0
0
0
1
0xB2
0xA2
0
1
0
0xB4
0xA4
0
1
1
0xB6
0xA6
1
0
0
0xB8
0xA8
1
0
1
0xBA
0xAA
1
1
0
0xBC
0xAC
1
1
1
0xBE
0xAE
Table 3. Address and protocol encoding
PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
SMB_ALERT_L
Vext
Maximum External Pull up Voltage
12
V
IOH
Maximum High Level Leakage Current
No Failure or Warning condition,
VO
= 12 V
10
µA
VOL
Output Low Level Voltage
Failure or Warning condition,
Isink
< 4 mA
0
0.4
V
Rpull up
Internal Pull up Resistor to internal 3.3 V
None
IOL
Maximum Sink Current
VO
< 0.4 V
4
mA
PSU 1 PDU
PSU 2
SMB-
ALERT_L
Vext
SMB-
ALERT_L
Figure 30. SMBALERT_L connection
12
The LSB of the address byte is the R/W bit
9.1 SMBALERT_L OUTPUT
The SMBALERT_L signal indicates that the power supply is experiencing a problem that the system agent should investigate.
This is a logical OR of the Shutdown and Warning events. It is asserted (pulled Low) at Shutdown or Warning events such as
reaching temperature warning/shutdown threshold of critical component, general failure, over-current, over-voltage, under-
voltage or low-speed of a failed fan. This signal may also indicate the power supply is operating in an environment exceeding
the specified limits.
The SMBAlert signal is asserted simultaneously with the LED turning to solid amber or blinking amber.
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9.2 CONTROLLER AND EEPROM ACCESS
The controller and the EEPROM in the power supply share the same I2C bus physical layer (see
Figure 31
) and can be
accessed under different addresses, see ADDRESS SELECTION.
The SDA/SCL lines are connected directly to the controller and EEPROM which are supplied by internal 3.3 V.
The EEPROM provides 256 bytes of user memory. None of the bytes are used for the operation of the power supply.
DSP
EEPROM
SDA
SCL
A2..0
Protection
Address Selection
Figure 31. I2C Bus to DSP and EEPROM
9.3 EEPROM PROTOCOL
The EEPROM follows the industry communication protocols used for this type of device. Even though page write / read
commands are defined, it is recommended to use the single byte write / read commands.
WRITE
The write command follows the “SMBus 1.1 Write Byte Protocol”. After the device address with the write bit cleared, the Two
Byte Data Address is sent followed by the data byte and the STOP condition. A new START condition on the bus should only
occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory.
READ
The read command follows the “SMBus 1.1 Read Byte Protocol”. After the device address with the write bit cleared the two
byte data address is sent followed by a repeated start, the device address and the read bit set. The EEPROM will respond with
the data byte at the specified location.
9.4 POWER MANAGEMENT BUS PROTOCOL
The Power Management Bus is an open standard protocol that defines means of communicating with power conversion
and other devices. For more information, please see the System Management Interface Forum web site at:
www.powerSIG.org.
Power Management Bus command codes are not register addresses. They describe a specific command to be executed.
PET2000-12-074xA supply supports the following basic command structures:
Clock stretching limited to 1 ms
SCL low time-out of >25 ms with recovery within 10 ms
Recognized any time Start/Stop bus conditions
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WRITE
The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte
or after the first data byte (Byte command) or then after sending 2 data bytes (Word command).
In addition, Block write commands are supported with a total maximum length of 255 bytes. See PET2000-12-074xA Power
Management Bus Communication Manual URP.00234 for further information.
READ
The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word.
In addition, Block read commands are supported with a total maximum length of 255 bytes. See PET2000-12-074xA Power
Management Bus Communication Manual URP.00234 for further information.
9.5 GRAPHICAL USER INTERFACE
Bel Power Solutions provides with its “I2C Utility” a Windows® XP/Vista/Win7 compatible graphical user interface allowing the
programming and monitoring of the PET2000-12-074xA Front-End.
The utility can be downloaded on: belfuse.com/power-solutions and supports both the PSMI and Power Management Bus
protocols.
The GUI allows automatic discovery of the units connected to the communication bus and will show them in the navigation
tree. In the monitoring view the power supply can be controlled and monitored.
If the GUI is used in conjunction with the YTM.00046 Evaluation Board it is also possible to control the PSON_L pin of the
power supply. Refer to BCG.00809 for YTM.00046 connection and GUI configuration.
S Address W A Command A
Data Low Byte1) A Data High Byte1) A P
1) Optional
S Address W A Command A
Byte 1 A Byte N A P
Byte Count A
S Address W A Command A
Data (Low) Byte AS Address R A Data High Byte1) nA P
1) Optional
S Address W A Command A
Byte 1 A
S Address R A
Byte N nA PByte Count A
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Figure 32. Monitoring dialog of the I2C Utility
10.1 FAN CONTROL
To achieve best cooling results sufficient airflow through the supply must be ensured. Do not block or obstruct the
airflow at the rear of the supply by placing large objects directly at the output connector. The PET2000-12-074RA
is provided with a front to rear airflow, which means the air enters on the AC-inlet side of the supply and leaves at
the DC-output, while the PET2000-12-074NA is provided with a rear to front airflow, which means the air enters
through the DC-output of the supply and leaves at the AC-inlet side, as shown in
Figure 33
.
The PET2000-12-074xA supply has been designed for horizontal operation.
PET2000-12-074RA
PET2000-12-074NA
Figure 33. Airflow direction
Airflow
Airflow
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Table 4. Temperature sensor location and thresholds
The fan inside the supply is controlled by a microprocessor. The rpm of the fan is adjusted to ensure optimal supply
cooling and is a function of output power. Three different curves are selected based on input voltage and inlet
temperature. With standby output loaded the fan speed minimum is limited to ensure enough cooling of circuits
providing standby power.
Figure 34
illustrates the programmed fan curves.
PET2000-12-074RA
PET2000-12-074NA
Figure 34. Fan speed vs. main output load
10.2 TEMPERATURE MONITOR AND OVER TEMPERATURE PROTECTION
PET2000-12-074xA provides access via I2C to the measured temperatures of in total 6 sensors within the power
supply, see
Table 4
. The microprocessor is monitoring these temperatures and if warning threshold of one of these
sensors is reached it will set fan to maximum speed. If temperatures continue to rise above shut down threshold
the main output
V1
(or
VSB
if auxiliary converter is affected) will be disabled. At the same time the warning or fault
condition is signalized accordingly through LED, PWOK_H and SMBALERT_L.
TEMPERATURE
SENSOR
DESCRIPTION / CONDITION
POWER
MANAGEMENT
BUS REGISTER
WARNING
THRESHOLD
SHUTDOWN
THRESHOLD
PET2000-12-074RA
Inlet Air Temperature
Sensor located on control board close to DC
end of PSU
8Dh
61°C
63°C
Synchronous Rectifier
Sensor located on secondary side of DC/DC
stage
8Eh
105°C
110°C
Primary Heat Sink
Sensor located on primary heat sink
8Fh
96°C
101°C
Output ORing Element
Sensor located close to output
D2h
105°C
110°C
Auxiliary Converter
Sensor located on secondary side on auxiliary
rectifier
D3h
95°C
100°C
Outlet Ambient
Sensor located near output connector
D4h
85°C
90°C
PET2000-12-074NA
Inlet Air Temperature
Sensor located on control board close to DC
end of PSU
8Dh
75°C
78°C
Synchronous Rectifier
Sensor located on secondary side of DC/DC
stage
8Eh
95°C
100°C
Primary Heat Sink
Sensor located on primary heat sink
8Fh
87°C
92°C
Output ORing Element
Sensor located close to output
D2h
100°C
105°C
Auxiliary Converter
Sensor located on secondary side on auxiliary
rectifier
D3h
80°C
85°C
Bridge Rectifier
Sensor located on heat sink for AC rectifier
D4h
86°C
91°C
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10.3 MAXIMUM OUTPUT POWER VERSUS INLET TEMPERATURE FOR SAFETY COMPLIANCY
For safety compliant operation the power supply must not exceed specified operating conditions specified herein.
These operating conditions ensure the input AC connector is operated within its ratings.
The different input AC connectors and regional usage is not considered in this implementation of current limitation.
Therefore, it is under the responsibility of the user to ensure safety compliant operation.
110.3.1
PET2000-12-074RA
Between 0°C and 40°C power supply inlet temperature the maximum allowed output power is only depending on AC
input connector type chosen, regional usage and the applied nominal input AC voltage. Above 40°C the maximum
output power is further reduced with rising temperature.
Figure 35
to
Figure 38
illustrate these maximum current and
power levels.
The mentioned power levels are related to main output power only, in addition the standby output can be operated up
to 5 A with derating to 3 A as shown in
Figure 37
.
Above 55°C the power supply is adjusting the current limit level
I1 OC Slow
depending on input voltage range
(100-127 VAC or 200-240 VAC) and inlet temperature, as shown in
Figure 38
to protect the power supply from excessive
component temperatures.
Figure 35. Maximum I1 PET2000-12-074RA
(IEC 60320-C14)
Figure 36. Maximum P1 PET2000-12-074RA
(IEC 60320-C14)
Figure 37. Maximum ISB
Figure 38. Current limitation vs temperature
24
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Figure 39. Maximum I1 PET2000-12-074NA
(IEC 60320-C14)
Figure 40. Maximum P1 PET2000-12-074NA
(IEC 60320-C14)
Figure 41. Maximum I1 PET2000-12-074NAC
(IEC 60320-C16)
Figure 42. Maximum P1 PET2000-12-074NAC
(IEC 60320-C16)
Figure 43. Maximum I1 PET2000-12-074NAA
(Anderson Saf-D-Grid®)
Figure 44. Maximum P1 PET2000-12-074NAA
(Anderson Saf-D-Grid®)
110.3.2
PET2000-12-074NA
Between 0°C and 55°C power supply inlet temperature the maximum allowed output power is only depending on AC
input connector type chosen, regional usage and the applied nominal input AC voltage. Above 55°C the maximum
output power is further reduced with rising temperature.
Figure 39
to
Figure 44
illustrate these maximum current and
power levels.
The mentioned power levels are related to main output power only, in addition the standby output can be operated up
to 5 A with derating to 3 A as shown in
Figure 45
.
Above 55°C the power supply is adjusting the current limit level
I1 OC Slow
depending on input voltage range (100-127
VAC or 200-240 VAC) and inlet temperature, as shown in
Figure 46.
PET2000-12-074xA
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Figure 45. Maximum ISB
Figure 46. Current limitation vs temperature
PARAMETER
DESCRIPTION / CONDITION
CRITERION
ESD Contact Discharge
IEC / EN 61000-4-2, ±8 kV, 25+25 discharges per test point
(metallic case, LED, connector body)
A
ESD Air Discharge
IEC / EN 61000-4-2, ±15 kV, 25+25 discharges per test point
(non-metallic user accessible surfaces)
A
Radiated Electromagnetics Filed
IEC / EN 61000-4-3, 10 V/m, 1 kHz/80% Amplitude Modulation, 1µs
Pulse Modulation, 10 kHz ... 2 GHz
A
Burst
IEC / EN 61000-4-4, Level 3
AC port ±2 kV, 1 minute
A
Surge
IEC / EN 61000-4-5, Level 3
Line to Earth: ±2 kV
Line to Line: ±1 kV
A
RF Conducted Immunity
IEC / EN 61000-4-6, Level 3, 10 Vrms, CW, 0.1 … 80 MHz
A
Voltage Dips and Interruptions
IEC / EN 61000-4-11
Vi 230VAC / 50 Hz, 90% load, Phase 0°, Dip 100% , duration 10 ms
Vi 200VAC / 50 Hz, 70% load, Phase 0°, Dip 30% , duration 500 ms
1. Vi 200VAC / 50 Hz, 100% load, Phase 0°, Dip 20% , duration 10 s
V1
: A,
VSB
: A
V1
: A,
VSB
: A
V1
: A,
VSB
: A
PARAMETER
DESCRIPTION / CONDITION
CRITERION
Conducted Emission
EN 55022 / CISPR 22: 0.15 … 30 MHz, QP and AVG,
single power supply
Class A
6 dB margin
EN 55022 / CISPR 22: 0.15 … 30 MHz, QP and AVG,
2 power supplies in a system
Class A
Radiated Emission
EN 55022 / CISPR 22: 30 MHz … 1 GHz, QP,
single power supply
Class A
6 dB margin
EN 55022 / CISPR 22: 30 MHz … 1 GHz, QP,
2 power supplies in a system
Class A
Harmonic Emissions
IEC 61000-3-2, Vi = 115 VAC / 60 Hz & 230 VAC / 50 Hz, 100% Load
Class A
AC Flicker
IEC 61000-3-3, Vi = 230 VAC / 50Hz, 100% Load
Pass
Acoustical Noise
Distance at bystander position, 25°C, 50% Load
65 dBA
11.1 IMMUNITY
11.2 EMISSION
26
PET2000-12-074xA
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PARAMETER
DESCRIPTION / CONDITION
NOTES
Agency Approvals
Approved to latest edition of the following standards:
UL/CSA60950-1, IEC60950-1 and EN60950-1.
NEMKO NO86275, EAC NO 0230738, COC
Approved
Grade of Insulation
Input (L/N) to chassis (PE)
Basic
Input (L/N) to output
Reinforced
Output to chassis
None (Direct connection)
Creepage / Clearance
Primary (L/N) to chassis (PE)
Primary to secondary
Electrical Strength Test
Input to chassis
Input to output (tested by manufacturer only)
Min. 2121 VDC
4242 VDC
PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
TA
Ambient Temperature
Up to 1’000 m ASL
0
+40
+55*
°C
Linear derating from 1’000 to 3’048 m ASL
+35
+45*
°C
TA ext
Extended Temp. Range
Reduced output power13, up to 1’000 m ASL
+55
+70*
°C
Linear derating from 1’000 to 3’048 m ASL
+50
+60*
TS
Storage Temperature
Non-operational
-20
+70
°C
Altitude
Operational, above Sea Level
-
3’048
m
Non-operational, above Sea Level
-
10’600
m
Shock, operational
Half sine, 11ms, 10 shocks per direction,
6 directions
1
g peak
Shock, non-operational
30
g peak
Vibration, sinusoidal, operational
IEC/EN 60068-2-6, sweep 5 to 500 to 5 Hz,
1 octave/min, 5 sweep per axis
1
g peak
Vibration, sinusoidal, non-operational
4
g peak
Vibration, random, non-operational
IEC/EN 60068-2-64, 5 to 500 Hz,
1 hour per axis
0.025
g2/Hz
* Max temperature values for PET2000-12-074NA model.
PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
MTBF
Mean time to failure
TA
= 25°C, according Telcordia SR-332, issue 3, GB,
confidence level = 90%
860
kh
PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
Dimensions
Width
73.5
mm
Heigth
40.0
mm
Depth
265.0
mm
m
Weight
1.1
kg
13
See chapter 10.3
Maximum electric strength testing is performed in the factory according to IEC/EN 60950, and UL 60950. Input-to-output
electric strength tests should not be repeated in the field. Bel Power Solutions will not honor any warranty claims resulting
from electric strength field tests.
PET2000-12-074xA
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Figure 47. Top and side view
Figure 48. Front view
Figure 49. Rear view
15.1 OUTLINE PET2000-12-074xA, PET2000-12-074xAC
28
PET2000-12-074xA
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15.2 OUTLINE PET2000-12-074NAA
Figure 50. Top and side view
Figure 51. Front view
Figure 52. Detail A
PET2000-12-074xA
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15.3 OPTION OF ADDING KEYING SCREW
A thread added to the side of the PET2000-12-074xA allows the user to add a screw to prevent the PET2000-12-074xA from
being inserted into systems using other card edge connector types with the same power supply width and height.
In such case, systems using PET2000-12-074xA must have a slot of ø6 mm x 14 mm implemented to allow
PET2000-12-074xA to be inserted. The maximum size of the screw head is ø6 mm and height 2.12 mm.
Figure 53. Polarizing screw
15.4 OUTPUT CONNECTOR PIN LOCATIONS
Figure 54. Rear view
Figure 55. Card edge PCB top view
Figure 56. Card edge PCB bottom view
P36
P29
P19
P28
S13
S24
P1
P10
P18
P11
S12
S1
P1
P36
S12
S13
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PARAMETER
DESCRIPTION / CONDITION
MIN
NOM
MAX
UNIT
AC inlet
PET2000-12-074xA : IEC 60320-C14
PET2000-12-074xAC : IEC 60320-C16
PET2000-12-074NAA: Anderson Saf-D-Grid®, P/N 2006G1
AC cord requirement
Wire size
16
AWG
Output connector
36 Power- + 24 Signal-Pins PCB card edge
Mating output connector
Manufacturer: FCI Electronics
Manufacturer P/N: 10130248-005LF (see
Figure 59
for option x)
Bel Power Solutions P/N: ZES.00678
16.1 MATING OUTPUT CONNECTOR SPECIFICATION
Figure 57. Mating connector drawing page 1
PET2000-12-074xA
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Figure 58. Mating connector drawing page 2
32
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Figure 59. Mating connector drawing page 3
PET2000-12-074xA
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PIN
SIGNAL NAME
DESCRIPTION
MATING SEQUENCE14
P1 ~ P10
GND
Power and signal ground (return)
1
P29 ~ P36
GND
P11 ~ P18
V1
+12 VDC main output
2
P19 ~ P28
V1
S1
A0
I2C address selection input
2
S2
A1
2
S3, S4
VSB
+12 V Standby positive output (as pins S3, S4)
2
S5
HOTSTANDBYEN_H
Hot standby enable signal, active-high
2
S6
ISHARE
Analog current share bus
2
S7
Reserved
For future use, do not connect
2
S8
PRESENT_L
Power supply seated, active-low
3
S9
A2
I2C address selection input
2
S10 ~ S15
GND
Power and signal ground (return)
2
S16
PWOK_H
Power OK signal output, active-high
2
S17
V1_SENSE
Main output positive sense
2
S18
V1_SENSE_R
Main output negative sense
2
S19
SMB_ALERT_L
SMB Alert signal output, active-low
2
S20
PSON_L
Power supply on input, active-low
3
S21, S22
VSB
+12 V Standby positive output (as pins S3, S4)
2
S23
SCL
I2C clock signal line
2
S24
SDA
I2C data signal line
2
Table 5. Output connector pin assignment
14
1 = First, 3 = Last, given by different card edge finger pin lengths and mating connector pin arrangement
16.2 MATING OUTPUT CONNECTOR SPECIFICATION
34
PET2000-12-074xA
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ITEM
DESCRIPTION
ORDERING PART
NUMBER
SOURCE
I2C Utility
Windows XP/Vista/7 compatible GUI
to program, control and monitor
Front-End power supplies (and other
I2C units)
ZS-00130
belfuse.com/power-solutions
Evaluation Board
Connector board to operate
PET2000-12-074xA. Includes an on-
board USB to I2C converter (use I2C
Utility as desktop software).
YTM.00046
belfuse.com/power-solutions
AC cable for PET2000-12-074NAA
Anderson Saf-D-Grid® receptacle to
IEC 60320-C20 plug, 14 AWG, 2 m,
Anderson P/N 2052KH2
TBD
DATE
REVISION
DESCRIPTION OF CHANGE
ECO/MCO
REFERENCE NO.
2019-Jun-19
AL
Page 4: Max. Output currents updated in the table
C94036
NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems,
equipment used in hazardous environments, or nuclear control systems.
TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on
the date manufactured. Specifications are subject to change without notice.