1White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
EDI8L32128C
August, 2002
Rev. 6
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
128Kx32 CMOS High Speed Static RAM
128Kx32 bit CMOS Static
Random Access Memory Array
Fast Access Times: 12, 15, 17, 20, and 25ns
Individual Byte Enables
User Confi gurable Organization with Minimal
Additional Logic
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Surface Mount Package
68 Lead PLCC, No. 99 (JEDEC MO-47AE)
Small Footprint, 0.990 Sq. In.
Multiple Ground Pins for Maximum Noise
Immunity
Single +5V (±5%) Supply Operation
The EDI8L32128C is a high speed, high performance,
four megabit density Static RAM organized as a 128Kx32
bit array.
Four Chip Enables, Write Control, and Output Enable
provide the user with a fl exible memory solution. The user
may independently enable each of the four bytes, and,
with minimal additional peripheral logic, the unit may be
confi gured as a 256Kx16 or 512Kx8 array.
Fully asynchronous circuitry is used, requiring no clocks or
refreshing for operation and providing equal access and
cycle times for ease of use.
The EDI8L32128C, allows 4 megabits of memory to be
placed in less than 0.990 square inches of board space; a
savings of 0.885 square inches over four standard 128Kx8
components.
NOTE: Pin 2 & 67 on the 64Kx32 (EDI8L3265C) and the 256Kx32 (EDI8L32256C) are word select pins.
BLOCK DIAGRAM
FIG. 1 PIN CONFIGURATION PIN DESCRIPTION
AØ-16 Address Inputs
EØ-3# Chip Enables (One per Byte)
W# Master Write Enable
G# Master Output Enable
DQØ-31 Common Data Input/Output
VCC Power (+5V±5%)
VSS Ground
NC No Connection
TOP VIEW
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
128Kx32
Memory
Array
A0-A16
G#
W#
E0#
E1#
E2#
E3#
17
DQ17
DQ18
DQ19
V
SS
DQ20
DQ21
DQ22
DQ23
V
CC
DQ24
DQ25
DQ26
DQ27
V
SS
DQ28
DQ29
DQ30
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
V
CC
DQ7
DQ6
DQ5
DQ4
V
SS
DQ3
DQ2
DQ1
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
DQ31
A6
A5
A4
A3
A2
A1
A0
V
CC
A13
A12
A11
A10
A9
A8
A7
DQ0
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
DQ16
NC
NC
E3#
E2#
E1#
E0#
NC
V
CC
NC
NC
G#
W#
A16
A15
A14
DQ15
FEATURES DESCRIPTION
NOTE: Solder Refl ow temperature should not exceed 230°C
2White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
EDI8L32128C
August, 2002
Rev. 6
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
ABSOLUTE MAXIMUM RATINGS* RECOMMENDED DC OPERATING CONDITIONS
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specifi cation is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(f = 1.0MHZ, VIN = VCC or VSS)
AC TEST CONDITIONS
DC ELECTRICAL CHARACTERISTICS
Voltage on any pin relative to VSS -0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial
Industrial
0°C to + 70°C
-40°C to +85°C
Storage Temperature -55°C to +125°C
Power Dissipation 4 Watts
Output Current. 20 mA
Junction Temperature, TJ175°C
Parameter Sym Min Typ Max Units
Supply Voltage VCC 4.75 5.0 5.25 V
Supply Voltage VSS 00 0 V
Input High Voltage VIH 2.2 -- VCC+0.5 V
Input Low Voltage VIL -0.3 -- 0.8 V
Parameter Sym Max Unit
Address Lines CA40 pF
Data Lines CD/Q 10 pF
Write & Output Enable Lines W#, G# 40 pF
Chip Enable Lines/Byte Select E0-3# 8 pF
TRUTH TABLE
E# W# G# Mode Output Power
H X X Standby High Z ICC2,ICC3
L H H Output Disable High Z ICC1
L X X Output Disable High Z ICC1
L H L Read DOUT ICC1
L L X Write DIN ICC1
Parameter Sym Conditions Typ Max Units
12* 15 17 20/25
Operating Power Supply Current ICC1 W# = VIL, II/O = 0mA,
Min Cycle 620 720 680 640 600 mA
Standby (TTL) Supply Current ICC2 E# ≥ VIH, VIN ≤ VIL or
VIN ≥ VIH, f = ØMHZ160 160 160 160 mA
Full Standby CMOS Supply Current ICC3
E# ≥ VCC -0.2V
VIN ≥ VCC -0.2V or
VIN ≤ 0.2V
20 20 20 20 mA
Input Leakage Current ILI VIN = 0V to VCC ±10 μA
Output Leakage Current ILO V I/O = 0V to VCC ±10 μA
Output High Volltage VOH IOH = -4.0mA 2.4 V
Output Low Voltage VOL IOL = 8.0mA 0.4 V
Input Pulse Levels VSS to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Levels 1.5V
Output Load Figure 2
NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 3)
Typical: TA = 25°C, VCC = 5.0V
Figure 2 Figure 3
VCC
Q
480 Ω
30 pF
255 Ω
VCC
Q
480 Ω
5 pF
255 Ω
3White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
EDI8L32128C
August, 2002
Rev. 6
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIG. 4 READ CYCLE 1 - W# HIGH, G#, E# LOW
AC CHARACTERISTICS - READ CYCLE
Parameter Symbol 12ns 15ns 17ns 20ns 25n Units
JEDEC Alt. Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tAVAV tRC 12 15 17 20 25 ns
Address Access Time tAVQV tAA 12 15 17 20 25 ns
Chip Enable Access Time tELQV tACS 12 15 17 20 25 ns
Chip Enable to Output in Low Z (1) tELQX tCLZ 23333ns
Chip Disable to Output in High Z (1) tEHQZ tCHZ 7881010ns
Output Hold from Address Change tAVQX tOH 33333ns
Output Enable to Output Valid tGLQV tOE 5 6 8 8 10 ns
Output Enable to Output in Low Z (1) tGLQX tOLZ 22220ns
Output Disable to Output in High Z(1) tGHQZ tOHZ 4 5 6 8 10 ns
NOTE 1: Parameter guaranteed, but not tested.
FIG. 5 READ CYCLE 2 - W# HIGH
A
Q
t
AVAV
ADDRESS 1
t
AVQV
t
AVQX
DATA 1
ADDRESS 2
DATA 2
A
E#
G#
Q
t
AVAV
t
AVQV
t
ELQV
t
ELQX
t
GLQV
t
GLQX
t
EHQZ
t
GHQZ
4White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
EDI8L32128C
August, 2002
Rev. 6
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
A
G#
E#
W#
D
Q
tAVAV
tAVW H
tELWH
tWLWH
tAVWL
tGLAX
tWHAX
tDVWH tWHDX
tWLQZ
HIGH Z
tWHQX
DATA VALID
FIG. 7 WRITE CYCLE 2 - E# CONTROLLED
FIG. 6 WRITE CYCLE 1 - W# CONTROLLED
Parameter Symbol 12ns 15ns 17ns 20ns 25ns Units
JEDEC Alt. Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tAVAV tWC 12 15 17 20 25 ns
Chip Enable to End of Write tELWH
tELEH
tCW
tCW
8
8
9
9
10
10
15
15
20
20
ns
ns
Address Setup Time tAVWL
tAVEL
tAS
tAS
0
0
0
0
0
0
0
0
0
0
ns
ns
Address Valid to End of Write tAVWH
tAVEH
tAW
tAW
9
9
10
10
12
12
15
15
15
15
ns
ns
Write Pulse Width tWLWH
tWLEH
tWP
tWP
9
9
10
10
12
12
15
15
15
15
ns
ns
Write Recovery Time tWHAX
tEHAX
tWR
tWR
0
0
0
0
0
0
0
0
0
0
ns
ns
Data Hold Time tWHDX
tEHDX
tDH
tDH
0
0
0
0
0
0
0
0
0
0
ns
ns
Write to Output in High Z (1) tWLQZ tWHZ 05060707010ns
Data to Write Time tDVWH
tDVEH
tDW
tDW
5
5
6
6
8
8
8
8
12
12
ns
ns
Output Active from End of Write (1) tWHQX tWLZ 22222ns
AC CHARACTERISTICS - WRITE CYCLE
NOTE: Parameter guaranteed, but not tested.
A
E#
W#
D
Q
tAVAV
tAVE H
tELEH
tWLEH
tEHAX
HIGH Z
DATA VALID
tDVEH tEHDX
tAVE L
5White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
EDI8L32128C
August, 2002
Rev. 6
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
Part Number Speed
(ns) Package
No.
EDI8L32128C12AC 12 99
EDI8L32128C15AC 15 99
EDI8L32128C17AC 17 99
EDI8L32128C20AC 20 99
EDI8L32128C25AC 25 99
ORDERING INFORMATION
Part Number Speed
(ns) Package
No.
EDI8L32128C15AI 15 99
EDI8L32128C17AI 17 99
EDI8L32128C20AI 20 99
0.995
Max
0.956
Max
0.995
Max
0.956
Max
0.040
Max
0.020
0.015 0.930
0.890
0.050
BSC 0.115
Max
0.180
Max
PACKAGE DESCRIPTION
Package No. 99: 68 LEAD PLCC
JEDEC MO-47AE
ALL DIMENSIONS ARE IN INCHES
Commercial (0°C to +70°C) Industrial (-40°C to +85°C)
