LT1158
1
1158fb
TYPICAL APPLICATION
DESCRIPTION
Half Bridge N-Channel
Power MOSFET Driver
A single input pin on the LT
®
1158 synchronously controls
two N-channel power MOSFETs in a totem pole confi gura-
tion. Unique adaptive protection against shoot-through
currents eliminates all matching requirements for the two
MOSFETs. This greatly eases the design of high effi ciency
motor control and switching regulator systems.
A continuous current limit loop in the LT1158 regulates
short-circuit current in the top power MOSFET. Higher
start-up currents are allowed as long as the MOSFET VDS
does not exceed 1.2V. By returning the FAULT output to
the enable input, the LT1158 will automatically shut down
in the event of a fault and retry when an internal pull-up
current has recharged the enable capacitor.
An on-chip charge pump is switched in when needed to
turn on the top N-channel MOSFET continuously. Special
circuitry ensures that the top side gate drive is safely
maintained in the transition between PWM and DC opera-
tion. The gate-to-source voltages are internally limited to
14.5V when operating at higher supply voltages.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
5365118.
Top and Bottom Gate Waveforms
FEATURES
APPLICATIONS
n Drives Gate of Top Side MOSFET Above V+
n Operates at Supply Voltages from 5V to 30V
n 150ns Transition Times Driving 3000pF
n Over 500mA Peak Driver Current
n Adaptive Non-Overlap Gate Drives
n Continuous Current Limit Protection
n Auto Shutdown and Retry Capability
n Internal Charge Pump for DC Operation
n Built-In Gate Voltage Protection
n Compatible with Current-Sensing MOSFETs
n TTL/CMOS Input Levels
n Fault Output Indication
n PWM of High Current Inductive Loads
n Half Bridge and Full Bridge Motor Control
n Synchronous Step-Down Switching Regulators
n Three-Phase Brushless Motor Drive
n High Current Transducer Drivers
n Battery-Operated Logic-Level MOSFETs
+
RSENSE
0.015Ω
500μF
LOW
ESR
0.1μF
IRFZ34
IRFZ34
24V
1N4148
10μF
1μF
0.01μF
PWM
0Hz TO
100kHz
BOOST
BOOST DR
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
B GATE DR
B GATE FB
GND
V+
V+
INPUT
ENABLE
FAULT
BIAS
LT1158
LOAD
LT1158 TA01
+
+
+VIN = 24V
RL = 12Ω
1158 TA02
LT1158
2
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ABSOLUTE MAXIMUM RATINGS
Supply Voltage (Pins 2, 10) ......................................36V
Boost Voltage (Pin 16) ..............................................56V
Continuous Output Currents (Pins 1, 9, 15) .........100mA
Sense Voltages (Pins 11, 12) .................. 5V to V+ + 5V
Top Source Voltage (Pin 13) ................... 5V to V+ + 5V
Boost to Source Voltage (V16 – V13) ........ 0.3V to 20V
(Note 1)
1
2
3
4
5
6
7
8
TOP VIEW
N PACKAGE
16-LEAD PLASTIC DIP
16
15
14
13
12
11
10
9
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
θJA = 70°C/W
1
2
3
4
5
6
7
8
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC (WIDE) SO
16
15
14
13
12
11
10
9
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
θJA = 110°C/W
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1158CN#PBF LT1158CN#TRPBF 16-Lead Plastic DIP 0°C to 70°C
LT1158IN#PBF LT1158IN#TRPBF 16-Lead Plastic DIP –40°C to 85°C
LT1158CSW#PBF LT1158CSW#TRPBF 16-Lead Plastic (Wide) SO 0°C to 70°C
LT1158ISW#PBF LT1158ISW#TRPBF 16-Lead Plastic (Wide) SO –40°C to 85°C
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1158CN LT1158CN#TR 16-Lead Plastic DIP 0°C to 70°C
LT1158IN LT1158IN#TR 16-Lead Plastic DIP –40°C to 85°C
LT1158CSW LT1158CSW#TR 16-Lead Plastic (Wide) SO 0°C to 70°C
LT1158ISW LT1158ISW#TR 16-Lead Plastic (Wide) SO –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
Operating Temperature Range
LT1158C ................................................... 0°C to 70°C
LT1158I ................................................40°C to 85°C
Junction Temperature (Note 2)
LT1158C ............................................................ 125°C
LT1158I ............................................................. 150°C
Storage Temperature Range ................... 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) ................. 300°C
LT1158
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LT1158IN, LT1158CN: TJ = TA + (PD × 70°C/W)
LT1158ISW, LT1158CSW: TJ = TA + (PD × 110°C/W)
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. Test Circuit, V+ = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4 open,
Gate Feedback pins connected to Gate Drive pins unless otherwise specifi ed.
SYMBOL PARAMETER CONDITIONS
LT1158I LT1158C
UNITSMIN TYP MAX MIN TYP MAX
I2 + I10 DC Supply Current (Note 2) V+ = 30V, V16 = 15V, V4 = 0.5V
V+ = 30V, V16 = 15V, V6 = 0.8V
V+ = 30V, V16 = 15V, V6 = 2V
4.5
8
2.2
7
13
3
10
18
4.5
8
2.2
7
13
3
10
18
mA
mA
mA
I16 Boost Current V+ = V13 = 30V, V16 = 45V, V6 = 0.8V 3 4.5 3 4.5 mA
V6 Input Threshold l0.8 1.4 2 0.8 1.4 2 V
I6Input Current V6 = 5V l5 15 5 15 μA
V4 Enable Low Threshold V6 = 0.8V, Monitor V9 l0.9 1.15 1.4 0.85 1.15 1.4 V
ΔV4 Enable Hysteresis V6 = 0.8V, Monitor V9 l1.3 1.5 1.7 1.2 1.5 1.8 V
I4Enable Pullup Current V4 = 0V l15 25 35 15 25 35 μA
V15 Charge Pump Voltage V+ = 5V, V6 = 2V, Pin 16 open, V13 5V
V+ = 30V, V6 = 2V, Pin16 open, V13 30V
l
l
9
40
11
43 47
9
40
11
43 47
V
V
V9 Bottom Gate “ON” Voltage V+ = V16 = 18V, V6 = 0.8V l12 14.5 17 12 14.5 17 V
V1 Boost Drive Voltage V+ = V16 = 18V, V6 = 0.8V, 100mA Pulsed Load l12 14.5 17 12 14.5 17 V
V14 – V13 Top Turn-Off Threshold V+ = V16 = 5V, V6 = 0.8V 1 1.75 2.5 1 1.75 2.5 V
V8 Bottom Turn-Off Threshold V+ = V16 = 5V, V6 = 2V 1 1.5 2 1 1.5 2 V
I5Fault Output Leakage V+ = 30V, V16 = 15V, V6 = 2V l0.1 1 0.1 1 μA
V5 Fault Output Saturation V+ = 30V, V16 = 15V, V6 = 2V, I5 = 10mA 0.5 1 0.5 1 V
V12 – V11 Fault Conduction Threshold V+ = 30V, V16 = 15V, V6 = 2V, I5 = 100μA 90 110 130 85 110 135 mV
V12 – V11 Current Limit Threshold V+ = 30V, V16 = 15V, V6 = 2V, Closed Loop
l
130
120
150 170
180
120
120
150 180
180
mV
mV
V12 – V11 Current Limit Inhibit
VDS Threshold
V+ = V12 = 12V, V6 = 2V, Decrease V11
Until V15 Goes Low
1.1 1.25 1.4 1.1 1.25 1.4 V
tRTop Gate Rise Time Pin 6 (+) Transition, Meas. V15 – V13 (Note 4) l130 250 130 250 ns
tDTop Gate Turn-Off Delay Pin 6 (–) Transition, Meas. V15 – V13 (Note 4) l350 550 350 550 ns
tFTop Gate Fall Time Pin 6 (–) Transition, Meas. V15 – V13 (Note 4) l120 250 120 250 ns
tRBottom Gate Rise Time Pin 6 (–) Transition, Meas. V9 (Note 4) l130 250 130 250 ns
tDBottom Gate Turn-Off Delay Pin 6 (+) Transition, Meas. V9 (Note 4) l200 400 200 400 ns
tFBottom Gate Fall Time Pin 6 (+) Transition, Meas. V9 (Note 4) l100 200 100 200 ns
Note 3: Dynamic supply current is higher due to the gate charge
being delivered at the switching frequency. See typical performance
characteristics and applications information.
Note 4: Gate rise times are measured from 2V to 10V, delay times are
measured from the input transition to when the gate voltage has decreased
to 10V, and fall times are measured from 10V to 2V.
LT1158
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TYPICAL PERFORMANCE CHARACTERISTICS
Dynamic Supply Current Charge Pump Output Voltage Input Thresholds
Enable Thresholds Fault Conduction Threshold Current Limit Threshold
DC Supply Current DC Supply Current Dynamic Supply Current (V+)
SUPPLY VOLTAGE (V)
0
8
10
12
30
LT1158 G01
6
4
10 20 40
2
0
14
I2 + I10 + I16
ENABLE LOW
SUPPLY CURRENT (mA)
51525
35
INPUT LOW
INPUT HIGH
V13 = 0V
V13 = V+
TEMPERATURE (°C)
–50
8
10
14
25 75
LT1158 G02
6
4
–25 0 50 100 125
2
0
12
SUPPLY CURRENT (mA)
I2 + I10 + I16
V+ = 12V
INPUT HIGH
INPUT LOW
ENABLE LOW
INPUT FREQUENCY (kHz)
1
0
SUPPLY CURRENT (mA)
5
10
15
20
30
10 100
LT1158 G03
25
50% DUTY CYCLE
CGATE = 3000pF
V+ = 24V
V+ = 6V
V+ = 12V
INPUT FREQUENCY (kHz)
1
0
SUPPLY CURRENT (mA)
5
10
15
20
40
10 100
LT1158 G04
25
30
35
CGATE = 10000pF
50% DUTY CYCLE
V+ = 12V
CGATE = 1000pF
CGATE = 3000pF
SUPPLY VOLTAGE (V)
0
0
TOP GATE VOLTAGE (V)
5
15
20
25
50
35
10 20 25
LT1158 G05
10
40
45
30
515 30 35 40
10μA LOAD
NO LOAD
SUPPLY VOLTAGE (V)
0
0.8
INPUT THRESHOLD VOLTAGE (V)
1.0
1.2
1.4
1.6
10 20 30 40
LT1158 G06
1.8
2.0
515 25 35
V(HIGH)
V(LOW)
–40°C
+25°C
+85°C
–40°C
+25°C
+85°C
SUPPLY VOLTAGE (V)
0
2.0
2.5
3.0
30
LT1158 G07
1.5
1.0
10 20 40
0.5
0
3.5
V(HIGH)
V(LOW)
–40°C
+25°C
+85°C
–40°C +25°C
+85°C
ENABLE THRESHOLD VOLTAGE (V)
51525
35
SUPPLY VOLTAGE (V)
0
60
FAULT CONDUCTION THRESHOLD (mV)
70
90
100
110
160
130
10 20 25
LT1158 G08
80
140
150
120
515 30 35 40
V11 = 0V
–40°C
+25°C
+85°C
SUPPLY VOLTAGE (V)
0
100
CURRENT LIMIT THRESHOLD (mV)
110
130
140
150
200
170
10 20 25
LT1158 G09
120
180
190
160
515 30 35 40
CLOSED LOOP
+85°C
–40°C
+25°C
LT1158
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TYPICAL PERFORMANCE CHARACTERISTICS
Top Gate Rise Time Top Gate Fall Time Transition Times vs RGate
Current Limit Inhibit
VDS Threshold Bottom Gate Rise Time Bottom Gate Fall Time
SUPPLY VOLTAGE (V)
0
1.00
CURRENT LIMIT INHIBIT THRESHOLD (V)
1.05
1.15
1.20
1.25
1.50
1.35
10 20 25
LT1158 G10
1.10
1.40
1.45
1.30
515 30 35 40
V2 – V11
–40°C
+25°C
+85°C
SUPPLY VOLTAGE (V)
0
BOTTOM GATE RISE TIME (ns)
200
250
300
40
LT1158 G11
150
100
010 20 30
50
400
350
CGATE = 10000pF
CGATE = 1000pF
CGATE = 3000pF
5152535
SUPPLY VOLTAGE (V)
0
BOTTOM GATE FALL TIME (ns)
200
250
300
40
LT1158 G12
150
100
010 20 30
50
400
350
CGATE = 10000pF
CGATE = 1000pF
CGATE = 3000pF
5152535
SUPPLY VOLTAGE (V)
0
TOP GATE RISE TIME (ns)
200
250
300
40
LT1158 G13
150
100
010 20 30
50
400
350
CGATE = 10000pF
CGATE = 1000pF
CGATE = 3000pF
5152535
SUPPLY VOLTAGE (V)
0
TOP GATE FALL TIME (ns)
200
250
300
40
LT1158 G14
150
100
010 20 30
50
400
350
CGATE = 10000pF
CGATE = 1000pF
CGATE = 3000pF
5152535
GATE RESISTANCE (Ω)
0
TRANSITION TIMES (ns)
600
800
80
LT1158 G15
400
200
020 40 60 100
700
500
300
100
10 30 50 70 90
V+ = 12V
CGATE = 3000pF
RISE TIME
FALL TIME
LT1158
6
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PIN FUNCTIONS
BOOST DR (Pin 1): Recharges and clamps the bootstrap
capacitor to 14.5V higher than pin 13 via an external
diode.
V+ (Pin 2): Main supply pin; must be closely decoupled
to the ground pin 7.
BIAS (Pin 3): Decouple point for the internal 2.6V bias
generator. Pin 3 cannot have any external DC loading.
ENABLE (Pin 4): When left open, the LT1158 operates
normally. Pulling pin 4 low holds both MOSFETs off re-
gardless of the input state.
FAULT (Pin 5): Open collector NPN output which turns
on when V12 – V11 exceeds the fault conduction thresh-
old.
INPUT (Pin 6): Taking pin 6 high turns the top MOSFET on
and bottom MOSFET off; pin 6 low reverses these states.
An input latch captures each low state, ignoring an ensuing
high until pin 13 has gone below 2.6V.
B GATE FB (Pin 8): Must connect directly to the bottom
power MOSFET gate. The top MOSFET turn-on is inhibited
until pin 8 has discharged to 1.5V. A hold-on current source
also feeds the bottom gate via pin 8.
B GATE DR (Pin 9): The high current drive point for the
bottom MOSFET. When a gate resistor is used, it is inserted
between pin 9 and the gate of the MOSFET.
V+ (Pin 10): Bottom side driver supply; must be connected
to the same supply as pin 2.
SENSE (Pin 11): The fl oating reference for the current
limit comparator. Connects to the low side of a current
shunt or Kelvin lead of a current-sensing MOSFET. When
pin 11 is within 1.2V of V+, current limit is inhibited.
SENSE+ (Pin 12): Connects to the high side of the current
shunt or sense lead of a current-sensing MOSFET. A built-in
offset between pins 11 and 12 in conjunction with RSENSE
sets the top MOSFET short-circuit current.
T SOURCE (Pin 13): Top side driver return; connects to
MOSFET source and low side of the bootstrap capacitor.
T GATE FB (Pin 14): Must connect directly to the top power
MOSFET gate. The bottom MOSFET turn-on is inhibited
until V14 – V13 has discharged to 1.75V. An on-chip charge
pump also feeds the top gate via pin 14.
T GATE DR (Pin 15): The high current drive point for the
top MOSFET. When a gate resistor is used, it is inserted
between pin 15 and the gate of the MOSFET.
BOOST (Pin 16): Top side driver supply; connects to the
high side of the bootstrap capacitor and to a diode either
from supply (V+ < 10V) or from pin 1 (V+ > 10V).
LT1158
7
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BLOCK DIAGRAM
+
+
V+V+
1
V+
LOGIC
INPUT
+
2
BIAS
GEN
4
3
2.7V
1.2V
7.5V
5
6
7
GND
INPUT
1.4V
S
R
Q
Q
7.5V
16
CHG
PUMP
+
T
14
13
12
11
10
110mV
9
+
8
B GATE FB
B
1.5V
15V
B GATE DR
+
R
1-SHOT
1-SHOT
R
O
2.6V
S
1.75V
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
FAULT
ENABLE
BIAS
BOOST DR
V+
1158 FD
25μA
V+
15V
15
LT1158
8
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OPERATION
TEST CIRCUIT
0.01μF
LT1158 TC01
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
+
V+
+3000pF
1μF +
V16
+
V11
+
V12
3000pF
+
V8
V6 50Ω
+
V4
3k
1/2W
150Ω
2W
V14 – V13
LT1158
VN2222LL
100Ω
10μF
CLOSED
LOOP
2k
1/2W
+
+
Whenever there is an input transition on pin 6, the LT1158
follows a logical sequence to turn off one MOSFET and turn
on the other. First, turn-off is initiated, then VGS is moni-
tored until it has decreased below the turn-off threshold,
and fi nally the other gate is turned on. An input latch gets
reset by every low state at pin 6, but can only be set if the
top source pin has gone low, indicating that there will be
suffi cient charge in the bootstrap capacitor to safely turn
on the top MOSFET.
In order to conserve power, the gate drivers only provide
turn-on current for up to 2μs, set by internal one-shot
circuits. Each LT1158 driver can deliver 500mA for 2μs,
or 1000nC of gate charge––more than enough to turn on
multiple MOSFETs in parallel. Once turned on, each gate
is held high by a DC gate sustaining current: the bottom
gate by a 100μA current source, and the top gate by an
on-chip charge pump running at approximately 500kHz.
The fl oating supply for the top side driver is provided by
a bootstrap capacitor between the boost pin 16 and top
source pin 13. This capacitor is recharged each time pin 13
The LT1158 self-enables via an internal 25μA pull-up on
the enable pin 4. When pin 4 is pulled down, much of the
input logic is disabled, reducing supply current to 2mA.
With pin 4 low, the input state is ignored and both MOSFET
gates are actively held low. With pin 4 enabled, one or the
other of the 2 MOSFETs is turned on, depending on the
state of the input pin 6: high for top side on, and low for
bottom side on. The 1.4V input threshold is regulated and
has 200mV of hysteresis.
In order to allow operation over 5V to 30V nominal supply
voltages, an internal bias generator is employed to furnish
constant bias voltages and currents. The bias generator is
decoupled at pin 3 to eliminate any effects from switching
transients. No DC loading is allowed on pin 3.
The top and bottom gate drivers in the LT1158 each utilize
two gate connections: 1) A gate drive pin, which provides
the turn-on and turn-off currents through an optional series
gate resistor; and 2) A gate feedback pin which connects
directly to the gate to monitor the gate-to-source voltage
and supply the DC gate sustaining current.
(Refer to Functional Diagram)
LT1158
9
1158fb
Power MOSFET Selection
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no size
or matching constraints. Therefore selection can be made
based on the operating voltage and RDS(ON) requirements.
The MOSFET BVDSS should be at least 2 • VSUPPLY, and
should be increased to 3 • VSUPPLY in harsh environments
with frequent fault conditions. For the LT1158 maximum
operating supply of 30V, the MOSFET BVDSS should be
from 60V to 100V.
The MOSFET RDS(ON) is specifi ed at TJ = 25°C and is gener-
ally chosen based on the operating effi ciency required as
long as the maximum MOSFET junction temperature is not
exceeded. The dissipation in each MOSFET is given by:
P=D I R
DS DS ON
()
+
()
()
21
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From this
equation the required RDS(ON) can be derived:
RP
DI
DS ON
DS
()
=
()
+
()
21
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for
each MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but ∂ = 0.007/°C can be used as an
approximation for low voltage MOSFETs. Thus if TA = 85°C
APPLICATIONS INFORMATION
and the available heat sinking has a thermal resistance of
20°C/W, the MOSFET junction temperature will be 125°C,
and ∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfi ed by an IRFZ34.
Note that these calculations are for the continuous operating
condition; power MOSFETs can sustain far higher dissipa-
tions during transients. Additional RDS(ON)) constraints are
discussed under Starting High In-Rush Current Loads.
goes low in PWM operation, and is maintained by the charge
pump when the top MOSFET is on DC. A regulated boost
driver at pin 1 employs a source-referenced 15V clamp
that prevents the bootstrap capacitor from overcharging
regardless of V+ or output transients.
The LT1158 provides a current-sense comparator and fault
output circuit for protection of the top power MOSFET. The
comparator input pins 11 and 12 are normally connected
across a shunt in the source of the top power MOSFET
(or to a current-sensing MOSFET). When pin 11 is more
than 1.2V below V+ and V12 – V11 exceeds the 110mV
offset, FAULT pin 5 begins to sink current. During a short
circuit, the feedback loop regulates V12 – V11 to 150mV,
thereby limiting the top MOSFET current.
OPERATION
(Refer to Functional Diagram)
Figure 1. Paralleling MOSFETs
Paralleling MOSFETs
MOSFETs can be paralleled. The MOSFETs will inherently
share the currents according to their RDS(ON) ratio. The
LT1158 top and bottom drivers can each drive four power
MOSFETs in parallel with only a small loss in switching
speeds (see Typical Performance Characteristics). Indi-
vidual gate resistors may be required to “decouple” each
MOSFET from its neighbors to prevent high frequency
oscillations—consult manufacturers recommendations.
LT1158 RGRG
RG: OPTIONAL 10Ω
1158 F01
GATE DR
GATE FB
LT1158
10
1158fb
Figure 2. Low Voltage Operation
If individual gate decoupling resistors are used, the gate
feedback pins can be connected to any one of the gates.
Driving multiple MOSFETs in parallel may restrict the
operating frequency at high supply voltages to prevent
over-dissipation in the LT1158 (see Gate Charge and
Driver Dissipation below). When the total gate capacitance
exceeds 10,000pF on the top side, the bootstrap capacitor
should be increased proportionally above 0.1μF.
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge QG, which includes
the additional charge required by the gate-to-drain swing. QG
is usually specifi ed for VGS = 10V and VDS = 0.8VDS(MAX).
When the supply current is measured in a switching ap-
plication, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
II
dQ
dt
dQ
dt
SUPPLY DC G
TOP
G
BOTTO
=+
+
MM
The actual increase in supply current is slightly higher
due to LT1158 switching losses and the fact that the gates
are being charged to more than 10V. Supply current vs
switching frequency is given in the Typical Performance
Characteristics.
The LT1158 junction temperature can be estimated by
using the equations given in Note 1 of the electrical char-
acteristics. For example, the LT1158SI is limited to less
than 25mA from a 24V supply:
T
J = 85°C + (25mA • 24V • 110°C/W)
= 151°C exceeds absolute maximum
In order to prevent the maximum junction temperature
from being exceeded, the LT1158 supply current must
be checked with the actual MOSFETs operating at the
maximum switching frequency.
MOSFET Gate Drive Protection
For supply voltages of over 8V, the LT1158 will protect
standard N-channel MOSFETs from under or overvoltage
gate drive conditions for any input duty cycle including
DC. Gate-to-source Zener clamps are not required and
not recommended since they can reduce operating
efficiency.
A discontinuity in tracking between the output pulse
width and input pulse width may be noted as the top side
MOSFET approaches 100% duty cycle. As the input low
signal becomes narrower, it may become shorter than
the time required to recharge the bootstrap capacitor to
a safe voltage for the top side driver. Below this duty cycle
the output pulse width will stop tracking the input until
the input low signal is <100ns, at which point the output
will jump to the DC condition of top MOSFET “on” and
bottom MOSFET “off.”
Low Voltage Operation
The LT1158 can operate from 5V supplies (4.5V min) and
in 6V battery-powered applications by using logic-level
N-channel power MOSFETs. These MOSFETs have 2V
maximum threshold voltages and guaranteed RDS(ON) limits
at VGS = 4V. The switching speed of the LT1158, unlike
CMOS drivers, does not degrade at low supply voltages.
For operation down to 4.5V, the boost pin should be con-
nected as shown in Figure 2 to maximize gate drive to the
top side MOSFET. Supply voltages over 10V should not
be used with logic-level MOSFETs because of their lower
maximum gate-to-source voltage rating.
0.1μF
LT1158 F02
5V
D1
D1: LOW-LEAKAGE SCHOTTKY
BAT85 OR EQUIVALENT
LOGIC-LEVEL
MOSFET
N.C.
BOOST
T GATE DR
T GATE FB
T SOURCE
LT1158
BOOST DR
+
APPLICATIONS INFORMATION
LT1158
11
1158fb
Ugly Transient Issues
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle.
To prevent large voltage transients at the top drain, a low
ESR electrolytic capacitor must be used and returned to
the power ground. The capacitor is generally in the range
of 250μF to 5000μF and must be physically sized for
the RMS current fl owing in the drain to prevent heating
and premature failure. In addition, the LT1158 requires a
separate 10μF capacitor connected closely between pins
2 and 7.
The LT1158 top source and sense pins are internally
protected against transients below ground and above
supply. However, the gate drive pins cannot be forced
below ground. In most applications, negative transients
coupled from the source to the gate of the top MOSFET
do not cause any problems. However, in some high cur-
rent (10A and above) motor control applications, negative
transients on the top gate drive may cause early tripping
of the current limit. A small Schottky diode (BAT85) from
pin 15 to ground avoids this problem.
Switching Regulator Applications
The LT1158 is ideal as a synchronous switch driver to
improve the effi ciency of step-down (buck) switching
APPLICATIONS INFORMATION
Figure 3. Adding Synchronous Switching to a Step-Down Switching Regulator
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conduct-
ing) are given by:
SWITCH “ON” = V
VTOTAL PERIOD
SWITC
OUT
IN
HH OFF” = VV
VTOTAL PERIOD
IN OUT
IN
Note that for VIN > 2VOUT, the switch is off longer than it
is on, making the diode losses more signifi cant than the
switch. The worst case for the diode is during a short cir-
cuit, when VOUT approaches zero and the diode conducts
the short-circuit current almost continuosly.
Figure 3 shows the LT1158 used to synchronously drive a
pair of power MOSFETs in a step-down regulator applica-
tion, where the top MOSFET is the switch and the bottom
MOSFET replaces the Schottky diode. Since both conduc-
tion paths have low losses, this approach can result in very
high effi ciency—from 90% to 95% in most applications.
And for regulators under 5A, using low RDS(ON) N-channel
MOSFETs eliminates the need for heatsinks.
VOUT
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
B GATE DR
B GATE FB
FAULT
INPUT
LT1158
REF
PWM
RSENSE
RGS
VIN
1158 F03
+
+
LT1158
12
1158fb
APPLICATIONS INFORMATION
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
80
90
4.0
LT1158 F04
70
60 1.0 2.0 3.0
100
0.5 1.5 2.5 3.5
FIGURE 12 CIRCUIT
VIN = 12V
Current Limit in Switching Regulator Applications
Current is sensed by the LT1158 by measuring the voltage
across a current shunt (low valued resistor). Normally, this
shunt is placed in the source lead of the top MOSFET (see
Short-Circuit Protection in Bridge Applications). However,
in step-down switching regulator applications, the remote
current sensing capability of the LT1158 allows the actual
inductor current to be sensed. This is done by placing
the shunt in the output lead of the inductor as shown in
Figure 3. Routing of the SENSE+ and SENSE PC traces
is critical to prevent stray pickup. These traces must be
routed together at minimum spacing and use a Kelvin
connection at the shunt.
When the voltage across RSENSE exceeds 110mV, the
LT1158 FAULT pin begins to conduct. By feeding the FAULT
signal back to a control input of the PWM, the LT1158 will
assume control of the duty cycle forming a true current
mode loop to limit the output current:
IOUT =110mV
Rin current limit
SENSE
In LT3525 based circuits, connecting the FAULT pin to
the LT3525 soft-start pin accomplishes this function. In
circuits where the LT1158 input is being driven with a ramp
or sawtooth, the FAULT pin is used to pull down the DC
level of the input.
The constant off-time circuits shown in Figures 10 and 12
are unique in that they also use the current sense during
normal operation. The LT1431 output reduces the normal
LT1158 110mV fault conduction threshold such that the
FAULT pin conducts at the required load current, thus
discharging the input ramp capacitor. In current limit the
LT1431 output turns off, allowing the fault conduction
threshold to reach its normal value.
The resistor RGS shown in Figure 3 is necessary to prevent
output voltage overshoot due to charge coupled into the
gate of the top MOSFET by a large start-up dv/dt on VIN.
If DC operation of the top MOSFET is required, RGS must
be 330k or greater to prevent loading the charge pump.
One fundamental difference in the operation of a step-
down regulator with synchronous switching is that it
never becomes discontinuous at light loads. The induc-
tor current doesn’t stop ramping down when it reaches
zero, but actually reverses polarity resulting in a constant
ripple current independent of load. This does not cause
any effi ciency loss as might be expected, since the nega-
tive inductor current is returned to VIN when the switch
turns back on.
The LT1158 performs the synchronous MOSFET drive
and current sense functions in a step-down switching
regulator. A reference and PWM are required to complete
the regulator. Any voltage-mode PWM controller may be
used, but the LT3525 is particularly well suited to high
power, high effi ciency applications such as the 10A circuit
shown in Figure 13. In higher current regulators a small
Schottky diode across the bottom MOSFET helps to reduce
reverse-recovery switching losses.
The LT1158 input pin can also be driven directly with a
ramp or sawtooth. In this case, the DC level of the input
waveform relative to the 1.4V threshold sets the LT1158
duty cycle. In the 5V to 3.3V converter circuit shown in
Figure 11, an LT1431 controls the DC level of a triangle wave
generated by a CMOS 555. The Figure 10 and 12 circuits
use an RC network to ramp the LT1158 input back up to
its 1.4V threshold following each switch cycle, setting a
constant off time. Figure 4 shows the effi ciency vs output
current for the Figure 12 regulator with VIN = 12V.
Figure 4. Typical Effi ciency Curve for Step-Down
Regulator with Synchronous Switch
LT1158
13
1158fb
APPLICATIONS INFORMATION
Low Current Shutdown
The LT1158 may be shutdown to a current level of 2mA by
pulling the enable pin 4 low. In this state both the top and
bottom MOSFETs are actively held off against any transients
which might occur on the output during shutdown. This
is important in applications such as 3-phase DC motor
control when one of the phases is disabled while the other
two are switching.
If zero standby current is required and the load returns to
ground, then a switch can be inserted into the supply path
of the LT1158 as shown in Figure 5. Resistor RGS ensures
that the top MOSFET gate discharges, while the voltage
across the bottom MOSFET goes to zero. The voltage drop
across the P-channel supply switch must be less than
300mV, and RGS must be 330k or greater for DC operation.
This technique is not recommended for applications which
require the LT1158 VDS sensing function.
Figure 5. Adding Zero Current Shutdown
Figure 7. Short-Circuit Protection with Current-Sensing MOSFET
Figure 6. Short-Circuit Protection with Standard MOSFET
Short-Circuit Protection in Bridge Applications
The LT1158 protects the top power MOSFET from output
shorts to ground, or in a full bridge application, shorts
across the load. Both standard 3-lead MOSFETs and cur-
rent-sensing 5-lead MOSFETs can be protected. The bottom
MOSFET is not protected from shorts to supply.
Current is sensed by measuring the voltage across a cur-
rent shunt in the source lead of a standard 3-lead MOSFET
(Figure 6). For the current-sensing MOSFET shown in
Figure 7, the sense resistor is inserted between the sense
and Kelvin leads.
The SENSE+ and SENSE PC traces must be routed together
at minimum spacing to prevent stray pickup, and a Kelvin
connection must be used at the current shunt for the 3-lead
MOSFET. Using a twisted pair is the safest approach and
is recommended for sense runs of several inches.
When the voltage across RSENSE exceeds 110mV, the
LT1158 FAULT pin begins to conduct, signaling a fault
condition. The current in a short circuit ramps very rapidly,
limited only by the series inductance and ultimately the
MOSFET and shunt resistance. Due to the response time
100k
V+
V+
LT1158
VP0300
RGS
1158 F05
LOAD
GND
TO OTHER
CONTROL
CIRCUITS
CMOS
ON/OFF
100k
V+
T GATE DR
T GATE FB
T SOURCE
B GATE DR
B GATE FB
2N2222
+
+
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
FAULT
LT1158
RSENSE
5V
V+
1158 F06
10k
+
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
FAULT
LT1158
5V
V+
1158 F07
10k
RSENSE
KELVIN
SENSE
OUTPUT
+
LT1158
14
1158fb
APPLICATIONS INFORMATION
the value of RSENSE for the 5-lead MOSFET increases by
the current sensing ratio (typically 1000 – 3000), thus
eliminating the need for a low valued shunt. ΔV is in the
range of 1V to 3V in most applications.
Assuming a dead short, the MOSFET dissipation will rise
to VSUPPLY • ISC. For example, with a 24V supply and ISC
= 10A, the dissipation would be 240W. To determine how
long the MOSFET can remain at this dissipation level before
it must be shut down, refer to the SOA curves given in
the MOSFET data sheet. For example, an IRFZ34 would
be safe if shut down within 10ms.
A Tektronix A6303 current probe is highly recommended
for viewing output fault currents.
If Short-Circuit Protection is Not Required
In applications which do not require the current sense
capability of the LT1158, the sense pins 11 and 12 should
both be connected to pin 13, and the FAULT pin 5 left
open. The enable pin 4 may still be used to shut down
the device. Note, however, that when unprotected the top
MOSFET can be easily (and often dramatically) destroyed
by even a momentary short.
Self-Protection with Automatic Restart
When using the current sense circuits of Figures 6 and 7,
local shutdown can be achieved by connecting the FAULT
pin through resistor RF to the enable pin as shown in
Figure 9. An optional thermostat mounted to the load or
MOSFET heatsink can also be used to pull enable low.
An internal 25μA current source normally keeps the enable
capacitor CEN charged to the 7.5V clamp voltage (or to V+,
for V+ < 7.5V). When a fault occurs, CEN is discharged to
below the enable low threshold (1.15V typ) which shuts
down both MOSFETs. When the FAULT pin or thermostat
releases, CEN recharges to the upper enable threshold
where restart is attempted. In a sustained short circuit,
FAULT will again pull low and the cycle will repeat until the
short is removed. The time to shut down for a DC input
or thermal fault is given by:
t
SHUTDOWN = (100 + 0.8RF) CEN DC input
of the LT1158 current limit loop, an initial current spike of
from 2 to 5 times the fi nal value will be present for a few
μs, followed by an interval in which IDS = 0. The current
spike is normally well within the safe operating area (SOA)
of the MOSFET, but can be further reduced with a small
(0.5μH) inductor in series with the output.
Figure 8. Top MOSFET Short-Circuit Turn-On current
5μs/DIV
LT1158 F08
5A/DIV
ISC
If neither the enable nor input pins are pulled low in
response to the fault indication, the top MOSFET current
will recover to a steady-state value ISC regulated by the
LT1158 as shown in Figure 8:
ISC =
=
=
()
150mV
R
R150mV
I
Ir 150mV
R
SENSE
SENSE SC
SC SSENSE
2
SENSE SC
1150mV
V
Rr 150mV
I1
=
()
Δ
1150mV
V
sense ratio, V = V
2
Δ
Δ
=
r current GGS =−VV
GS T
The time for the current to recover to ISC following the
initial current spike is approximately QGS/0.5mA, where
QGS is the MOSFET gate-to-source charge. ISC need not
be set higher than the required start-up current for mo-
tors (see Starting High In-Rush Current Loads). Note that
LT1158
15
1158fb
APPLICATIONS INFORMATION
Figure 9. Self-Protection with Auto Restart
tSHUTDOWN becomes more diffi cult to analyze when the
output is shorted with a PWM input. This is because the
FAULT pin only conducts when fault currents are actually
present in the MOSFET. FAULT does not conduct while the
input is low in Figures 6 and 7 or during the interval IDS =
0 in Figure 8. Thus tSHUTDOWN will safely increase when
the duty cycle of the current in the top MOSFET is low,
maintaining the average MOSFET current at a relatively
constant level.
The length of time following shutdown before restart is
attempted is given by:
tV
ACC
RESTART EN EN
=
()
15
25 610
4
.
μ
In Figure 9, the top MOSFET would shut down after being
in DC current limit for 0.9ms and try to restart at 60ms
intervals, thus producing a duty cyle of 1.5% in short
circuit. The resulting average top MOSFET dissipation
during a short is easily measured by taking the product of
the supply voltage and the average supply current.
Starting High In-Rush Current Loads
The LT1158 has a VDS sensing function which allows more
than ISC to fl ow in the top MOSFET providing that the
Note that for the fi rst event only, tSHUTDOWN is approximately
twice the above value since CEN is being discharged all
the way from its quiescent voltage. Allowable values for
RF are from zero to 10k.
SENSE pin is within 1.2V of supply. Under these condi-
tions the current is limited only by the RDS(ON) in series
with RSENSE. For a 5-lead MOSFET the current is limited
by RDS(ON) alone, since RSENSE is not in the output path
(see Figure 7). Again adjusting RDS(ON) for temperature,
the worst-case start currents are:
IV
RR
START
DS ON SENSE
=+
()
+
()
12
1
.
3-Lead MOSFET
II V
R
START
DS ON
=+
()
()
12
1
.
5-Lead MOSFET
Properly sizing the MOSFET for ISTART allows inductive
loads with long time constants, such as motors with high
mechanical inertia, to be started.
Returning to the example used in Power MOSFET Selec-
tion, an IRFZ34 (RDS(ON) = 0.05Ω max) was selected for
operation at 5A. If the short-circuit current is also set at 5A,
what start current can be supported? From the equation
for RSENSE, a 0.03Ω shunt would be required, allowing
the worst-case start current to be calculated:
IVA
START
=
()
+=
12
17 005 003 10
.
.. .ΩΩ
This calculation gives the minimum current which could
be delivered with the IRFZ34 at TJ = 125°C without activat-
ing the FAULT pin on the LT1158. If more start current is
required, using an IRFZ44 (RDS(ON) = 0.028Ω max) would
increase ISTART to over 15A at TJ = 110°C, even though
the short-circuit current remains at 5A.
In order for the VDS sensing function to work properly, the
supply pins for the LT1158 must be connected at the drain
of the top MOSFET, which must be properly decoupled
(see Ugly Transient Issues).
Driving Lamps
Incandescent lamps represent a challenging load because
they have much in common with a short circuit when cold.
The top gate driver in the LT1158 can be confi gured to turn
on large lamps while still protecting the power MOSFET
FAULT
LT1158
CEN
F
1158 F09
RF
1k
7.5V
1.15V
ENABLE
OPTIONAL THERMOSTAT
CLOSE ON RISE
AIRPAX #67FXXX
25μA
7.5V
+
LT1158
16
1158fb
TYPICAL APPLICATIONS
APPLICATIONS INFORMATION
from a true short. This is done by using the current limit to
control cold fi lament current in conjunction with the self-
protection circuit of Figure 9. The reduced cold fi lament
current also extends the life of the fi lament.
A good guideline is to choose RSENSE to set ISC at ap-
proximately twice the steady state “on” current of the
lamp(s). tSHUTDOWN is then made long enough to guar-
antee that the lamp fi laments heat and drop out of current
limit before the enable capacitor discharges to the enable
low threshold. For a short-circuit, the enable capacitor
will continue to discharge below the threshold, shutting
down the top MOSFET. The LT1158 will then go into the
automatic restart mode described in Self-Protection with
Automatic Restart above.
The time constant for an incandescent fi lament is tens
of milliseconds, which means that tSHUTDOWN will have
to be longer than in most other applications. This places
increased SOA demands on the MOSFET during a short
circuit, requiring that a larger than normal device be used.
A protected high current lamp driver application is shown
in Figure 18.
Figure 10. High Effi ciency 3.3V Step-Down Switching Regulator (Requires No Heatsinks)
0.01μF
LT1158 F10
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
1N4148
10μF
24k
1000pF
0.05μF 1k
510Ω 1N4148
1
2
3
4
8
7
6
5
LT1431
1000μF
LOW ESR
500μF
LOW ESR
RS
0.015Ω
L1
22μH
SHORT-CIRCUIT
CURRENT = 8A
200pF
+3.3V/6A
OUTPUT
5V TO 10V INPUT (USE LOGIC-LEVEL Q1, Q2)
8V TO 20V INPUT (USE STANDARD Q1, Q2
AND CONNECT BOOST DIODE TO PIN 1)
Q1
680k
0.1μF
s
100Ω
100Ω
Q2
VP0300
INSERT FOR
ZERO POWER
SHUTDOWN
100k
CMOS
ON/OFF
2N2222
+–
100k
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
IRFZ44 (STANDARD)
L1: HURRICANE LAB
HL-KK122T/BB
RS: VISHAY/DALE TYPE LVR-3
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
FREQUENCY = WHERE tOFF ≈ 10μs
1
tOFF
( )
1 – VOUT
VIN
4.99k
1%
1.62k
1%
+
+
+
LT1158
17
1158fb
TYPICAL APPLICATIONS
Figure 12. High Effi ciency 5V Step-Down Switching Regulator (Requires No Heatsinks)
Figure 11. 5V to 3.XXV,15A Converter (Uses PC Board Area for Heatsink)
200pF
1000pF
LT1158 F11
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
0.01μF
10μF
0.33μF
DRIVER SUPPLY 10V TO 15V
(CAN BE POWERED FROM VIN
WITH LOGIC-LEVEL Q1, Q2)
24k
0.01μF
1
2
3
4
8
7
6
5
LT1431
330μF
6.3V
AVX s 4
220μF
10V
OS-CON s 4
RS
L1
8μH
0.01Ω
EA
SHORT-CIRCUIT
CURRENT = 22A
VOUT
15A
VIN 4.5V TO 6V
500k
0.22μF
1
2
3
4
8
7
6
5
CMOS
555 RX
1%
4.99k
1%
16k
470pF
Q1, Q2: MTB75N05HD (USE WITH 10V TO 15V DRIVER SUPPLY)
MTB75N03HDL (USE WITH VIN DRIVER SUPLY)
CMOS 555: LMC555 OR TLC555
L1: COILTRONICS CTX02-12171-1
RS: KRL/BANTRY SL-1R010J s 2
Q2
3.3k
+
SHUTDOWN
Q1
BAS16
VOUT
RX (1%)
2.90V
806Ω
3.05V
1.10k
3.30V
1.62k
3.45V
1.91k
3.60V
2.21k
+
+
+
0.01μF
LT1158 F12
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
1N4148
10μF
24k
1000pF
0.05μF 1k
510Ω 1N4148
1
2
3
4
8
7
6
5
LT1431
1000μF
LOW ESR
500μF
LOW ESR
RS
20mΩ
SHORT-CIRCUIT
CURRENT = 6A
+5V/4A
OUTPUT
8V TO 20V INPUT
IRFZ34
510k
0.1μF
s
L1: COILTRONICS
CTX50-5-52
RS: VISHAY/DALE TYPE LVR-3
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
FREQUENCY = WHERE tOFF ≈ 10μs
VP0300
INSERT FOR
ZERO POWER
SHUTDOWN
100k
CMOS
ON/OFF
SEE FIGURE 4 FOR EFFICIENCY CURVE
100Ω
100Ω
IRFZ44
L1
50μH
+–
2N2222
100k
1
tOFF
( )
1 – VOUT
VIN
+
+
+
LT1158
18
1158fb
TYPICAL APPLICATIONS
Figure 13. 90% Effi ciency 24V to 5V 10A Switching Regulator
95% Effi ciency 24V to 12V 10A Low Dropout Switching Regulator
Figure 14. Potentiometer-Adjusted Open Loop Motor Speed Control with Short-Circuit Protection
330pF
LT1158 F13
0.01μF
4.7k
1μF
1000μF
LOW ESR
500μF EA
LOW ESR
RS
0.007Ω
L1
70μH
SHORT-CIRCUIT
CURRENT = 15A
5V OR
12V*
INPUT
30V MAX
IRFZ44
330k
0.1μF
10k
30k
10μF
* ADD THESE COMPONENTS TO IMPLEMENT
LOW-DROPOUT 12V REGULATOR
L1: MAGNETICS CORE #55585-A2
30 TURNS 14GA MAGNET WIRE
MBR340
27k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
510Ω
1N4148
1N4148
1N4148
1μF
2.2nF
0.1μF
3.4k
*
*
EXT
SYNC
0.01μF
0.01μF
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LT3525
4.7k
SHUTDOWN
RS: DALE TYPE LVR-3
ULTRONIX RCS01
(2) IRFZ44
+–
f = 25kHz
+
+
+
+
+
+
2.2nF
LT1158 F14
0.01μF
5.1k
1000μF
LOW ESR
24Ω
START CURRENT
= 15A MINIMUM
10V TO 30V
24Ω
0.1μF
10μF
THE CMOS 555 IS USED AS A 25kHz TRIANGLE-WAVE
OSCILLATOR DRIVING THE LT1158 INPUT PIN. THE
D.C. LEVEL OF THE TRIANGLE WAVE IS SET BY THE
POTENTIOMETER ON THE CMOS 555 SUPPLY PIN, AND
ALLOW ADJUSTMENT OF THE LT1158 DUTY CYCLE
FROM 0 TO 100%.
CMOS 555: LMC555 OR TLC555
Q1, Q2: MTP35N06E
13k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
510Ω
1N4148
1μF
MOTOR SPEED
0 TO 100%
0.33μF
10k
+
1
2
3
4
8
7
6
5
CMOS
555
1N5231A
Q1
Q2
0.02Ω
7.5k
1k
-
+
+
+
LT1158
19
1158fb
TYPICAL APPLICATIONS
Figure 15. High Effi ciency 6-Cell NiCd Protected Motor Drive
Figure 16. 3-Phase Brushless DC Motor Control
BAT85
LT1158 F15
0.01μF
15Ω
START CURRENT
= 25A MINIMUM
15Ω
0.1μF
Q2
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
RS: DALE TYPE LVR-3
ULTRONIX RCS01
1k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
RS
0.015Ω
1N4148
+
Q1
STOP
(FREE RUN)
PWM
100μF
7.2V
NOMINAL
10μF
1μF
-
+
+
+
POSITION FEEDBACK
CONTROLS LT1158
ENABLE INPUTS
FA
5V
1158 F16
ENABLE
FAULT
INPUT
LT1158
V+
ENABLE
FAULT
INPUT
LT1158
V+
ENABLE
FAULT
INPUT
LT1158
V+
FBFC
SHUTDOWN
PWM CONTROLS
LT1158 INPUTS
COMMUTATING LOGIC
LT1158
20
1158fb
TYPICAL APPLICATIONS
Control Logic for Locked Anti-Phase Drive
Motor stops if either side is shorted to ground
Control Logic for Sign/Magnitude Drive
Figure 17. 10A Full Bridge Motor Control
LT1158 F17a
0.01μF
LOW
ESR
15Ω
SIDE B: SHOWS
CURRENT-SENSING
MOSFET CONNECTION
10V TO 30V
0.1μF
Q1, Q3: IRF540 (STANDARD)
IRC540 (SENSE FET)
Q2, Q4: IRFZ44
D1, D2: BAT83
RS: DALE TYPE LVR-3
ULTRONIX RCS01
1N4148
+
Q2
0.01μF
15Ω
15Ω
10μF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
1N4148
Q1
Q4
RS
0.015Ω
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
Q3
ENABLE A
INPUT A
FAULT A
ENABLE B
INPUT B
FAULT B
10μF
470μF
LOW
ESR
470μF
15Ω 2.4k
2.4k
0.1μF
D1
47Ω
D2
SIDE A: SHOWS
STANDARD MOSFET
CONNECTION
+
-
+
+
+
+
1μF
1N4148
PWM
DIRECTION
STOP
(FREE RUN)
ENABLE A
INPUT A
FAULT A
ENABLE B
INPUT B
FAULT B
74HC02
1158F17b
+0.1μF 1N4148
PWM
5V ENABLE A
INPUT A
FAULT A
ENABLE B
INPUT B
FAULT B
74HC132
1158F17c
5.1k 0.01μF
150k
LT1158
21
1158fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S16 (WIDE) 0502
NOTE 3
.398 – .413
(10.109 – 10.490)
NOTE 4
16 15 14 13 12 11 10 9
1
N
2345678
N/2
.394 – .419
(10.007 – 10.643)
.037 – .045
(0.940 – 1.143)
.004 – .012
(0.102 – 0.305)
.093 – .104
(2.362 – 2.642)
.050
(1.270)
BSC .014 – .019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 3
.009 – .013
(0.229 – 0.330)
.005
(0.127)
RAD MIN
.016 – .050
(0.406 – 1.270)
.291 – .299
(7.391 – 7.595)
NOTE 4
× 45°
.010 – .029
(0.254 – 0.737)
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.420
MIN
.325 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
N
123 N/2
.050 BSC
.030 ±.005
TYP
N16 1002
.255 ± .015*
(6.477 ± 0.381)
.770*
(19.558)
MAX
16
12345678
910
11
12
13
14
15
.020
(0.508)
MIN
.120
(3.048)
MIN
.130 ± .005
(3.302 ± 0.127)
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.018 ± .003
(0.457 ± 0.076)
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
PACKAGE DESCRIPTION
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
LT1158
22
1158fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1994
LT 0309 REV B • PRINTED IN USA
TYPICAL APPLICATION
Figure 18. High Current Lamp Driver with Short-Circuit Protection
LT1158 F18
ISC: 10A
tSHUTDOWN = 50ms
tRESTART = 600ms
0.01μF
6.2k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE+
SENSE
V+
B GATE DR
BOOST DR
V+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
LT1158
1N4148
ON/OFF
10μF
0.1μF
51Ω
+
IRCZ44
1000μF
MBR330
10μF
12V
12V
55W
+
+
+