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UTMC APPLICATION NOTE
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UT69R000 Bus Control
Data Transfer Acknowledge (DTACK )Operation
The 69R000 allows the user to insert wait states into read and write cycles performed on the oper-
and bus. As long as Data Transfer Acknowledge (DTACK) is high the bus cycle stretches. The
cycle continues to hold until the DTACK goes low and either Bus Error ( BTERR) or Memory
Protect (MPROT) become active. MPROT is active high; therefore, the user must ground
MPROT or use control circuitry. If a condition occurs that causes MPROT to float, it could cause
DTACK to be ignored.
Figure 1. DTACK Cycle MPROT High
Figure 2. DTACK Cycle MPROT Low
OSCIN
STATE
DTACK
MPROT
DS
OSCIN
STATE
DTACK
MPROT
DS
