Burr-BrownAudio
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
Low-Power, Low Noise and Distortion, Bipolar-Input
AUDIO OPERATIONAL AMPLIFIERS
Check for Samples: OPA1662,OPA1664
1FEATURES DESCRIPTION
The OPA1662 (dual) and OPA1664 (quad) series of
234Low Noise: 3.3 nV/Hz at 1 kHz bipolar-input operational amplifiers achieve a low 3.3
Low Distortion: 0.00006% at 1 kHz nV/Hz noise density with an ultralow distortion of
Low Quiescent Current: 0.00006% at 1 kHz. The OPA1662 and OPA1664
1.5 mA per Channel series of op amps offer rail-to-rail output swing to
within 600 mV with 2-kload, which increases
Slew Rate: 17 V/μsheadroom and maximizes dynamic range. These
Wide Gain Bandwidth: 22 MHz (G = +1) devices also have a high output drive capability of
Unity Gain Stable ±30 mA.
Rail-to-Rail Output These devices operate over a very wide supply range
Wide Supply Range: of ±1.5 V to ±18 V, or +3 V to +36 V, on only 1.5 mA
of supply current per channel. The OPA1662 and
±1.5 V to ±18 V, or +3 V to +36 V OPA1664 op amps are unity-gain stable and provide
Dual and Quad Versions Available excellent dynamic behavior over a wide range of load
Small Package Sizes: conditions.
Dual: SO-8 and MSOP-8 These devices also feature completely independent
Quad: SO-14 and TSSOP-14 circuitry for lowest crosstalk and freedom from
interactions between channels, even when overdriven
APPLICATIONS or overloaded.
USB and Firewire Audio Systems The OPA1662 and OPA1664 are specified
Analog and Digital Mixers from 40°C to +85°C. SoundPlus
Portable Recording Systems
Audio Effects Processors
High-End A/V Receivers
High-End DVD and Blu-RayPlayers
HIGH-End Car Audio
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2SoundPlus is a trademark of Texas Instruments Incorporated.
3Blu-Ray is a trademark of Blu-Ray Disc Association.
4All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright ©2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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+INA
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-InA
+InA
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-InB
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OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
SO-8 D OP1662
OPA1662 MSOP-8 DGK OUQI
SO-14 D OP1664
OPA1664 TSSOP-14 PW OP1664
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range (unless otherwise noted). OPA1662, OPA1664 UNIT
Supply voltage, VS= (V+) (V) 40 V
Input voltage (V)0.5 to (V+) + 0.5 V
Input current (all pins except power-supply pins) ±10 mA
Output short-circuit(2) Continuous
Operating temperature range 55 to +125 °C
Storage temperature range 65 to +150 °C
Junction temperature 200 °C
Human body model (HBM) 2 kV
ESD ratings Charged device model (CDM) 1 kV
Machine model (MM) 200 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package.
PIN CONFIGURATIONS
OPA1662: D AND DGK PACKAGES OPA1664: D AND PW PACKAGES
SO-8 AND MSOP-8 SO-14 AND TSSOP-14
(TOP VIEW) (TOP VIEW)
2Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
ELECTRICAL CHARACTERISTICS: VS=±15 V
At TA= +25°C and RL= 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
0.00006 %
THD+N Total harmonic distortion + noise G = +1, f = 1 kHz, VO= 3 VRMS 124 dB
0.00004 %
SMPTE/DIN two-tone, 4:1
(60 Hz and 7 kHz) 128 dB
DIM 30 0.00004 %
G = +1,
IMD Intermodulation distortion (3-kHz square wave and
VO= 3 VRMS 128 dB
15-kHz sine wave)
0.00004 %
CCIF twin-tone
(19 kHz and 20 kHz) 128 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product G = +1 22 MHz
SR Slew rate G = 1 17 V/μs
Full power bandwidth(1) VO= 1 VP2.7 MHz
Overload recovery time G = 10 1 μs
Channel separation (dual and quad) f = 1 kHz 120 dB
NOISE
enInput voltage noise f = 20 Hz to 20 kHz 2.8 μVPP
f = 1 kHz 3.3 nV/Hz
Input voltage noise density f = 100 Hz 5 nV/Hz
f = 1 kHz 1 pA/Hz
InInput current noise density f = 100 Hz 2 pA/Hz
OFFSET VOLTAGE
VS=±1.5 V to ±18 V ±0.5 ±1.5 mV
VOS Input offset voltage VS=±1.5 V to ±18 V, TA=40°C to +85°(2) 2 8 μV/°C
PSRR Power-supply rejection ratio VS=±1.5 V to ±18 V 1 3 μV/V
INPUT BIAS CURRENT
IBInput bias current VCM = 0 V 600 1200 nA
IOS Input offset current VCM = 0 V ±25 ±100 nA
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V) +0.5 (V+) 1 V
CMRR Common-mode rejection ratio 106 114 dB
INPUT IMPEDANCE
Differential 170 || 2 k|| pF
Common-mode 600 || 2.5 M|| pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V) + 0.6 V VO(V+) 0.6 V, RL= 2 k106 114 dB
OUTPUT
VOUT Output voltage RL= 2 k(V) + 0.6 (V+) 0.6 V
IOUT Output current See Typical Characteristics mA
ZOOpen-loop output impedance See Typical Characteristics
ISC Short-circuit current(3) ±50 mA
CLOAD Capacitive load drive 200 pF
(1) Full-power bandwidth = SR/(2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
(3) One channel at a time.
Copyright ©2011, Texas Instruments Incorporated 3
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: VS=±15 V (continued)
At TA= +25°C and RL= 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
VSSpecified voltage range ±1.5 ±18 V
IOUT = 0 A 1.5 1.8 mA
Quiescent current
IQ(per channel) IOUT = 0 A, TA=40°C to +85°(4) 2 mA
TEMPERATURE
Specified range 40 +85 °C
Operating range 55 +125 °C
(4) Specified by design and characterization.
ELECTRICAL CHARACTERISTICS: VS= +5 V
At TA= +25°C and RL= 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
0.0001 %
THD+N Total harmonic distortion + noise G = +1, f = 1 kHz, VO= 3 VRMS 120 dB
0.00004 %
SMPTE/DIN two-tone, 4:1
(60 Hz and 7 kHz) 128 dB
DIM 30 0.00004 %
G = +1,
IMD Intermodulation distortion (3-kHz square wave and
VO= 3 VRMS 128 dB
15-kHz sine wave)
0.00004 %
CCIF twin-tone
(19 kHz and 20 kHz) 128 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product G = +1 20 MHz
SR Slew rate G = 1 13 V/μs
Full power bandwidth(1) VO= 1 VP2 MHz
Overload recovery time G = 10 1 μs
Channel separation (dual and quad) f = 1 kHz 120 dB
NOISE
enInput voltage noise f = 20 Hz to 20 kHz 3.3 μVPP
f = 1 kHz 3.3 nV/Hz
Input voltage noise density f = 100 Hz 5 nV/Hz
f = 1 kHz 1 pA/Hz
InInput current noise density f = 100 Hz 2 pA/Hz
OFFSET VOLTAGE
VS=±1.5 V to ±18 V ±0.5 ±1.5 mV
VOS Input offset voltage VS=±1.5 V to ±18 V, TA=40°C to +85°(2) 2 8 μV/°C
PSRR Power-supply rejection ratio VS=±1.5 V to ±18 V 1 3 μV/V
INPUT BIAS CURRENT
IBInput bias current VCM = 0 V 600 1200 nA
IOS Input offset current VCM = 0 V ±25 ±100 nA
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V) +0.5 (V+) 1 V
CMRR Common-mode rejection ratio 86 100 dB
INPUT IMPEDANCE
Differential 170 || 2 k|| pF
Common-mode 600 || 2.5 M|| pF
(1) Full-power bandwidth = SR/(2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
4Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
ELECTRICAL CHARACTERISTICS: VS= +5 V (continued)
At TA= +25°C and RL= 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted.
OPA1662, OPA1664
PARAMETER CONDITIONS MIN TYP MAX UNIT
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V) + 0.6 V VO(V+) 0.6 V, RL= 2 k90 100 dB
OUTPUT
VOUT Output voltage RL= 2 k(V) + 0.6 (V+) 0.6 V
IOUT Output current See Typical Characteristics mA
ZOOpen-loop output impedance See Typical Characteristics
ISC Short-circuit current(3) ±40 mA
CLOAD Capacitive load drive 200 pF
POWER SUPPLY
VSSpecified voltage range ±1.5 ±18 V
IOUT = 0 A 1.4 1.7 mA
Quiescent current
IQ(per channel) IOUT = 0 A, TA=40°C to +85°(2) 2 mA
TEMPERATURE
Specified range 40 +85 °C
Operating range 55 +125 °C
(3) One channel at a time.
THERMAL INFORMATION: OPA1662 OPA1662
THERMAL METRIC(1) D (SO) DGK (MSOP) UNITS
8 PINS 8 PINS
θJA Junction-to-ambient thermal resistance 156.3 225.4
θJCtop Junction-to-case (top) thermal resistance 85.5 78.8
θJB Junction-to-board thermal resistance 64.9 110.5 °C/W
ψJT Junction-to-top characterization parameter 33.8 14.6
ψJB Junction-to-board characterization parameter 64.3 108.5
θJCbot Junction-to-case (bottom) thermal resistance N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION:OPA1664 OPA1664
THERMAL METRIC(1) D (SO) PW (TSSOP) UNITS
14 PINS 14 PINS
θJA Junction-to-ambient thermal resistance 78.6 125.8
θJCtop Junction-to-case (top) thermal resistance 37.0 45.2
θJB Junction-to-board thermal resistance 24.9 57.5 °C/W
ψJT Junction-to-top characterization parameter 9.7 5.5
ψJB Junction-to-board characterization parameter 24.6 56.7
θJCbot Junction-to-case (bottom) thermal resistance N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright ©2011, Texas Instruments Incorporated 5
Product Folder Link(s): OPA1662 OPA1664
1 10 100 1k 10k 100k
0.1
1
10
100
0.1
1
10
100
Frequency (Hz)
Voltage Noise (nV/ Hz)
Current Noise (pA/ Hz)
Voltage Noise
Current Noise
G001
Time (1s/div)
Voltage Noise ( 50nV/div)
G002
0
2
5
8
10
12
15
10k 100k 1M 10M
Frequency (Hz)
Output Voltage (V)
VS = ±15 V
VS = ±5 V
VS = ±1.5 V
G004
1
10
100
1k
10k
100 1k 10k 100k 1M
Resistor Noise
OPA166x
OPA165x
Source Resistance ( )W
Voltage Noise (nV/ Hz)
Eo
2= en
2+ (inRS)2+ 4KTRS
G003
RS
EO
10 100 1k 10k 100k 1M 10M 100M
−20
0
20
40
60
80
100
120
140
0
45
90
135
180
Frequency (Hz)
Gain (dB)
Phase (°)
Gain
Phase
CL = 100pF
G005
−20
0
20
40
1k 10k 100k 1M 10M 100M
Frequency (Hz)
Gain (dB)
Gain = −1V/V
Gain = +1V/V
Gain = +10V/V
G006
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY AND
INPUT CURRENT NOISE DENSITY vs FREQUENCY 0.1Hz TO 10Hz NOISE
Figure 1. Figure 2.
VOLTAGE NOISE vs SOURCE RESISTANCE MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
Figure 3. Figure 4.
GAIN AND PHASE vs FREQUENCY CLOSED-LOOP GAIN vs FREQUENCY
Figure 5. Figure 6.
6Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
0.00001
0.0001
0.001
0.01
20 100 1k 10k 20k
Frequency (Hz)
THD+N (%)
G = 10V/V, RL = 600
G = 10V/V, RL = 2k
G = +1V/V, RL = 600
G = +1V/V, RL = 2k
G = −1V/V, RL = 600
G = −1V/V, RL = 2k
VOUT = 3VRMS
BW = 80kHz
G007
0.00001
0.0001
0.001
0.01
20 100 1k 10k 20k
Frequency (Hz)
THD+N (%)
G = 10V/V, RL = 600
G = 10V/V, RL = 2k
G = +1V/V, RL = 600
G = +1V/V, RL = 2k
G = −1V/V, RL = 600
G = −1V/V, RL = 2k
VOUT = 1VRMS
BW = 80kHz
VS = ±2.5V
G038
0.00001
0.0001
0.001
0.01
20 100 1k 10k 100k
Frequency (Hz)
THD+N (%)
G = 10V/V, RL = 600
G = 10V/V, RL = 2k
G = +1V/V, RL = 600
G = +1V/V, RL = 2k
G = −1V/V, RL = 600
G = −1V/V, RL = 2k
VOUT = 3VRMS
BW = 500kHz
G009
0.00001
0.0001
0.001
0.01
20 100 1k 10k 100k
Frequency (Hz)
THD+N (%)
G = 10V/V, RL = 600
G = 10V/V, RL = 2k
G = +1V/V, RL = 600
G = +1V/V, RL = 2k
G = −1V/V, RL = 600
G = −1V/V, RL = 2k
VOUT = 1VRMS
BW = 500kHz
VS = ±2.5V
G039
0.00001
0.0001
0.001
0.01
20 100 1k 10k 20k
Frequency (Hz)
THD+N (%)
RS= 0 W
RS= 30 W
RS= 60 W
RS= 1 kW
VOUT = 3 VRMS
BW = 80 kHz
G008
OPA1662
+15V
-15V RL
RSOURCE
0.00001
0.0001
0.001
0.01
20 100 1k 10k 100k
Frequency (Hz)
THD+N (%)
RS= 0 W
RS= 30 W
RS= 60 W
RS= 1 kW
VOUT = 3 VRMS
BW = 500 kHz
G010
OPA1662
+15V
-15V RL
RSOURCE
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
THD+N RATIO vs FREQUENCY THD+N RATIO vs FREQUENCY
Figure 7. Figure 8.
THD+N RATIO vs FREQUENCY THD+N RATIO vs FREQUENCY
Figure 9. Figure 10.
THD+N RATIO vs FREQUENCY THD+N RATIO vs FREQUENCY
Figure 11. Figure 12.
Copyright ©2011, Texas Instruments Incorporated 7
Product Folder Link(s): OPA1662 OPA1664
0.00001
0.0001
0.001
0.01
1m 10m 100m 1 10 20
Output Amplitude (Vrms)
THD+N (%)
G = 10V/V, RL = 600
G = 10V/V, RL = 2k
G = +1V/V, RL = 600
G = +1V/V, RL = 2k
G = −1V/V, RL = 600
G = −1V/V, RL = 2k
f = 1 kHz
BW = 80 kHz
RS = 0
G011
0.00001
0.0001
0.001
0.01
100m 1 10 20
Output Amplitude (Vrms)
THD+N (%)
DIM 30: 3 kHz − Square Wave, 15 kHz Sine Wave
CCIF Twin Tone: 19 kHz and 20 kHz
SMPTE / DIN: Two −Tone 4:1, 60 Hz and 7 KHz
G=+1V/V
G012
−160
−140
−120
−100
−80
100 1k 10k 100k
Frequency (Hz)
Crosstalk (dB)
VOUT = 3 VRMS
Gain = +1 V/V
G013
0
20
40
60
80
100
120
140
100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
CMRR, PSRR (dB)
+PSRR
−PSRR
CMRR
G014
Time (1 s/div)m
Voltage (25 mV/div)
VIN
VOUT
G = +1 V/V
CL= 10 pF
VS= 1.5 V±
G040
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted. INTERMODULATION DISTORTION vs
THD+N RATIO vs OUTPUT AMPLITUDE OUTPUT AMPLITUDE
Figure 13. Figure 14.
CHANNEL SEPARATION vs FREQUENCY CMRR AND PSRR vs FREQUENCY (Referred to Input)
Figure 15. Figure 16.
SMALL-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE
Figure 17. Figure 18.
8Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
Time (1 s/div)m
Voltage (25 mV/div)
VIN
VOUT
G016
G = −1 V/V
CL= 10 pF
VS= 1.5 V±
Time (1 s/div)m
Voltage (25 mV/div)
VIN
VOUT
G = −1 V/V
CL= 10 pF
G041
Time (1 s/div)m
Voltage (250 mV/div)
VIN
VOUT
G = +1 V/V
CL= 10 pF
VS= 1.5 V±
G032
Time (1 s/div)m
Voltage (2.5 V/div)
VIN
VOUT
G = +1 V/V
CL= 10 pF
RF= 1 kW
G017
Time (1 s/div)m
Voltage (2.5 V/div)
G018
G = −1 V/V
CL= 10 pF
VIN
VOUT
Time (1 s/div)m
Voltage (250 mV/div)
G = −1 V/V
CL= 10 pF
VS= 1.5 V±
G035
VIN
VOUT
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE
Figure 19. Figure 20.
LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE
Figure 21. Figure 22.
LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE
Figure 23. Figure 24.
Copyright ©2011, Texas Instruments Incorporated 9
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0
5
10
15
20
25
30
35
40
45
50
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Overshoot (%)
RS= 0 W
RS= 25 W
RS= 50 W
VOUT = 100 mVPP
G = +1 V/V
G019
+15 V
-15 V
RS
CL
OPA1662
RL
0
5
10
15
20
25
30
35
40
45
50
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Overshoot (%)
RS= 0 W
RS= 25 W
RS= 50 W
VOUT = 100 mVPP
G = −1 V/V
G020
OPA1662
R =
I2 kW
RS
CL
RF= 2 kW
+15 V
-15 V
0
5
10
15
20
25
30
35
40
45
50
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Overshoot (%)
RS= 0 W
RS= 25 W
RS= 50 W
VOUT = 100 mVPP
G = +1 V/V
VS= 1.5 V±
G034
+15 V
-15 V
RS
CL
OPA1662
RL
0
5
10
15
20
25
30
35
40
45
50
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Overshoot (%)
RS= 0 W
RS= 25 W
RS= 50 WVOUT = 100 mVPP
G = −1 V/V
VS= 1.5 V±
G033
OPA1662
R =
I2 kW
RS
CL
RF= 2 kW
+15 V
-15 V
0
5
10
15
20
25
30
35
40
45
50
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Percent Overshoot (%)
VS = ±18 V
VS = ±1.5 V
G = +1 V/V
VIN = 100 mVPP
G037
0
5
10
15
20
25
30
35
40
45
50
0 1 2 3 4 5
Capacitance (pF)
Overshoot (%)
VS= 18 V±
VS= 1.5 V±
VOUT = 100 mVPP
G = +1 V/V
CL= 100 pF
G021
OPA1662
R =
I2 kW
RS
CL
CF
RF= 2 kW
+15 V
-15 V
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD vs CAPACITIVE LOAD
Figure 25. Figure 26.
SMALL-SIGNAL OVERSHOOT SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD vs CAPACITIVE LOAD
Figure 27. Figure 28.
SMALL-SIGNAL OVERSHOOT PERCENT OVERSHOOT
vs FEEDBACK CAPACITOR vs CAPACITIVE LOAD
Figure 29. Figure 30.
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0
10
20
30
40
50
60
70
80
90
0 50 100 150 200 250 300 350 400
Capacitance (pF)
Phase Margin (°)
VS = ±18 V
VS = ±1.5 V
G036
−1
−0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
−40 −15 10 35 60 85 110 135
Temperature (°C)
AOL (µV)
RL = 10 k
RL = 2 k
RL = 600
G022
−1000
−800
−600
−400
−200
0
200
400
−40 −15 10 35 60 85 110 135
Temperature (°C)
Ib and Ios Current (nA)
IOS
IBP
IBN
G023
−800
−600
−400
−200
0
200
−18 −14 −10 −6 −2 2 6 10 14 18
Common−Mode Voltage (V)
Ib and Ios Current (nA)
−Ib
+Ib
Ios
G024
1.2
1.3
1.4
1.5
1.6
1.7
1.8
−40 −15 10 35 60 85 110 135
Temperature (°C)
Supply Current (mA)
G025
0
0.5
1
1.5
2
2.5
3
0 4 8 12 16 20 24 28 32 36 40
Supply Voltage (V)
Supply Current (mA)
G026
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
PHASE MARGIN
vs CAPACITIVE LOAD OPEN-LOOP GAIN vs TEMPERATURE
Figure 31. Figure 32.
IBAND IOS vs TEMPERATURE IBAND IOS vs COMMON-MODE VOLTAGE
Figure 33. Figure 34.
SUPPLY CURRENT vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE
Figure 35. Figure 36.
Copyright ©2011, Texas Instruments Incorporated 11
Product Folder Link(s): OPA1662 OPA1664
30
35
40
45
50
55
60
−40 −15 10 35 60 85 110 135
Temperature (°C)
Short Circuit Current (mA)
+Isc
−Isc
G027
−20
−15
−10
−5
0
5
10
15
20
20 25 30 35 40 45 50 55 60
Output Current (mA)
Output Volage Swing (V)
G028
−55 C°
−40 C°
−25 C°
0 C°
+25 C°
+85 C°
Time (0.5 s/div)m
Output Voltage (5V /div)
VIN
VOUT
G = −10 V/V
G029
Time (0.5 s/div)m
Output Voltage (5 V/div)
VIN
VOUT
G = −10 V/V
G031
Time (250 s/div)m
Voltage (5 V/div)
VOUT
VIN
G042
1
10
100
1k
10 100 1k 10k 100k 1M
Frequency (Hz)
Impedance ()
G030
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VS=±15 V, and RL= 2 kΩ, unless otherwise noted.
SHORT-CIRCUIT CURRENT vs TEMPERATURE OUTPUT VOLTAGE vs OUTPUT CURRENT
Figure 37. Figure 38.
POSITIVE OVERLOAD RECOVERY NEGATIVE OVERLOAD RECOVERY
Figure 39. Figure 40.
OPEN-LOOP OUTPUT IMPEDANCE vs
FREQUENCY NO PHASE REVERSAL
Figure 41. Figure 42.
12 Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
IN-
Pre-Output Driver OUT
V-
V+
IN+
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
APPLICATION INFORMATION
applications do not require equal positive and
The OPA1662 and OPA1664 are unity-gain stable, negative output voltage swing. With the OPA166x
precision dual and quad op amps with very low noise. series, power-supply voltages do not need to be
Applications with noisy or high-impedance power equal. For example, the positive supply could be set
supplies require decoupling capacitors close to the to +25 V with the negative supply at 5 V.
device pins. In most cases, 0.1-μF capacitors are
adequate. Figure 43 shows a simplified schematic of In all cases, the common-mode voltage must be
the OPA166x (one channel shown). maintained within the specified range. In addition, key
parameters are assured over the specified
temperature range of TA=40°C to +85°C.
OPERATING VOLTAGE Parameters that vary significantly with operating
The OPA166x series op amps operate from ±1.5 V to voltage or temperature are shown in the Typical
±18 V supplies while maintaining excellent Characteristics.
performance. The OPA166x series can operate with
as little as +3 V between the supplies and with up to
+36 V between the supplies. However, some
Figure 43. OPA166x Simplified Schematic
Copyright ©2011, Texas Instruments Incorporated 13
Product Folder Link(s): OPA1662 OPA1664
1
10
100
1k
10k
100 1k 10k 100k 1M
Resistor Noise
OPA166x
OPA165x
Source Resistance ( )W
Voltage Noise (nV/ Hz)
Eo
2= en
2+ (inRS)2+ 4KTRS
G003
RS
EO
OPA166x Output
RF
Input
-
+
RI
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
INPUT PROTECTION The equation in Figure 45 shows the calculation of
the total circuit noise, with these parameters:
The input terminals of the OPA1662 and OPA1664 en= Voltage noise
are protected from excessive differential voltage with in= Current noise
back-to-back diodes, as Figure 44 illustrates. In most
circuit applications, the input protection circuitry has RS= Source impedance
no consequence. However, in low-gain or G = +1 k = Boltzmanns constant = 1.38 ×1023 J/K
circuits, fast ramping input signals can forward bias T = Temperature in Kelvins (K)
these diodes because the output of the amplifier
cannot respond rapidly enough to the input ramp. If
the input signal is fast enough to create this forward
bias condition, the input signal current must be limited
to 10 mA or less. If the input signal current is not
inherently limited, an input series resistor (RI) and/or
a feedback resistor (RF) can be used to limit the
signal input current. This resistor degrades the
low-noise performance of the OPA166x and is
examined in the following Noise Performance section.
Figure 44 shows an example configuration when both
current-limiting input and feeback resistors are used.
Figure 45. Noise Performance of the OPA166x in
Unity-Gain Buffer Configuration
BASIC NOISE CALCULATIONS
Design of low-noise op amp circuits requires careful
consideration of a variety of possible noise
contributors: noise from the signal source, noise
Figure 44. Pulsed Operation generated in the op amp, and noise from the
feedback network resistors. The total noise of the
circuit is the root-sum-square combination of all noise
NOISE PERFORMANCE components.
Figure 45 shows the total circuit noise for varying The resistive portion of the source impedance
source impedances with the op amp in a unity-gain produces thermal noise proportional to the square
configuration (no feedback resistor network, and root of the resistance. Figure 45 plots this equation.
therefore no additional noise contributions). The source impedance is usually fixed; consequently,
The OPA166x (GBW = 22 MHz, G = +1) is shown select the op amp and the feedback resistors to
with total circuit noise calculated. The op amp itself minimize the respective contributions to the total
contributes both a voltage noise component and a noise.
current noise component. The voltage noise is Figure 46 illustrates both inverting and noninverting
commonly modeled as a time-varying component of op amp circuit configurations with gain. In circuit
the offset voltage. The current noise is modeled as configurations with gain, the feedback network
the time-varying component of the input bias current resistors also contribute noise. The current noise of
and reacts with the source resistance to create a the op amp reacts with the feedback resistors to
voltage component of noise. Therefore, the lowest create additional noise components. The feedback
noise op amp for a given application depends on the resistor values can generally be chosen to make
source impedance. For low source impedance, these noise sources negligible. The equations for
current noise is negligible, and voltage noise total noise are shown for both configurations.
generally dominates. The low voltage noise of the
OPA166x series op amps makes them a better
choice for low source impedances of less than 1 k.
14 Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
R1
R2
EO
R1
R2
EO
RS
VS
RS
VS
A)NoiseinNoninvertingGainConfiguration
B)NoiseinInvertingGainConfiguration
Noiseattheoutput:
Wheree =
S4kTRS
4kTR1
4kTR2
=thermalnoiseofRS
=thermalnoiseofR1
=thermalnoiseofR2
e =
1
e =
2
Noiseattheoutput:
E =
O
21+ R2
R +R
1 S
R2
R +R
1 S
2 22
Wheree =
S4kTRS
4kTR1
4kTR2
=thermalnoiseofRS
=thermalnoiseofR1
=thermalnoiseofR2
e =
1
e =
2
R2
R +R
1 S
2
1+ R2
R1
1+ R2
R1
2
R2
R1
2
e +e +
1 2
2 2
E =
O
2e +
n
2es
2
e +e +
1 2
2 2 es
2
e +
n
2
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
Note: For the OPA166x series of op amps at 1 kHz, en= 3.3 nV/Hz.
Figure 46. Noise Calculation in Gain Configurations
Copyright ©2011, Texas Instruments Incorporated 15
Product Folder Link(s): OPA1662 OPA1664
R2
OPA166x
R1
Signal Gain = 1+
Distortion Gain = 1+
R3V = 3 V
O RMS
Generator
Output
Analyzer
Input
Audio Precision
System Two(1)
with PC Controller
SIGNAL
GAIN
DISTORTION
GAIN R1R2R3
¥
4.99 kW
1 kW
4.99 kW
10 W
49.9 W
+1
-1
101
549 W4.99 kW49.9 W+10 110
101
R2
R1
R2
R II R
1 3
Load
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
TOTAL HARMONIC DISTORTION The validity of this technique can be verified by
MEASUREMENTS duplicating measurements at high gain and/or high
frequency where the distortion is within the
The OPA166x series op amps have excellent measurement capability of the test equipment.
distortion characteristics. THD + noise is below Measurements for this data sheet were made with an
0.0006% (G = +1, VO=3VRMS, BW = 80kHz) Audio Precision System Two distortion/noise
throughout the audio frequency range, 20 Hz to 20 analyzer, which greatly simplifies such repetitive
kHz, with a 2-kload (see Figure 7 for characteristic measurements. The measurement technique can,
performance). however, be performed with manual distortion
measurement instruments.
The distortion produced by the OPA166x series op
amps is below the measurement limit of many
commercially available distortion analyzers. However, CAPACITIVE LOADS
a special test circuit (such as Figure 47 shows) can The dynamic characteristics of the OPA1662 and
be used to extend the measurement capabilities. OPA1664 have been optimized for commonly
Op amp distortion can be considered an internal error encountered gains, loads, and operating conditions.
source that can be referred to the input. Figure 47 The combination of low closed-loop gain and high
shows a circuit that causes the op amp distortion to capacitive loads decreases the phase margin of the
be gained up (refer to the table in Figure 47 for the amplifier and can lead to gain peaking or oscillations.
distortion gain factor for various signal gains). The As a result, heavier capacitive loads must be isolated
addition of R3to the otherwise standard noninverting from the output. The simplest way to achieve this
amplifier configuration alters the feedback factor or isolation is to add a small resistor (RSequal to 50 Ω,
noise gain of the circuit. The closed-loop gain is for example) in series with the output.
unchanged, but the feedback available for error This small series resistor also prevents excess power
correction is reduced by the distortion gain factor, dissipation if the output of the device becomes
thus extending the resolution by the same amount. shorted. Figure 25 illustrates a graph of Small-Signal
Note that the input signal and load applied to the op Overshoot vs Capacitive Load for several values of
amp are the same as with conventional feedback RS. Also, refer to Applications Bulletin AB-028
without R3. The value of R3should be kept small to (literature number SBOA015, available for download
minimize its effect on the distortion measurements. from the TI web site) for details of analysis
techniques and application circuits.
(1) For measurement bandwidth, see Figure 7 through Figure 12.
Figure 47. Distortion Test Circuit
16 Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
POWER DISSIPATION When the operational amplifier connects into a circuit
such as that illustrated in Figure 48, the ESD
The OPA1662 and OPA1664 series op amps are protection components are intended to remain
capable of driving 2-kloads with a power-supply inactive and not become involved in the application
voltage up to ±18 V and full operating temperature circuit operation. However, circumstances may arise
range. Internal power dissipation increases when where an applied voltage exceeds the operating
operating at high supply voltages. Copper leadframe voltage range of a given pin. Should this condition
construction used in the OPA166x series op amps occur, there is a risk that some of the internal ESD
improves heat dissipation compared to conventional protection circuits may be biased on, and conduct
materials. Circuit board layout can also help minimize current. Any such current flow occurs through
junction temperature rise. Wide copper traces help steering diode paths and rarely involves the
dissipate the heat by acting as an additional heat absorption device.
sink. Temperature rise can be further minimized by
soldering the devices to the circuit board rather than Figure 48 depicts a specific example where the input
using a socket. voltage, VIN, exceeds the positive supply voltage
(+VS) by 500 mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
ELECTRICAL OVERSTRESS +VScan sink the current, one of the upper input
Designers often ask questions about the capability of steering diodes conducts and directs current to +VS.
an operational amplifier to withstand electrical Excessively high current levels can flow with
overstress. These questions tend to focus on the increasingly higher VIN. As a result, the datasheet
device inputs, but may involve the supply voltage pins specifications recommend that applications limit the
or even the output pin. Each of these different pin input current to 10 mA.
functions have electrical stress limits determined by If the supply is not capable of sinking the current, VIN
the voltage breakdown characteristics of the may begin sourcing current to the operational
particular semiconductor fabrication process and amplifier, and then take over as the source of positive
specific circuits connected to the pin. Additionally, supply voltage. The danger in this case is that the
internal electrostatic discharge (ESD) protection is voltage can rise to levels that exceed the operational
built into these circuits to protect them from amplifier absolute maximum ratings. In extreme but
accidental ESD events both before and during rare cases, the absorption device triggers on while
product assembly. +VSand VSare applied. If this event happens, a
It is helpful to have a good understanding of this direct current path is established between the +VS
basic ESD circuitry and its relevance to an electrical and VSsupplies. The power dissipation of the
overstress event. Figure 48 illustrates the ESD absorption device is quickly exceeded, and the
circuits contained in the OPA166x (indicated by the extreme internal heating destroys the operational
dashed line area). The ESD protection circuitry amplifier.
involves several current-steering diodes connected Another common question involves what happens to
from the input and output pins and routed back to the the amplifier if an input signal is applied to the input
internal power-supply lines, where they meet at an while the power supplies +VSand/or VSare at 0 V.
absorption device internal to the operational amplifier. Again, it depends on the supply characteristic while at
This protection circuitry is intended to remain inactive 0 V, or at a level below the input signal amplitude. If
during normal circuit operation. the supplies appear as high impedance, then the
An ESD event produces a short duration, operational amplifier supply current may be supplied
high-voltage pulse that is transformed into a short by the input source via the current steering diodes.
duration, high-current pulse as it discharges through This state is not a normal bias condition; the amplifier
a semiconductor device. The ESD protection circuits most likely will not operate normally. If the supplies
are designed to provide a current path around the are low impedance, then the current through the
operational amplifier core to prevent it from being steering diodes can become quite high. The current
damaged. The energy absorbed by the protection level depends on the ability of the input source to
circuitry is then dissipated as heat. deliver current, and any resistance in the input path.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device internal to the
OPA166x triggers when a fast ESD voltage pulse is
impressed across the supply pins. Once triggered, it
quickly activates, clamping the ESD pulse to a safe
voltage level.
Copyright ©2011, Texas Instruments Incorporated 17
Product Folder Link(s): OPA1662 OPA1664
RF
Op-Amp
Core
RI
RL
V(1)
IN
ID
-In
Out
+In
ESD Current-
Steering Diodes
Edge-Triggered ESD
Absorption Circuit
+VS
+V
-V
-VS
OPA166x
RS
TVS
TVS
OPA1662
OPA1664
SBOS489 DECEMBER 2011
www.ti.com
If there is an uncertainty about the ability of the The zener voltage must be selected such that the
supply to absorb this current, external zener diodes diode does not turn on during normal operation.
may be added to the supply pins as shown in However, its zener voltage should be low enough so
Figure 48. that the zener diode conducts if the supply pin begins
to rise above the safe operating supply voltage level.
(1) VIN = +VS+ 500mV.
Figure 48. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application (Single
Channel Shown)
18 Copyright ©2011, Texas Instruments Incorporated
Product Folder Link(s): OPA1662 OPA1664
I L+
OUT
Audio DAC
with Differential
Current
Outputs OPA166x
8200 pF
100 W
I L-
OUT
OPA166x
0.1 Fm
2200 pF
820 W
0.1 Fm
2700 pF
-VA
( 15 V)-
+VA
(+15 V)
680 W620 W
330 W
-VA
( 15 V)-
+VA
(+15 V)
0.1 Fm
0.1 Fm
330 W2700 pF
OPA166x
0.1 Fm
2200 pF
820 W
0.1 Fm
-VA
( 15 V)-
+VA
(+15 V) 680 W620 W
L Ch
Output
OPA1662
OPA1664
www.ti.com
SBOS489 DECEMBER 2011
APPLICATION CIRCUIT
An additional application idea is shown in Figure 49.
Figure 49. Audio DAC I/V Converter and Output Filter
Copyright ©2011, Texas Instruments Incorporated 19
Product Folder Link(s): OPA1662 OPA1664
PACKAGE OPTION ADDENDUM
www.ti.com 11-Apr-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
OPA1662AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OP1662
OPA1662AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 OUQI
OPA1662AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 OUQI
OPA1662AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OP1662
OPA1664AID ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA1664
OPA1664AIDR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA1664
OPA1664AIPW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA1664
OPA1664AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA1664
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Apr-2013
Addendum-Page 2
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA1662 :
Automotive: OPA1662-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA1662AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA1662AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA1664AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
OPA1664AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Oct-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA1662AIDGKR VSSOP DGK 8 2500 364.0 364.0 27.0
OPA1662AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA1664AIDR SOIC D 14 2500 367.0 367.0 38.0
OPA1664AIPWR TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Oct-2012
Pack Materials-Page 2
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