S6BP201A ASSP, 42V, 1A, Synchronous Buck-boost DC/DC Converter IC S6BP201A is a 1ch Buck-boost DC/DC converter IC with four built-in switching FETs. This IC is able to supply up to 1.0A of load current within the very wide range from 2.5V to 42V in the input voltage. This IC has an operation mode that is automatically changed to PFM operation during low load, which can achieve super-high efficiency with a very low quiescent current 20 A. It is possible to provide stable output voltage from an automotive cold cranking and load dump, up to 42V, conditions within 1 ms transition time. As a result, this IC is suitable for power supply solutions of automotive and Industrial applications. This IC has the SYNC function, which is capable of selecting the SYNC_IN that is able to inputs an external clock signal. When an external clock signal in the range from 200 kHz to 400 kHz is inputted, the FETs perform the switching operation with synchronizing signal from an external clock. When an external clock signal is not inputted, the FETs perform the switching operation from an internal clock. The internal clock signal in the range from 200 kHz to 2.1 MHz can be set by an external resistor. Since external voltage setting resistors and phase compensation capacitors are not required with this IC, it can reduce the number of parts and a part mounting area. This IC has five protection functions, input under voltage lockout (input UVLO), output under voltage protection (output UVP), output over voltage protection (output OVP), output over current protection (output OCP), and thermal shutdown (TSD). Moreover, this IC has the power good (PG) function that indicates the state of the output voltage (VOUT pin). When the output voltage reaches the PG voltage, the PG signal is outputted. The VOUT output voltage of this product is selectable from the product lineup (refer to the "1. Product Lineup"). Features Applications Wide input voltage range: 2.5V to 42V Body Control Module (BCM) Selectable output voltage (factory settable): 5.000V/5.050V/5.075V/5.100V/5.125V/5.150V/5.200V Gateway module Wide operating frequency range: 200 kHz to 2.1 MHz Automotive applications External synchronized clock range: 200 kHz to 400 kHz Industrial applications SYNC function SYNC_IN: External clock input (Unless inputting clock, this IC operates by internal clock) Block Diagram Super-high efficiency by PFM operation (When setting MODE pin to a low level) Battery 2.5-42V S6BP201A Automatic PWM/PFM switching operation and fixed PWM operation are selectable by MODE pin Built-in switching FET Enable 5V Synchronous current mode architecture Shutdown current: Lower than 1 A PWM/PFM Switch Quiescent current: 20 A Power Good Monitor Output 5V LDO, Enable voltage monitoring by window comparator reset time: 14 ms Power-on Soft start time without load dependence : 0.9 ms External Clock for Synchronization OSC, External SYNC BuckBoost DC/DC Converter 2.1 MHz 5V / 1A Frequency Setting (When switching frequency = 2.1 MHz) Enhanced protection functions Protection Input under voltage lockout under voltage protection: 95.5% Output over voltage protection: 104.5% Output over current protection Thermal shutdown Power Good Power Good GND Output Small TSSOP16 package (exposed PAD): 5 mm x 6.4 mm AEC-Q100 compliant (Grade-1) Cypress Semiconductor Corporation Document Number: 002-08537 Rev. *B * 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised March 8, 2016 S6BP201A Contents Features ........................................................................................................................................................................... 1 Applications ........................................................................................................................................................................... 1 Block Diagram......................................................................................................................................................................... 1 1. Product Lineup ............................................................................................................................................................... 3 2. Pin Assignment .............................................................................................................................................................. 4 3. Pin Descriptions ............................................................................................................................................................. 4 4. Architecture Block Diagram .......................................................................................................................................... 6 5. Absolute Maximum Ratings .......................................................................................................................................... 7 6. Recommended Operating Conditions .......................................................................................................................... 7 7. Electrical Characteristics .............................................................................................................................................. 8 8. Functional Description .................................................................................................................................................. 9 8.1 Protection Function........................................................................................................................................................ 9 8.2 Protection Function Table............................................................................................................................................ 10 9. Application Circuit Example and Parts list ................................................................................................................ 11 10. Application Note ........................................................................................................................................................... 12 10.1 Setting the Operation Conditions ................................................................................................................................. 12 11. Development Support .................................................................................................................................................. 13 12. Reference Data ............................................................................................................................................................. 14 13. Usage Precaution ......................................................................................................................................................... 16 14. RoHS Compliance Information ................................................................................................................................... 16 15. Ordering Information ................................................................................................................................................... 16 16. Package Dimensions ................................................................................................................................................... 17 17. Major Changes ............................................................................................................................................................. 18 Document History ................................................................................................................................................................. 18 Sales, Solutions, and Legal Information ............................................................................................................................. 19 Document Number: 002-08537 Rev. *B Page 2 of 19 S6BP201A 1. Product Lineup The VOUT output voltage of this product is set at the factory shipment. To order a product, select an item from the product lineup blow. Part Number (MPN) Order VOUT Output Code Voltage [V] S6BP201A1AST2B000 1A S6BP201A2AST2B000 2A S6BP201A3AST2B000 3A S6BP201A4AST2B000 4A S6BP201A5AST2B000 5A S6BP201A6AST2B000 6A S6BP201A7AST2B000 7A MPN: Marketing Part Number Document Number: 002-08537 Rev. *B 5.000 5.050 5.075 5.100 5.125 5.150 5.200 SYNC Function SYNC_IN VOUT UVP Threshold [%] VOUT OVP Threshold [%] Power-on Reset Falling (Typ) Rising (Typ) Rising (Typ) Falling (Typ) Time[s] 95.5 96.5 104.5 103.5 14.0m Page 3 of 19 S6BP201A 2. Pin Assignment Figure 2-1 Pin Assignment (Top view) PGND1 1 16 PGND2 LX1 2 15 LX2 PVIN 3 14 VOUT BST 4 13 FB EP: GND VIN 5 12 RT ENA 6 11 SYNC MODE 7 10 PG VCC 8 9 GND (SEC016) 3. Pin Descriptions Table 3-1 Pin Descriptions Pin No. Pin Name I/O 1 PGND1 - 2 LX1 O 3 PVIN I 4 BST I 5 VIN I 6 ENA I 7 MODE I 8 VCC O 9 GND - 10 PG O 11 SYNC I 12 RT O 13 14 15 16 EP FB VOUT LX2 PGND2 GND I O O - - Document Number: 002-08537 Rev. *B Description GND pin for built-in switching FET Inductor connection pin Power supply pin for PWM controller and switching FETs BST(Boost) capacitor connection pin Power supply pin DC/DC converter enable pin PWM/PFM operation control pin For the MODE pin setting, refer to "10.1 Setting the Operation Conditions" LDO output pin of Internal reference voltage VCC capacitor connection pin GND pin Open drain output pin for power good. When being used, connect PG pin to VCC pin or VOUT pin. When not being used, leave PG pin open. External clock input pin. For the SYNC pin setting, refer to "10.1 Setting the Operation Conditions" Timing resistor connection pin for internal clock (switching frequency) For the resistance, refer to "10.1 Setting the Operation Conditions" Output voltage feedback pin DC/DC converter output pin Inductor connection output pin. GND pin for built-in switching FET GND pin Page 4 of 19 S6BP201A Figure 3-1 I/O Pin Equivalent Circuit Diagram <VIN pin, PVIN pin> <LX1 pin, BST pin> VIN 5 PVIN 3 PVIN 3 VCC 8 <VOUT pin, LX2 pin> 14 VOUT 4 BST GND 9 15 LX2 2 LX1 PGND1 1 PGND2 16 PGND1 1 PGND2 16 <VCC pin> <FB pin> VIN 5 <PG pin> FB 13 10 PG 13 FB 8 VCC GND 9 GND 9 GND 9 <ENA pin> <MODE pin> <SYNC pin> VIN 5 VCC 8 VCC 8 ENA 6 MODE 7 SYNC 11 GND 9 GND 9 GND 9 <RT pin> VCC 8 12 RT GND 9 Document Number: 002-08537 Rev. *B Page 5 of 19 S6BP201A 4. Architecture Block Diagram Figure 4-1 Architecture Block Diagram VIN 5 VIN VCC 6 5V LDO ENA VIN UVLO BGR RT SYNC TSD 9 OSC VCC UVLO GND SYNC 8 12 11 SYNC 7 MODE MODE ck Bypass SW VCC Buck-Boost DC/DC Converter PG PG FB Slope ck LX1 LS Low Side FET1 1 PGND1 Document Number: 002-08537 Rev. *B FB VOUT LS PFMCMP High Side FET1 2 VIN PVIN ErrAMP 3 BST ICMP 4 PWM Logic Boost Mode Pulse 10 13 14 VOUT High Side FET2 LX2 15 Low Side FET2 PGND2 16 Page 6 of 19 S6BP201A 5. Absolute Maximum Ratings Parameter Symbol VVIN VPVIN VVCC VBST VLX1 VLX2 VFB Terminal voltage (*1) VRT VMODE VSYNC VENA VPG VBST-LX Difference voltage (*1) VGND PG output current IPG Power dissipation (*1) PD Storage temperature TSTG *1: When PGND1 = PGND2 = GND = 0V Power supply voltage (*1) Condition VIN pin PVIN pin VCC pin BST pin LX1 pin LX2 pin FB pin RT pin MODE pin SYNC pin ENA pin PG pin Between BST-LX1 pins Between GND-PGND1 pins, Between GND-PGND2 pins PG pin Ta 25C - Rating Min -0.3 -0.3 -0.3 -0.3 -2.0 -2.0 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -3 0 -55 Max +48.0 +48.0 +6.9 +48.0 +48.0 +6.9 VVCC VVCC VVCC VVCC +48.0 +6.9 +6.9 +0.3 0 3324 (*2) +150 Unit V V V V V V V V V V V V V V mA mW C *2: When the product is mounted on 76.2 mm x 114.3 mm, four-layer FR-4 board Warning: 1. Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings. 6. Recommended Operating Conditions Parameter Symbol Power supply voltage (*1) VVIN Terminal voltage (*1) Difference voltage (*1) VBST VLX1 VLX2 VFB VMODE VSYNC VENA VPG VBST-LX1 VGND PG output current IPG BST capacitance CBST VCC capacitance CVCC Timing resistance RRT Operating ambient Ta Temperature *1: When PGND1 = PGND2 = GND = 0V Condition VIN pin At start-up After start-up BST pin LX1 pin LX2 pin FB pin MODE pin SYNC pin ENA pin PG pin Between BST-LX1 pins Between GND-PGND1 pins, Between GND-PGND2 pins PG pin (sink current) Between BST-LX1 pins Between VCC-GND pins Between RT-GND pins. When using internal clock - Min 5.0 2.5 0.0 -1.0 -1.0 0.0 0.0 0.0 0.0 0.0 0.0 Value Typ 12.0 12.0 - +12.0 - - - - 12.0 - - Max 42.0 42.0 47.5 +42.0 +5.5 5.5 5.5 5.5 42.0 5.5 5.5 -0.05 0.00 +0.05 V 0 0.068 2.2 22 - 0.100 4.7 - 1 0.470 10.0 270 mA F F k -40 +25 +125 C Unit V V V V V V V V V V V Warning: 1. The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated under these conditions. 2. Any use of semiconductor devices will be under their recommended operating condition. 3. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device failure. 4. No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you are considering application under any conditions other than listed herein, please contact sales representatives beforehand. Document Number: 002-08537 Rev. *B Page 7 of 19 S6BP201A 7. Electrical Characteristics VIN=PVIN=12V, ENA=5V (Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.) Parameter VOUT output voltage Buck-boost DC/DC converter Block FB input resistance Switching FET on-resistance Switching FET leakage current Soft-start time 5V LDO block VIN UVLO block VCC UVLO block ENA pin OSC block PG block (UVP, OVP) RFB RHSIDEFET1 RLSIDEFET1 RHSIDEFET2 RLSIDEFET2 IVOUT = 0A, When VVOUT = 5.000 (*1) IVOUT = 0A, When VVOUT = 5.050 (*1) IVOUT = 0A, When VVOUT = 5.075 (*1) IVOUT = 0A, When VVOUT = 5.100 (*1) IVOUT = 0A, When VVOUT = 5.125 (*1) IVOUT = 0A, When VVOUT = 5.150 (*1) IVOUT = 0A, When VVOUT = 5.200 (*1) EN = 0V, Ta = +25C LX1 = -30 mA (Between PVIN-LX1) LX1 = 30 mA (Between LX1-PGND1) LX2 = -30 mA (Between VOUT-LX2) LX2 = 30 mA (Between LX2-PGND2) - ILEAK Min 4.925 4.975 4.999 5.024 5.048 5.073 5.122 3.84 - - - - Value Typ 5.000 5.050 5.075 5.100 5.125 5.150 5.200 4.80 150 150 150 150 Max 5.075 5.125 5.151 5.176 5.201 5.227 5.278 5.76 - - - - - - 5 A 0.855 1.0 (*2) 1.0 (*2) 1.0 (*2) 0.9 - - - 0.945 - - - ms A A A Unit V V V V V V V M m m m m Maximum output current IVOUT Current limit ILIMT VCC output voltage VVCC VIN = 12V 4.9 5.0 5.1 V 2.30 4.55 2.30 4.55 1.10 0.0 - 2.40 4.75 2.40 4.75 - - 1 2.50 4.95 2.50 4.95 VVIN 0.2 3 V V V V V V A 0.0 - 0.4 V 2.0 - 2.0 180 0.0 2.0 200 +20 - - 5 2.1 200 - - - +50 5 VVOUT V 10 A 2.2 MHz 220 kHz 0.4 V VVOUT V 400 kHz +80 % 10 A 94.0 95.5 97.0 % 95.0 96.5 98.0 % 103.0 104.5 106.0 % 102.0 103.5 105.0 % ILKPG VOLPG VIN input voltage when falling VIN input voltage when rising VCC input voltage when falling VCC input voltage when rising Enable voltage range Disable voltage range VENA = 12V Automatic PWM/PFM switching operation Fixed PWM operation MODE = 5.0V RRT = 22 k RRT = 270 k - - - - VSYNC = 5.0V Falling threshold for VOUT output voltage setting (*1) Rising threshold for VOUT output voltage setting (*1) Rising threshold for VOUT output voltage setting (*1) Falling threshold for VOUT output voltage setting (*1) VPWRGD = 5.0V, VENA = 0V IPGSINK = 1 mA 0 0.025 - 0.05 1 0.15 A V TPPG At power shutdown - 7 (*2) 12 (*2) s TRPG At power good 9.1 14.0 18.9 ms VIN UVLO falling threshold VIN UVLO rising threshold VCC UVLO falling threshold VCC UVLO rising threshold Enable condition MODE input voltage TSS VUVLOVINHL VUVLOVINLH VUVLOVCCHL VUVLOVCCLH VENA VDSB IENA VMODE_L MODE Input current VMODE_H IMODE Switching frequency FOSC SYNC input frequency SYNC input duty ratio SYNC leakage current VSYNC_L VSYNC_H VSYNC_L VSYNC_H ILKSYNC VOUT UVP falling threshold PGUVPHL VOUT UVP rising threshold PGUVPLH VOUT OVP rising threshold PGOVPLH VOUT OVP falling threshold PGOVPHL SYNC input threshold SYNC block (SYNC_IN) VVOUT Condition RRT = 22 k PVIN 7.5V, Ta = 25C PVIN = 4.5V, Ta = 25C PVIN = 12V, L = 2.2H ENA input current MODE pin Symbol Leak current Low level output voltage Delay time at abnormal detection Power-on reset time (*1) Document Number: 002-08537 Rev. *B Page 8 of 19 S6BP201A Parameter Thermal shutdown block (TSD) Supply current Symbol Condition TTSDH - Shutdown temperature Min - Value Typ 165 (*2) Max - Unit C TTSDL Hysteresis - 10 (*2) - C Shutdown current IVINSDN - 1 5 A Quiescent current IVINQ VIN input current, VENA = 0V VIN input current, VENA = 12V, IVOUT = 0A, MODE/SYNC/PG Pins = OPEN - 20 40 A *1: Refer to "1. Product Lineup" *2: The electrical characteristic is ensured by statistical characterization and indirect tests. 8. Functional Description 8.1 Protection Function Input Under Voltage Lockout (Input UVLO) The input UVLO is the function that prevents a malfunction of this IC from the following status, and protects poststage devices. Transitional state at start-up drop of power supply voltage To prevent such a malfunction, this protection monitors the VIN input voltage and VCC voltage. When either VIN or VCC voltage falls to the UVLO falling threshold, 2.4V (Typ), or lower, the IC stops the VOUT voltage output and becomes UVLO status. When both VIN and VCC voltages reach the UVLO rising threshold, 4.75V (Typ), or higher, the IC is released from the UVLO state and returns to the normal operation. Momentary Output Under Voltage Protection (Output UVP) The output UVP is the function that monitors the voltage drop of the VOUT pin and notifies by the PG pin. When the output voltage falls to the UVP falling threshold (PGUVPHL) for the output voltage setting or lower, the PG voltage is fixed to the low level. The IC becomes the UVP status, but the switching operation is maintained under the UVP status. When the output voltage once again reaches the UVP rising threshold (PGUVPLH) for the output voltage setting or higher, the IC is released from the UVP state and the PG voltage is fixed to the high level. Output Over Voltage Protection (Output OVP) The output OVP is the function that monitors the voltage rise of the VOUT pin and stops the switching operations, which protects poststate devices from overvoltage. Also, the VOUT state is notified by the PG pin. When the output voltage rises to the OVP falling threshold (PGOVPLH) for the output voltage setting or higher, the PG voltage is fixed to the low level. The IC becomes the OVP status, and the switching operations of the high-side FETs are stopped. When the output voltage once again falls to the OVP falling threshold (PGOVPHL) for the output voltage setting or lower, the IC is released from the OVP state and resumes the switching operations. The PG voltage is fixed to the high level again. Output Over Current Protection (Output OCP) The output OCP is the function that limits the excessive current load and protects poststage devices. Thermal Shutdown (TSD) The TSD is the function that protects the IC from heat-destruction. When the junction temperature reaches +165C (Typ), the high-side and low-side switching FET are turned off and the IC becomes the TSD status. When the junction temperature once again falls to +155C (Typ) or lower, the IC is released from the TSD state and restarts the power supply. Document Number: 002-08537 Rev. *B Page 9 of 19 S6BP201A 8.2 Protection Function Table The following table shows the state of each pin when each protection function operates. Table 8-1 Protection Function Table Function ENA Pin Setting PG Pin Output DC/DC Converter Operation Remarks It is recommended to connect PG pin to VCC pin or VOUT pin via a pull-up resistor. When setting ENA pin to a low level, both VCC pin and VOUT pin voltage drop to 0V. Therefore, PG pin outputs 0V. Shutdown operation L Hi-Z (*1) Shutdown Nominal operation H Hi-Z (*1) Switching Input under voltage protection (Input UVLO) Output under voltage protection (Output UVP) Output over voltage protection (Output OVP) Output over current protection (Output OCP) - After releasing UVLO state, this IC is automatically reset with soft start. H L Shutdown H L Switching - H L Shutdown - H L Switching OCP operates to drop the output voltage. After releasing TSD state, this IC is automatically reset with soft start. *1: PG pin is formed as an open drain structure. The internal MOSFET is in the OFF state. Thermal shutdown (TSD) Document Number: 002-08537 Rev. *B H L Shutdown Page 10 of 19 S6BP201A 9. Application Circuit Example and Parts list Figure 9-1 Application Circuit Example VIN CVIN 0.1 F VIN 5 VCC CVCC VCC 8 VOUT 4.7 F MODE S6BP201A FB 13 CPVIN 10 F 4 BST CBST 0.1 F 2 LX1 LLX 2.2 H MODE 7 15 LX2 SYNC SYNC 11 14 VOUT ENA ENA 6 RT 12 RRT 22 k VIN 3 PVIN VOUT VOUT CVOUT_1 22 F CVOUT_2 22 F 1 PGND1 GND 9 16 PGND2 GND EP 10 PG RPG 1 M VCC or VOUT PG FOSC = 2.1 MHz When selecting "VOUT output voltage = 5.0V" Table 9-1 Parts List Symbol Item CVIN, Ceramic capacitor CBST CPVIN Ceramic capacitor CVCC Ceramic capacitor CVOUT_1, Ceramic capacitor CVOUT_2 LLX Inductor RRT Resistor RPG Resistor TDK: TDK Corporation KOA: KOA Corporation Value Part Number Vendor Package Size (WxLxH[mm]) 0.1 F CGA2B3X7R1H104K050BB TDK 1.0x0.5x0.5 X7R, Rated Voltage: 50 Vdc 10 F 4.7 F CGA9N3X7R1H106K230KB CGA4J3X7R1C475K125AB TDK TDK 5.7x5.0x2.3 2.0x1.25x1.25 X7R, Rated Voltage: 50 Vdc X7R, Rated Voltage: 16 Vdc 22 F CGA6P1X7R1C226M250AC TDK 3.2x2.5x2.5 X7R, Rated Voltage: 16 Vdc 2.2 H 22 k 1 M CLF7045T-2R2N-D RK73H1JTTD2202F RK73H1JTTD1004F TDK KOA KOA 7.2x6.9x4.5 0.8x1.6x0.45 0.8x1.6x0.45 DCR: 14.6 m, IDC_MAX: 5.5A - - Document Number: 002-08537 Rev. *B Remarks Page 11 of 19 S6BP201A 10. Application Note 10.1 Setting the Operation Conditions Operation State of DC/DC Convertor The operation stage of DC/CD converter is set by both MODE pin and SYNC pin. Table 10-1 Operation State of DC/DC Convertor MODE Pin SYNC Pin (Signal Input) Operation State of DC/DC Convertor Automatic PWM/PFM switching operation from an internal clock L (*3) Fixed PWM operation with synchronizing signal from an external clock (*2) L (*3) External clock input (*5) Prohibition of use (*1) H (*4) Fixed PWM operation from an internal clock L (*3) Fixed PWM operation with synchronizing signal from an external clock (*2) H (*4) External clock input (*5) Prohibition of use (*1) H (*4) *1: When setting SYNC pin to a high level, the quiescent current (IVINQ) is increased. *2: Set the timing resistance (RRT) to 330 k. *3: Apply the GND1 or GND2 voltage. *4: Apply the VOUT voltage. *5: Apply the VOUT voltage at a high level. Apply the GND1 or GND2 voltage at a low level Setting of Switching Frequency (Internal Clock) The switching frequency (internal clock) can be set by RT resistor, which value is the timing resistance (RRT), connected to RT pin. Set the timing resistance in a range within the following graph. Figure 10-1 FOSC vs RRT Measured Characteristic FOSC vs RRT Measured Characteristic 2.5 FOSC [MHz] 2.0 1.5 1.0 0.5 0.0 0 100 200 RRT [k] 300 400 S6BP201AGraph001 The reference value can be calculated by the following formula. FOSC [Hz] 1 R RT x 21.7 x 10-12 FOSC : Switching frequency [Hz] RRT : Timing resistance [] Document Number: 002-08537 Rev. *B Page 12 of 19 S6BP201A Setting of Soft-start Time The Soft-start time is determined by the timing resistance (RRT), the value of the resistor connected to RT pin. TSS [s] = 1 x 2 x 1024 FOSC TSS : Soft-start time [s] FOSC : Switching frequency [Hz] Consideration of VOUT Maximum Output Current Make sure the VOUT maximum output current in a range within the following graph. Figure 10-2 IVOUT vs VVIN IVOUT vs VVIN 1.2 Ta=+25oC, FOSC=2.1MHz Ta=+125oC, FOSC=2.1MHz 1.0 IVOUT [A] 0.8 0.6 0.4 0.2 0.0 0 1 2 3 4 5 6 7 VVIN [V] 8 9 10 11 12 S6BP201AGraph002 11. Development Support The IC has a set of documentation, such as application notes, development tools, and online resources to assist you during your development process. Visit www.cypress.com/automotive-pmic to find out more. Document Number: 002-08537 Rev. *B Page 13 of 19 S6BP201A 12. Reference Data The followings are the reference data measured under the conditions shown in "9. Application Circuit Example and Parts list". Efficiency (Fixed PWM) 100 100 VVIN = 12 V VVIN = 2.5 V VVIN = 4.5 V 90 80 70 70 60 50 40 30 50 40 30 VVIN = 42 V 20 10 10 0.01 0.1 Load Current [A] VVIN = 2.5 V VVIN = 4.5 V VVIN = 12 V VVIN = 42 V 60 20 0 0.001 VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F 90 80 Efficiency [%] Efficiency [%] Efficiency (Automatic PWM/PFM) VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F 0 0.001 1 0.01 0.1 Load Current [A] S6BP201AGraph004-1 Load Regulation (Fixed PWM) Line Regulation (Fixed PWM) VVIN = 12V, VVOUT = 5 V, FOSC = 2.1 MHz set, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F VVOUT = 5 V, FOSC = 2.1 MHz set, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F 5.08 5.06 5.06 5.04 5.04 5.02 TA = +125 C TA = +25 oC 5.00 4.98 IVINQ vs VVIN (Automatic PWM/PFM) 140 VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F 120 100 TA = +125 oC, Load Current = 1 A 5.02 o VVOUT [V] VVOUT [V] S6BP201AGraph004-2 TA = +25 oC, Load Current = 1 A 5.00 IVINQ [A] 5.08 1 80 60 4.98 4.96 TA = 40 oC, Load Current = 1 A 4.96 TA = 40 oC 4.94 4.94 4.92 0 4.92 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Load Current [A] TA = +125oC TA = +25oC 40 20 TA = 40oC 5 10 15 20 25 VVIN [V] 30 S6BP201AGraph005 35 40 45 0 0 5 10 15 20 25 VVIN [V] 30 Turn On Response Turn Off Response VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F Automatic PWM/PFM Automatic PWM/PFM ENA 5 V/div ENA 5 V/div VOUT 5 V/div VOUT 5 V/div LX1 2 A/div LX1 2 A/div PG 5 V/div PG 5 V/div VCC 5 V/div VCC 5 V/div 2 ms/div S6BP201AGraph009-1 Document Number: 002-08537 Rev. *B 40 45 S6BP201AGraph008-1 S6BP201AGraph006 2 ms/div 35 S6BP201AGraph009-2 Page 14 of 19 S6BP201A Load Transient Response Load Transient Response VVIN = 12 V, VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F VVIN = 12 V, VVOUT = 5 V, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F Automatic PWM/PFM Automatic PWM/PFM VOUT 200 mV/div VOUT 200 mV/div AC-Coupled AC-Coupled Load Current 500 mA/div Load Current 500 mA/div 0A 1A / 10 s PG 5 V/div 1A 0A / 10 s PG 5 V/div 200 s/div 200 s/div S6BP201AGraph010-1 S6BP201AGraph010-2 Cold Crank Line Transient Response Load Dump Line Transient Response VVOUT = 5 V, Load Current = 0.2 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F VVOUT = 5 V, Load Current = 1 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F Automatic PWM/PFM Automatic PWM/PFM 40 V 11 V / 1 ms VIN 2 V/div 11 V / 1 ms VIN 10 V/div 2.5 V 2.5 V / 1 ms 11 V 40 V / 1 ms 6V VOUT 200 mV/div VOUT 200 mV/div AC-Coupled AC-Coupled PG 5 V/div PG 5 V/div 4 ms/div 1 ms/div S6BP201AGraph011-1 S6BP201AGraph011-2 Switching Waveform Ripple Waveform VVIN = 12 V, VVOUT = 5 V, Load Current = 1 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F VVIN = 12 V, VVOUT = 5 V, Load Current = 0 A, FOSC = 2.1 MHz set, TA = +25oC, LLX = 2.2 H, CVOUT_1 = CVOUT_2 = 22 F Automatic PWM/PFM LX1 2 V/div Automatic PWM/PFM VOUT 50 mV/div AC-Coupled 1 s/div 10 ms/div S6BP201AGraph012-1 Document Number: 002-08537 Rev. *B S6BP201AGraph012-2 Page 15 of 19 S6BP201A 13. Usage Precaution Printed circuit board ground lines should be set up with consideration for common impedance. Take appropriate measures against static electricity. Containers for semiconductor materials should have anti-static protection or be made of conductive material. mounting, printed circuit boards should be stored and shipped in conductive bags or containers. Work platforms, tools, and instruments should be properly grounded. Working personnel should be grounded with resistance of 250 k to 1 M in serial body and ground. After Do not apply negative voltages. The use of negative voltages below -0.3V may make the parasitic transistor activated to the LSI, and can cause malfunctions. 14. RoHS Compliance Information This product has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB), and polybrominated diphenyl ethers (PBDE). 15. Ordering Information Table 15-1 Ordering Information Order Code Part Number (MPN) (*1) Package 1A S6BP201A1AST2B000 Plastic TSSOP16 (0.65 mm pitch), 16-pin 4A S6BP201A4AST2B000 (SEC016) 7A S6BP201A7AST2B000 MPN: Marketing Part Number *1: Please contact our sales division for the part numbers (refer to "1. Product Lineup") not mentioned in this table. Figure 15-1 Ordering Part Number Definitions S 6B P 2 0 1 A XX S T 2 B 0 0 0 Fixed on 000 Packing: B = 13 inch Tape and Reel Package: T2 = TSSOP, Pure Sn / Low-Halogen Reliability Grade: S = 10 ppm Preset Condition (Order Code): See "Product Lineup" Revision: A = 1st Revision Product ID: 01 Topology: 2 = Switch-Mode Power Supply (Integrated FET) Product Type: P = Power Management IC Product Class: 6B = Automotive Analog Company ID: S = Cypress Document Number: 002-08537 Rev. *B Page 16 of 19 S6BP201A 16. Package Dimensions Document Number: 002-08537 Rev. *B Page 17 of 19 S6BP201A 17. Major Changes Spansion Publication Number: S6BP201A_DS405-00032 Page Section Change Results Preliminary 0.1 Initial release - - Preliminary 0.2 10. Electrical "(TSD)" was added in the table of "10. Electrical Characteristics ". 12 Characteristics NOTE: Please see "Document History" about later revised information. Document History Document Title: S6BP201A, ASSP, 42V, 1A, Synchronous Buck-boost DC/DC Converter IC Document Number: 002-08537 Orig. of Submission Change Date Revision ECN ** - HIXT 09/04/2015 New Spec. *A 5056149 HIXT Added Block Diagram 12/18/2015 Added Figure 15-1 Updated 16. Package Dimensions HIXT Added "AEC-Q100 compliant (Grade-1)" in Features Added Figure 3-1 I/O Pin Equivalent Circuit Diagram The followings in 7. Electrical Characteristics were updated. The parameter name of IVOUT was changed from "VOUT output voltage" to "Maximum output current" 03/08/2016 The max values of IVOUT were moved to the min column. Added 11. Development Support Added 12. Reference Data Deleted the ES part number from Table 15-1 *B 5164343 Document Number: 002-08537 Rev. *B Description of Change Page 18 of 19 S6BP201A Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC(R) Solutions Products (R) (R) ARM Cortex Microcontrollers Automotive Clocks & Buffers Interface Lighting & Power Control Memory PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/arm cypress.com/automotive cypress.com/clocks cypress.com/interface cypress.com/powerpsoc cypress.com/memory cypress.com/psoc PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP Cypress Developer Community Community | Forums | Blogs | Video | Training Technical Support cypress.com/support cypress.com/psoc cypress.com/touch cypress.com/usb cypress.com/wireless ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries. (c) Cypress Semiconductor Corporation 2015-2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document, including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you under its copyright rights in the Software, a personal, non-exclusive, nontransferable license (without the right to sublicense) (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units. Cypress also grants you a personal, non-exclusive, nontransferable, license (without the right to sublicense) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited. CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as cri tical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and Company shall and hereby does release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. Company shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document Number: 002-08537 Rev. *B March 8, 2016 Page 19 of 19