        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DQualified for Automotive Applications
DESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
DOpen Drain Power-On Reset With 200-ms
Delay (TPS775xx)
DOpen Drain Power Good (TPS776xx)
D500-mA Low-Dropout Voltage Regulator
DAvailable in 1.5-V, 1.6-V (TPS77516 Only),
1.8-V, 2.5-V, 2.8-V (TPS77628 Only), 3.3-V
Fixed Output and Adjustable Versions
DDropout Voltage to 169 mV (Typ) at 500 mA
(TPS77x33)
DUltralow 85 µA Typical Quiescent Current
DFast Transient Response
D2% Tolerance Over Specified Conditions for
Fixed-Output Versions
D20-Pin TSSOP PowerPAD (PWP) Package
DThermal Shutdown Protection
description
The TPS775xx and TPS776xx devices are designed
to have a fast transient response and be stable with
a 10-µF low ESR capacitors. This combination
provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169 mV
at an output current of 500 mA for the TPS77x33) and is directly proportional to the output current. Additionally,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 85 µA over the full range of output current, 0 mA to 500 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems. This LDO family
also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the
quiescent current to 1 µA at TJ = 25°C.
The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset
or a low-battery indicator.
The TPS775xx and TPS776xx are offered in 1.5-V, 1.6-V (TPS77516 only), 1.8-V, 2.5-V, 2.8 V (TPS77628 only),
and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V
for TPS77501 option and 1.2 V to 5.5 V for TPS77601 option). Output voltage tolerance is specified as a
maximum of 2 % over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available
in 20 pin TSSOP package.
Copyright 2008, Texas Instruments Incorporated
  !"#$%&'!$" !( )*%%+"' &( $# ,*-.!)&'!$" /&'+0
%$/*)'( )$"#$% '$ (,+)!#!)&'!$"( ,+% '1+ '+%( $# +2&( "('%*+"'(
('&"/&%/ 3&%%&"'40 %$/*)'!$" ,%$)+((!"5 /$+( "$' "+)+((&%!.4 !").*/+
'+('!"5 $# &.. ,&%&+'+%(0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC − No internal connection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
NC
NC
RESET/PG
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
PWP PACKAGE
(TOP VIEW)
PowerPAD is a trademark of Texas Instruments.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
t − Time − µs
TPS77x33
LOAD TRANSIENT RESPONSE
I − Output Current − mA
OVO− Change in
Output Voltage − mV
500
0
0
50
−50
Co = 2x47 µF
ESR = 1/2x100 m
VO = 3.3 V
VI = 4.3 V
0604020 80 100 140120 160 180 200
TA − Free-Air Temperature − °C
−40 0 20 120
103
−60 40 60 80 100
− Dropout Voltage − mV
VDO
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
102
101
100
10−1
10−2 −20 140
IO = 10 mA
IO = 0 mA
Co = 10 µF
IO = 500 mA
AVAILABLE OPTIONS
TJ
OUTPUT VOLTAGE (V) PACKAGED DEVICES
T
JTYP TSSOP (PWP)
3.3 TPS77533PWPQ1 TPS77633PWPQ1
2.5 TPS77525PWPQ1 TPS77625PWPQ1
2.8 TPS77628PWPQ1
1.8 TPS77518PWPQ1 TPS77618PWPQ1
−40°C to 125°C
1.6 TPS77516PWPQ1§
−40
°
C to 125
°
C
1.5 TPS77515PWPQ1 TPS77615PWPQ1
Adjustable
1.2 V to 5.5 V TPS77601PWPQ1
Adjustable
1.5 V to 5.5 V TPS77501PWPQ1
The TPS775xx has an open-drain power-on reset with a 200-ms delay function. The TPS776xx
has an open-drain power good function.
The TPS77x01 is programmable using an external resistor divider (see application information).
The PWP package is available taped and reeled. Add an R suffix to the device type (e.g.,
TPS77501QPWPRQ1).
§TPS77516 is Product Preview.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
See application information section for capacitor selection details.
RESET/
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
VI
0.1 µF
RESET/PG
VO
10 µF
+Co
Figure 1. Typical Application Configuration for Fixed Output Options
functional block diagram—adjustable version
200 ms Delay
(for RESET Option)
_
+
Vref = 1.183 V
OUT
FB/NC
EN
GND
PG or RESET
_
+
IN
External to the device
R1
R2
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
functional block diagram—fixed-voltage version
_
+
Vref = 1.183 V
OUT
EN
GND
R1
R2
PG or RESET
_
+
IN
200 ms Delay
(for RESET Option)
Terminal Functions
TSSOP Package (TPS775xx)
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20 Ground/heatsink
IN 6, 7 IInput voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 ORegulated output voltage
RESET 16 O RESET output
TSSOP Package (TPS776xx)
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20 Ground/heatsink
IN 6, 7 IInput voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 ORegulated output voltage
PG 16 O PG output
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS775xx RESET timing diagram
Vres is the minimum input voltage for a valid RESET. The symbol V res is not currently listed within EIA or JEDEC standards for semiconductor
symbology.
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
V
I
Vres
t
t
t
VO
Threshold
Voltage
RESET
Output 200 ms Delay 200 ms Delay
Output
Undefined
Output
Undefined
VIT+
VITVIT
VIT+
Less than 5% of the
output voltage
V
IT
−Trip voltage is typically 5% lower than the output voltage (95%V
O
) V
IT−
to V
IT+
is the hysteresis voltage.
Vres
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Ĕ
Input voltage range, VI 0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN −0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum RESET voltage (TPS775xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum PG voltage (TPS776xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, TJ −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE − FREE-AIR TEMPERATURES
PACKAGE AIR FLOW
(CFM) TA < 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
PWP§
02.9 W 23.5 mW/°C1.9 W 1.5 W
PWP§
300 4.3 W 34.6 mW/°C 2.8 W 2.2 W
PWP
03 W 23.8 mW/°C1.9 W 1.5 W
PWP
300 7.2 W 57.9 mW/°C4.6 W 3.8 W
§This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in2).
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN MAX UNIT
Input voltage, VI#2.7 10 V
Output voltage range, VO
TPS77501 1.5 5.5
V
Output voltage range, VOTPS77601 1.2 5.5 V
Output current, IO (see Note 1) 0 500 mA
Operating virtual junction temperature, TJ (see Note 1) −40 125 °C
# To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load).
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS77501
1.5 V VO 5.5 V, TJ = 25°C VO
TPS77501 1.5 V VO 5.5 V, TJ = −40°C to 125°C0.98VO1.02VO
TPS77601
1.2 V VO 5.5 V, TJ = 25°C VO
V
TPS77601 1.2 V VO 5.5 V, TJ = −40°C to 125°C0.98VO1.02VOV
TPS77x15
TJ = 25°C, 2.7 V < VIN < 10 V 1.5
TPS77x15 TJ = −40°C to 125°C, 2.7 V < VIN < 10 V 1.470 1.530
TPS77516
TJ = 25°C, 2.7 V < VIN < 10 V 1.6
V
TPS77516 TJ = −40°C to 125°C, 2.7 V < VIN < 10 V 1.568 1.632 V
load) (see Note 2)
TPS77x18
TJ = 25°C, 2.8 V < VIN < 10 V 1.8
TPS77x18 TJ = −40°C to 125°C, 2.8 V < VIN < 10 V 1.764 1.836
TPS77x25
TJ = 25°C, 3.5 V < VIN < 10 V 2.5
TPS77x25 TJ = −40°C to 125°C, 3.5 V < VIN < 10 V 2.450 2.550
V
TPS77628
TJ = 25°C, 3.8 V < VIN < 10 V 2.8 V
TPS77628 TJ = −40°C to 125°C, 3.8 V < VIN < 10 V 2.744 2.856
TPS77x33
TJ = 25°C, 4.3 V < VIN < 10 V 3.3
TPS77x33 TJ = −40°C to 125°C, 4.3 V < VIN < 10 V 3.234 3.366
Quiescent current (GND current)
10 µA < IO < 500 mA, TJ = 25°C 85
A
Quiescent current (GND current)
EN = 0V, (see Note 2) IO = 500 mA, TJ = −40°C to 125°C 125 µA
Output voltage line regulation (VO/VO)
(see Notes 2 and 3) VO + 1 V < VI 10 V, TJ = 25°C 0.01 %/V
Load regulation 3 mV
Output noise voltage (TPS77x18) BW = 200 Hz to 100 kHz, IC = 500 mA
Co = 10 µF, TJ = 25°C53 µVrms
Output current limit VO = 0 V 1.7 2 A
Thermal shutdown junction temperature 150 °C
EN = VI,T
J = 25°C, 2.7 V < VI < 10 V 1µA
Standby current EN = VI,T
J = −40°C to 125°C
2.7 V < VI < 10 V 10 µA
FB input current TPS77x01 FB = 1.5 V 2 nA
High level enable input voltage 1.7 V
Low level enable input voltage 0.9 V
Power supply ripple rejection (see Note 2) f = 1 KHz, Co = 10 µF, TJ = 25°C 60 dB
NOTES: 2. Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10V.
3. If VO 1.8 V then VImin = 2.7 V, VImax = 10 V:
Line Reg. (mV) +ǒ%ńVǓ VOǒVImax *2.7 VǓ
100 1000
If VO 2.5 V then VImin = VO + 1 V, VImax = 10 V:
Line Reg. (mV) +ǒ%ńVǓ
VOǒVImax *ǒVO)1V
ǓǓ
100 1000
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Minimum input voltage for valid RESET IO(RESET) = 300 µA 1.1 V
Trip threshold voltage VO decreasing 92 98 %VO
Reset
(TPS775xx)
Hysteresis voltage Measured at VO0.5 %VO
Reset
(TPS775xx) Output low voltage VI = 2.7 V, IO(RESET) = 1mA 0.15 0.4 V
Leakage current V(RESET) = 5 V 1µA
RESET time-out delay 200 ms
Minimum input voltage for valid PG IO(PG) = 300 µA 1.1 V
PG
Trip threshold voltage VO decreasing 92 98 %VO
PG
(TPS776xx)
Hysteresis voltage Measured at VO0.5 %VO
(TPS776xx)
Output low voltage VI = 2.7 V, IO(PG) = 1 mA 0.15 0.4 V
Leakage current V(PG) = 5 V 1µA
Input current (EN)
EN = 0 V −1 0 1
A
Input current (EN)EN = VI−1 1 µA
TPS77628
IO = 500 mA, TJ = 25°C 285
TPS77628 IO = 500 mA, TJ = −40°C to 125°C 410
Dropout voltage (see Note 4)
TPS77533
IO = 500 mA, TJ = 25°C 169
mV
Dropout voltage (see Note 4)
TPS77533 IO = 500 mA, TJ = −40°C to 125°C 287
mV
TPS77633
IO = 500 mA, TJ = 25°C 169
TPS77633
IO = 500 mA, TJ = −40°C to 125°C 287
NOTE 4: IN voltage equals VO(typ) − 100 mV; TPS77x15, TPS77516, TPS77x18, and TPS77x25 dropout voltage limited by input voltage range
limitations (i.e., TPS77x33 input voltage needs to drop to 3.2 V for purpose of this test).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VO
Output voltage
vs Output current 2, 3, 4
VOOutput voltage vs Free-air temperature 5, 6, 7
Ground current vs Free-air temperature 8
Power supply ripple rejection vs Frequency 9
Output spectral noise density vs Frequency 10
ZoOutput impedance vs Frequency 11
VDO
Dropout voltage
vs Input voltage 12
VDO Dropout voltage vs Free-air temperature 13
Input voltage (min) vs Output voltage 14
Line transient response 15, 17
Load transient response 16, 18
VOOutput voltage vs Time 19
Equivalent series resistance (ESR) vs Output current 21 − 24
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
IO − Output Current − A
TPS77x33
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.2830
3.2815
3.2800 0.1 0.3
3.2825
3.2820
3.2810
0.2
3.2835
0
− Output Voltage − V
VO
3.2805
0.4 0.5
VI = 4.3 V
TA = 25°C
Figure 3
IO − Output Current − A
1.4975
1.4960
1.4950
1.4970
1.4965
1.4955
1.4985
− Output Voltage − V
VO
TPS77x15
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1.4980
0.1 0.30.20 0.4 0.5
VI = 2.7 V
TA = 25°C
Figure 4
IO − Output Current − A
TPS77x25
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
2.4955
2.4940
2.4920 0.1 0.3
2.4950
2.4945
2.4935
0.2 0.4
2.4960
0 0.5
− Output Voltage − V
VO
VI = 3.5 V
TA = 25°C
2.4930
2.4925
Figure 5
TA − Free-Air Temperature − °C
TPS77x33
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
− Output Voltage − V
VO
3.31
3.28
3.25 −40 0
3.30
3.29
3.27
−20 100 140
3.32
−60 120
3.26
20 40 60 80
VI = 4.3 V
IO = 500 mA IO = 1 mA
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
TA − Free-Air Temperature − °C
TPS77x15
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
− Output Voltage − V
VO
1.515
1.500
1.485 −40 0
1.510
1.505
1.495
−20 100−60 120
1.490
20 40 60 80
VI = 2.7 V
IO = 500 mA
IO = 1 mA
140
Figure 7
TA − Free-Air Temperature − °C
TPS77x25
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
− Output Voltage − V
VO
−40 0−20 100−60 12020 40 60 80
2.515
2.500
2.480
2.510
2.505
2.495
2.490
2.485
VI = 3.5 V
IO = 500 mA
IO = 1 mA
Figure 8
TA − Free-Air Temperature − °C
TPS77xxx
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
Ground Current − Aµ
−40 0−20 100−60 12020 40 60 80 140
VI = 2.7 V
100
95
90
85
80
75
IO = 1 mA
IO = 500 mA
Figure 9
PSRR − Power Supply Ripple Rejection − dB
f − Frequency − Hz
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
70
60
50
40
30
20
10
0
−10
TPS77x33
90
80
101
VI = 4.3 V
Co = 10 µF
TA = 25°C
102103104105106
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
TPS77x33
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
f − Frequency − Hz
102103104105
10−5
10−6
10−8
10−7
IO = 7 mA
IO = 500 mA
VI = 4.3 V
Co = 10 µF
TA = 25°C
V HzOutput Spectral Noise Density − µ
Figure 11
f − Frequency − kHz
− Output Impedance −Zo
101102105106
100
10−1
10−2 104
103
IO = 1 mA
IO = 500 mA
VI = 4.3 V
Co = 10 µF
TA = 25°C
TPS77x33
OUTPUT IMPEDANCE
vs
FREQUENCY
Figure 12
VI − Input Voltage − V
300
150
034
250
200
100
3.52.5
− Dropout Voltage − mV
50
4.5 5
VDO
350
TA = 125°C
TA = −40°C
TA = 25°C
IO = 500 mA
TPS77x01
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
Figure 13
TA − Free-Air Temperature − °C
−40 0 20 120
103
−60 40 60 80 100
− Dropout Voltage − mV
VDO
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
102
101
100
10−1
10−2 −20 140
IO = 500 mA
IO = 10 mA
IO = 0 mA
Co = 10 µF
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 14
3
2.7
21.5 1.75 2 2.25 2.5 2.75
− Input Voltage (Min) − V
INPUT VOLTAGE (MIN)
vs
OUTPUT VOLTAGE
4
3 3.25 3.5
VI
VO − Output Voltage − V
IO = 0.5 A
TA = −40°C
TA = 25°C
TA = 125°C
VO− Change in
10
0
3.7
2.7
TPS77x15
LINE TRANSIENT RESPONSE
VI
t − Time − µs
0604020 80 100 140120 160 180 200
− Input Voltage − V
Output Voltage − mV
Co = 10 µF
TA = 25°C
−10
Figure 15
Figure 16
t − Time − µs
TPS77x15
LOAD TRANSIENT RESPONSE
I − Output Current − mA
OVO− Change in
Output Voltage − mV
Co = 2x47 µF
ESR = 1/2x100 m
VO = 1.5 V
VIN = 2.7 V
500
0
0604020 80 100 140120 160 180 200
0
50
−50
TPS77x33
LINE TRANSIENT RESPONSE
t − Time − µs
VO− Change in VI− Input Voltage − V
Output Voltage − mV
5.3
604020 80 100 140120 160 180 200
Co = 10 µF
TA = 25°C
0
4.3
10
0
−10
Figure 17
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
t − Time − µs
TPS77x33
LOAD TRANSIENT RESPONSE
I − Output Current − mA
OVO− Change in
Output Voltage − mV
500
0
604020 80 100 140120 160 180 200
0
0
50
−50
Co = 2x47 µF
ESR = 1/2x100 m
VO = 3.3 V
VI = 4.3 V
Figure 18 Figure 19
t − Time − ms
TPS77x33
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
3
2
0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 10
VO− Output Voltage − V
0
1
4
Enable Pulse − V
Co = 10 µF
IO = 500 mA
TA = 25°C
IN
EN
OUT
+
GND Co
ESR
R
VITo Load
RL
Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 21
ESR − Equivalent Series Resistance −
0.1
0 100 200 300 400 500
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
IO − Output Current − mA
1
0.01
VO = 3.3 V
Co = 4.7 µF
VI = 4.3 V
TA = 25°CRegion of Stability
Region of Instability
Region of Instability
Figure 22
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
IO − Output Current − mA
ESR − Equivalent Series Resistance −
0.1
0 100 200 300 400 500
10
1
VO = 3.3 V
Co = 4.7 µF
VI = 4.3 V
TJ = 125°C
Region of Stability
Region of Instability
0.01
Region of Instability
Figure 23
ESR − Equivalent Series Resistance −
0.1
0 100 200 300 400 500
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
IO − Output Current − mA
1
Region of Instability
Region of Stability
VO = 3.3 V
Co = 22 µF
VI = 4.3 V
TA = 25°C
0.01
Region of Instability
Figure 24
ESR − Equivalent Series Resistance −
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
0.1
0 100 200 300 400 500
10
1
IO − Output Current − mA
Region of Stability
Region of Instability
VO = 3.3 V
Co = 22 µF
VI = 4.3 V
TJ = 125°C
0.01
Region of Instability
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to Co.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
The TPS775xx family includes five fixed-output voltage regulators (1.5 V, 1.6 V, 1.8 V, 2.5 V, and 3.3 V), and
an adjustable regulator, the TPS77501 (adjustable from 1.5 V to 5.5 V).
The TPS776xx family includes five fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.8 V, and 3.3 V), and
an adjustable regulator, the TPS77601 (adjustable from 1.2 V to 5.5 V).
device operation
The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even with
varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly
proportional to the load current through the regulator (IB = IC/β). The TPS775xx and TPS776xx use a PMOS
transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and
invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS775xx and TPS776xx quiescent currents remain low even when the regulator drops out, eliminating both
problems.
The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in the
high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to
2 µA. If the shutdown feature is not used, EN should be tied to ground.
minimum load requirements
The TPS775xx and TPS776xx families are stable even at zero load; no minimum load is required for operation.
FB—pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inches
from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of
milliamps) load transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected between
OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF
and the ESR (equivalent series resistance) must be between 50 m and 1.5 . Capacitor values 10 µF or larger
are acceptable, provided the ESR is less than 1.5 . Solid tantalum electrolytic, aluminum electrolytic, and
multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
external capacitor requirements (continued)
RESET/
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
VI
C1
0.1 µF
RESET/PG
VO
10 µF
+Co
250 k
Figure 25. Typical Application Circuit (Fixed Versions)
programming the TPS77x01 adjustable LDO regulator
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as
shown in Figure 26. The output voltage is calculated using:
VO+Vref ǒ1)R1
R2Ǔ(
1)
Where:
V
ref
= 1.1834 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 110 k to set the divider current at approximately 10 µA and then calculate R1 using:
R1 +ǒVO
Vref *1Ǔ R2 (2)
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
4.75 V
UNIT
121
196
226
332
110
110
110
110
k
k
k
k
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VO
VIRESET/
PG
OUT
FB / NC
R1
R2
GND
EN
IN
0.9 V
1.7 V
TPS77x01
Reset or PG Output
0.1 µF250 k
Co
Figure 26. TPS77x01 Adjustable LDO Regulator Programming
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
reset indicator
The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internal
comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires
a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as
a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the
specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer
to timing diagram for start-up sequence).
power-good indicator
The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator . The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator.
regulator protection
The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currents
when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from
the output to the input and is not internally limited. When extended reverse voltage is anticipated, external
limiting may be appropriate.
The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normal
operation, the TPS775xx and TPS776xx limit output current to approximately 1.7 A. When current limiting
engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is
designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of
the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down.
Once the device has cooled below 130°C(typ), regulator operation resumes.
        
        
    
SGLS012B − MARCH 2003 − REVISED APRIL 2008
18 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 1 2 5 °C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,