OKI Semiconductor MSC23232C/CL-xxBS16/DS16 2,097,152-Word x 32-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23232C /CL-xxBS16/DS16 is a fully decoded 2,097,152-word x 32-bit CMOS Dynamic Random Access Memory Module composed of sixteen 4-Mb DRAMs (1M x 4) in SOJ packages mounted with sixteen decoupling capacitors on a 72-pin glass epoxy single-inline package. This module is generally used for non-parity memory expansion applications such as fax machines, printers and personal computers. The low-power version (CL) offers reduced power consumption for mobile computing applications like laptops and palmtops. FEATURES 2-Meg x 32-bit organization * 72-Pin Socket Insertable Module MSC23232C/CL-xxBS16 : Gold tab MSC23232C /CL-xxDS16: Solder tab * Single 5 V supply +10% tolerance * Access times : 60, 70, 80 ns *Input : TTL compatible * Output : TTL compatible, 3-state * Refresh : 1024 cycles/16 ms (128 ms : L-version) * CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability * Multi-bit test mode capability * Fast Page Mode capability PRODUCT FAMILY Family Access Time (Max.) Cycle Time Power Dissipation trac taa tcac {Min.) Operating (Max.}| Standby (Max.) MSC23232C/CL-60BS16/DS16 | 60ns | 30ns | 15ns 110 ns 4620 mW 88 mW/ MSC23232C/CL-70BS16/0S16 | 7Ons | 35ns | 20ns 130 ns 4180 mw 17.6 mW (L-version) MSC23232C/CL-80BS16/0S16 | 80ns | 40ns | 20ns 150 ns 3740 mw 103OFA Semiconductor MSC23232C/CL-xxBS16/DS16 PiN CONFIGURATION MSC23232C/CL-xxBS16/DS16 4 107.95 +02 _ 3.38 20.2 101.19 Typ. ~ 2 G3 f= oOo poo, $3.18 25.4 +02 Sd : Td Typ. ) 1076] BET | 4 2.03 Typ. R157 6.35 Typ. 1.27 20 6.35 1.04 Typ 95.25 1 The common size difference of the board width 12.5 mm of its height is Specified as +0.2. The value above 12.5 mm is specified as 0.5. Pin No. |Pin Name| | Pin No. [Pin Name|| Pin No. [Pin Namal | Pin No. |Pin Name) | Pin No. !Pin Name 1 Vss 16 AA 31 AB 46 NC 61 pa13 2 Dao 7 AS 32 Ag 47 WE 62 Da30 3 Da1s 18 AG 33 RASS 48 NC 63 Da14 4 pai 19 NC 34 RAS? 49 DQ8 64 pa31 5 DQ17 20 Dad 35 NG 50 pa24 65 Do1s 6 Da? 21 Da20 36 NC 51 pag 66 NC 7 0018 22 005 37 NC 52 pa2s 67 PD1 8 Das 23 ba21 38 NC 53 pa10 6B P02 9 DQ19 24 DQ6 39 Vsg 54 DO26 69 PD3 10 Veo 25 Da22 40 CASO 55 pai 70 PD4 11 NC 26 DQ7 41 CASS 56 ba27 71 NC 12 AO 27 0023 42 CASS 57 0G12 72 Vsg 13 Al 28 A7 43 CAST 58 pa2ze 14 A2 29 NC 44 RASO 59 Vec 15 A3 30 Voc 45 RAST 60 pag Presence Detect Pins . MSC23232C/CL | MSC23232C/CL | MSC23232C/CL Pin No, Pin Name -60B$16/DS16 7088 16/0816 -80B$16/DS16 67 PD1 NC NC NC 68 PD2 NC NC NC 69 PD3 NC Vg NC 70 PD4 NC NC Vss 104OKI Semiconductor MSC23232C/CL-xxBS16/DS16 BLOCK DIAGRAM AO- Ag RASS tASE RASS CASO CAS? WE e4 Ao-ag DG P-DO0 DA ag-as ig @{ ag-ag DO ;OO16 90 po-ag ly FAS ta t-poe oa) SL THB bacco} oo ASTH+F TAS ae TAS TAS oa TAS bi bg pas 4 pa We we DA f-dats-7 0a We E UE OE OE Voc Veg | Vss_ Vee Veo Vg | Vss Vee @4 Ad-ag OO F-02044 00 pg. pg lg @-| A0-Ag DQ - D020 DO pg-ag Le tT fmes 93 F999 as 1 mas 22 [1] 90 as CT CAS _ _| CAS CAS CAS ar 09 pa? pa TE We oa lL pozs ba WE Veo Vsg Vss Vee Veo Vs | Vss Voc #4 Ao-ag DO ;-DO8 + DO ag-ag Ly #| Ao-ag 00 0024~ DO ag. ag Lb SHIPS ta cated oo AS RAS og pawe_|oa FAS TAS Pate TAS TAS Z TAS ba pai oa pa | poz74 00 WE tE oe | CWE WE OE ce | OWE Veo Vsg | Vss Vee Voc Vss | | Vg Veo LJ ag-ag OO F-DOI2-| 00 py. ag LJ Ag-ag OQ } DQ2B| DO ag. ag (J | DO + Da134 Da _ pa | paze va RAS RAS |g RAS FAS } tag OOF DA 00 ae zag 29 }- D30] vo = _ A _| CAS aE og pats m9 TE we a; bas Do OE OE Vee Vgs | | Vss Voc Veco Vs5 | | Vsg Vec q b RAST CAST CASS Voc 2 Ves oy F016 105MSC23232C/CL-xxBS16/DS16 OKI Semiconductor ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit Voltage on Any Pin Relative to Vss | Vin, Vout 1.0 to 7.0 Vv Voltage Vcc Supply Relative to Veg Vec -1.0to 7.0 V Short Circuit Output Current las 50 mA Power Dissipation Pp 16 W Operating Temperature Topr Ota 70 G Storage Temperature Tstg 40 to 125 C Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions (Ta = 0C to 70C) Parameter Symbol Min. Typ. Max. Unit Vec 45 5.0 5.5 V Power Supoly Voltage Vss 0 0 0 v input High Voltage Vin 2.4 _ 65 V Input Low Voltage Vit -1.0 _ 0.8 Vv Capacitance (Ta = 25C, f = 1 MHz) Parameter Symbol! Typ. Max. Unit Input Capacitance (AO - AQ) Cin _ 109 pF Input Capacitance (WE) Cine 125 pF input Capacitance (RASO - RAS3} Cina 35 pf Input Capacitance (CASO - CAS3) Cina 35 pF I/O Capacitance (DQ0 - DQ31) Coo _ 20 pF Note: Capacitance measured with Boonton Meter. 106OKI Semiconductor DC Characteristics MSC23232C/CL-xxBS16/DS16 (Voc = 5 V 210%, Ta = 0C to 70C) MSG23232C/CL MSC23232C/CLIMSC23232C/CL Parameter Symbol Condition -608S16/DS16 | -70BS16/DS16 | -80BS16/DS16 | Unit |Note Min. | Max. | Min. | Max, | Min. | Max. OVEVWS65V; Input Leakage Current I, | AH other pins not | -160 | 160 | -160/] 160 | -160! 160 pA under test = 0 V Output Leakage Current | tio Dw eveees y | 20] 20 | 20} 20 | -20} 20 | ya Output High Voltage Vou | low =-5.0 mA 2.4 Voc 2.4 Vee 2.4 Vec Vv Output Low Voltage Vor | lol =4.2 mA 0 0.4 0 0.4 0 04 y Average Power ae Supply Current Icct BAS, CAS cyeling, _ 840 | 760 _ 680 | mA| 1,2 . tac = Min. (Operating) RAS, CAS = Vin _ 32 _ 32 32 | mA} 1 Power Supply Current (Standby) Icc2 | RAS, CAS - 16 _ 16 _ 16 | mAT 1 2Voc 0.2 V =~ 3.2 _ 3.2 _ 3.2 | mA} 7,5 Average Power RAS cycling, Supply Current lec3 | TAS = Vin, _ 840 | 760 _ 680 | mA| 1,2 (RAS-only Refresh) tac = Min. Average Power RAS cycling, Supply Current icc | GAS before RAS, | 840} | 760 | | 680 | mA} 1,2 (CAS before RAS Refresh) tac = Min. Average Power RAS = Vit, Supply Current Icc7_| CAS cycling, | 680; | 600 | | 520 | mAl 4,3 (Fast Page Mode) tpg = Min. Average Power tre = 125 us, 12 Supply Current lee19 CAS before 48 | | 48 | 48 | mA 4 5 (Battery Backup} RAS cycling Notes: 1. Specified values are obtained with the output open. . 2, Address can be changed once or less while RAS=V},. 3. Address can be changed once or less while CAS=Vjy). 4. Veco -0.2VSViyq $6.5V,-1.0V SVij_ 50.2 V. 5. L-version. 107MSC23232C/CL-xxBS16/DS16 AC Characteristics (1/2) (Voc = 5 V 210%, Ta = 0C to 70C) OKI Semiconductor Note 1,2,3,9,10 MSC23232C/CL|/MSC23232C/CL|MSC23232C/CL, Parameter Symbol/ -608516/D516 | -708S16/DS16 | -80BS16/DS16 | Unit| Note Min. | Max. | Min. | Max. | Min. | Max. Random Read or Write Cycle Time tac | 110 130 _ 150 _ ns Fast Page Mode Cycle Time tec 40 _ 45 _ 50 _ ns Access Time from RAS trac {| | 60 | | 7O | 80 | ns 4,5,6 Access Time from CAS teac | 15 | 20 | 20 | ns] 45 Access Time from Column Address taa _ 30 _ 35 _ 40 ns | 4.6 Access Time trom CAS Precharge tcpa_ | 35 _ 40 _ 45 ms | 4 Output Low Impedance Time from CAS toz | 0 _ 0 _ 0 {ns{ 4 Output Buffer Turn-otf Delay Time torr 0 15 0 20 0 20 ns 7 Transition Time tr 3 50 3 50 3 50 ms | 3 Refresh Period tres | 16 _ 16 _ 16 | ms Refresh Period (L-version) pee | 128 _ 128 _ 128 | ms RAS Precharge Time tap | 40 _ 50 60 ~ | ns RAS Pulse Width tras | 60 10K 70 10K | 380 10K | as RAS Pulse Width (Fast Page Mode) taase | 66 | 100K} 70 | 100K | 80 | 100K | ns RAS Hotd Time tasy | 15 _ 20 20 _ ns CAS Precharge Time tcp | 10 10 ~ 10 | os CAS Pulse Width teas | 15 10K | 20 | 10K | 20 10K | ns CAS Hold Time tes | 60 70 | {| 8 | | os TAS to RAS Precharge Time teap | 5 _ 5 5 | os RAS to CAS Delay Time taco | 20 45 20 50 20 60 | ns| RAS to Column Address Delay Time trap 15 30 15 35 15 40 ns 6 Row Address Set-up Time tase 0 _ 0 _ 0 _ ns Row Address Hold Time tran | 10 _ 10 10 _ ng Column Address Set-up Time tasc 0 _ .0 _ 0 _ ns Column Address Hold Time tean | 15 _ 15 _ 15 ns Column Address Hold Time from RAS tan 50 _ 55 _ 60 _ ns Column Address to RAS Lead Time tear | 30 35 _ 40 | ns 108AKI Semiconductor MSG23232C/CL-xxBS16/DS16 AC Characteristics (2/2) (Veg = 5 V 210%, Ta =0C to 70C) Note 1,2,3,9,10 MSC232320/CLIMSC232392C/CL MSC232326/CL Parameter Symbo!| -60BS16/DS16 | -708S16/DS16 | -808S16/DS16 |Unit | Note Min. | Max. | Min. | Max. | Min. | Max. Read Gammand Set-up Time tres 0 0 0 | ns Read Command Hold Time {rcH 0 _ 0 _ 0 ns 8 Read Command Hold Time referenced to RAS | tar 0 0 0 jns|] 8 Write Command Set-up Time twos | 9 - 0 _ 0 | as Write Command Hold Time twoH 10 _ 10 _ 10 _ ns Write Command Hold Time from RAS twea | 45 | 50 _ 60 | ns Write Command Pulse Width twe 10 _ 10 _- 10 | ons Write Command to RAS Lead Time taw. | 15 | 20 20 | | as Write Command to CAS Lead Time teow. | 15 20 _ 20 | ns Data-in Set-up Time tos 0 0 _ 9 | rs Data-in Hold Time ton 15 _ 15 _ 15 _ ns Data-in Hold Time from RAS tour | 50 55 _ 60 | ns CAS Active Delay Time from RAS Precharge] tape 5 _ 5 5 | 1s RAS to CAS Set-up Time (CAS before RAS)| tcsp 5 5 5 | ns RAS to CAS Hold Time (CAS before RAS) | tour | 10 _ 10 _ 10 | ons CAS Precharge Time (Refresh Counter Test)| tcpr 30 _ 35 _ 40 | ns WE to RAS Precharge Time (CAS before RAS)! twrp | 10 _ 10 10 | | ns WE Hold Time trom RAS (CAS before RAS)| twa | 10 | 10 _- 10 | | ns RAS to WE Set-up Time (Test Mode) twigs | 10 10 10 | as RAS to WE Hold Time (Test Mode) twm | 10 10 10 | ns 109MSC23232C/CL-xxBS16/DS16 OKI Semiconductor Notes: 110 1. 10. A start-up delay of 200 ts is required after power-up followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. When using the internal refresh counter, a minimum of eight CAS before RAS initialization cycles is required. AC mesurement assume tr = 5 ns. Vin (Min.) and Vj, (Max.) are reference levels for measuring input timing signals. Transition times are measured between Vj; and Vi. . Measured with a load circuit equivalent to 2 TTL loads and 100 pF. . Operation within the tpcp (Max.) limit ensures that trac (Max.) can be met. trcp (Max.) is specified as a reference point only. If tpcpis greater than the specified trcp (Max.) limit, access time is controlled by tcac. . Operation within the trap (Max.) limit ensures that trac (Max.) can be met. trap (Max.) is specified as a reference point only. If tp ap is greater than the specified trap (Max.) limit, access time is controlled by ta,. . torr (Max.) defines the time at which the output achieves an open circuit condition and is not referenced to output voltage levels. . tacH Or tpRH must be satisfied for a read cycle. . The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet is 2-bit parallel test function. CAQ is not used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values. See ADDENDUM E for AC Timing Waveforms