Not recommend
for new design
To our customers,
Old Company Name in Catalogs and Other Documents
On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company nam e remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1st, 2010
Renesas Electronics Corporation
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
Not recommend
for new design
Notice
1. All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to
additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights
of third parties by or arising from the use of Renesas Electronics products or technical information described in this document.
No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights
of Renesas Electronics or others.
3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of
semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software,
and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by
you or third parties arising from the use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control
laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas
Electronics products or the technology described in this document for any purpose relating to military applications or use by
the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and
technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics
does not warrant t hat such information is error free. Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: “Standard”, “High Quality”, and
“Specific”. The recommend ed applications for each Renesas Electronics product depends on the product’s quality grade, as
indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular
application. You may not use any Renesas Electronics product for any application categorized as “Specific” without the prior
written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way
liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an
application categorized as “Specific” or for which the product is not intended where you have failed to obtain the prior written
consent of Renesas Electronics. The quality grade of each Renesas Electronics product is “Standard” unless otherwise
expressl y specified in a Ren esas Electroni cs data sheets or dat a books, et c.
“Standard”: Computers; office equipment; communications equipment; test and measurement equipment; audio and visual
equipment; home electronic applian ces; machine to ols; personal electronic equipment; and industrial robots.
“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-
crime systems; safety equipment; and medical equipment not specifically designed for life support.
“Specific”: Aircraft; aerospace equi pment; submersible repeaters; nuclear reactor cont rol systems; medical equipment or
systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare
interven tion (e.g. excisi on, etc. ), an d any other applications or purposes that po se a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics,
especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation
characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or
damages arising out of the use of Renesas Electronics products beyond such specified ranges.
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have
specific chara cteristi cs such as the o ccurren ce of failure at a certai n rat e and malfun cti on s under certain u se cond itions. Further,
Renesas Electronics products are not sub j ect to radiation resistance design. Please be sure to implement safety measures to
guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a
Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire
control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because
the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system
manufactured by you.
10. Please contact a Ren esas Electronics sales of fice for details as to environ ment al matters such as t he environmental
compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable
laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS
Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with
applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas
Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this
document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes i t s majori t y-
owned subsidiaries.
(Note 2) Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
Rev.2.00, May.25.2004, page 1 of 12
R1LV0408C-C Series
4M SRAM (512-kword × 8-bit)
REJ03C0099-0200Z
Rev. 2.00
May.25.2004
Description
The R1LV0408C-C is a 4-Mbit static RAM organized 512-kword × 8-bit. R1LV0408C-C Series has
realized higher density, higher performance and low power consumption by employing CMOS process
technology (6-transistor memory cell). The R1LV0408C-C Series offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It has packaged in 32-pin SOP, 32-pin
TSOP II and 32-pin STSOP.
Features
Single 3 V supply: 2.7 V to 3.6 V
Access time: 55/70 ns (max)
Power dissipation:
Active: 6 mW/MHz (typ)
Standby: 1.5 µW (typ)
Completely static memory.
No clock or timing strobe required
Equal access and cycle times
Common data input and output.
Three state output
Directly TTL compatible.
All inputs and outputs
Battery backup operation.
Operating temperature: 20 to +70°C
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 2 of 12
Ordering Information
Type No. Access time Package
R1LV0408CSP-5SC 55 ns 525-mil 32-pin plastic SOP (32P2M-A)
R1LV0408CSP-7LC 70 ns
R1LV0408CSB-5SC 55 ns 400-mil 32-pin plastic TSOP II (32P3Y-H)
R1LV0408CSB-7LC 70 ns
R1LV0408CSA-5SC 55 ns 8mm × 13.4mm STSOP (32P3K-B)
R1LV0408CSA-7LC 70 ns
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 3 of 12
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CC
A11
A9
A8
A13
WE#
A18
A15
V
A17
A16
A14
A12
A7
A6
A5
A4
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
V
I/O2
I/O1
I/O0
A0
A1
A2
A3
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
V
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
CC
(Top view)
32-pin SOP
32-pin TSOP 32-pin STSOP
(Top view)
Pin Description
Pin name Function
A0 to A18 Address input
I/O0 to I/O7 Data input/output
CS# (CS) Chip select
OE# (OE) Output enable
WE# (WE) Write enable
VCC Power supply
VSS Ground
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 4 of 12
Block Diagram
I/O0
I/O7
CS#
WE#
OE#
A3A2A1A0 A6A5
V
V
CC
SS
Row
Decoder
Memory Matrix
2,048 2,048
Column I/O
Column Decoder
Input
Data
Control
×
Timing Pulse Generator
Read/Write Control
A4 A7
A11
A9
A8
A15
A18
A10
A13
A17
A16
A14
A12
LSB
MSB
LSB
MSB
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 5 of 12
Operation Table
WE# CS# OE# Mode VCC current I/O0 to I/O7 Ref. cycle
× H × Not selected ISB, ISB1 High-Z
H L H Output disable ICC High-Z
H L L Read ICC Dout Read cycle
L L H Write ICC Din Write cycle (1)
L L L Write ICC Din Write cycle (2)
Note: H: VIH, L: VIL, ×: VIH or VIL
Absolute Maximum Ratings
Parameter Symbol Value Unit
Power supply voltage relative to VSS V
CC 0.5 to +4.6 V
Terminal voltage on any pin relative to VSS V
T 0.5*1 to VCC + 0.5*2 V
Power dissipation PT 0.7 W
Operating temperature Topr 20 to +70 °C
Storage temperature range Tstg 65 to +150 °C
Storage temperature range under bias Tbias 20 to +85 °C
Notes: 1. VT min: 3.0 V for pulse half-width 30 ns.
2. Maximum voltage is +4.6 V.
DC Operating Conditions
(Ta = 20 to +70°C)
Parameter Symbol Min Typ Max Unit
Supply voltage VCC 2.7 3.0 3.6 V
V
SS 0 0 0 V
Input high voltage VIH 2.2 V
CC + 0.3 V
Input low voltage VIL 0.3*1 0.6 V
Note: 1. VIL min: 3.0 V for pulse half-width 30 ns.
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 6 of 12
DC Characteristics
Parameter Symbol Min Typ Max Unit Test conditions
Input leakage current |ILI|   1 µA Vin = VSS to VCC
Output leakage current |ILO|   1 µA CS# = VIH or OE# = VIH or
WE# = VIL or VI/O = VSS to VCC
Operating current ICC 5*1 10 mA CS# = VIL,
Others = VIH/ VIL, II/O = 0 mA
Average operating current ICC1 8*1 25 mA Min. cycle, duty = 100%,
CS# = VIL, Others = VIH/VIL
II/O = 0 mA
I
CC2 2*1 5 mA Cycle time = 1 µs,
duty = 100%,
II/O = 0 mA, CS# 0.2 V,
VIH VCC 0.2 V, VIL 0.2 V
Standby current ISB 0.1*1 0.3 mA CS# = VIH
to +70°C ISB1   8 µA Vin 0 V, CS# VCC 0.2 V
to +40°C ISB1 0.7*2 3 µA
5SC
to +25°C ISB1 0.5*1 3 µA
to +70°C ISB1   16 µA
to +40°C ISB1 0.7*2 10 µA
Standby
current
7LC
to +25°C ISB1 0.5*1 10 µA
Output low voltage VOL 0.4 V IOL = 2.1 mA
V
OL2 0.2 V IOL = 100 µA
Output high voltage VOH 2.4   V IOH = 1.0 mA
V
OH2 V
CC 0.
2
  V IOH = 0.1 mA
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25°C and specified loading, and not guaranteed.
2. Typical values are at VCC = 3.0 V, Ta = +40°C and specified loading, and not guaranteed.
Capacitance
(Ta = +25°C, f = 1.0 MHz)
Parameter Symbol Min Typ Max Unit Test conditions Note
Input capacitance Cin   8 pF Vin = 0 V 1
Input/output capacitance CI/O   10 pF VI/O = 0 V 1
Note: 1. This parameter is sampled and not 100% tested.
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 7 of 12
AC Characteristics
(Ta = 20 to +70°C, VCC = 2.7 V to 3.6 V, unless otherwise noted.)
Test Conditions
Input pulse levels: VIL = 0.4 V, VIH = 2.4 V
Input rise and fall time: 5 ns
Input and output timing reference levels: 1.5 V
Output load: 1 TTL Gate + CL (50 pF) (R1LV0408C-5SC)
1 TTL Gate + CL (100 pF) (R1LV0408C-7LC)
(Including scope and jig)
Read Cycle
R1LV0408C-C
-5SC -7LC
Parameter Symbol Min Max Min Max Unit Notes
Read cycle time tRC 55 70 ns
Address access time tAA 55 70 ns
Chip select access time tCO 55 70 ns
Output enable to output valid tOE 30 35 ns
Chip select to output in low-Z tLZ 10 10 ns 2
Output enable to output in low-Z tOLZ 5 5 ns 2
Chip deselect to output in high-Z tHZ 0 20 0 25 ns 1, 2
Output disable to output in high-Z tOHZ 0 20 0 25 ns 1, 2
Output hold from address change tOH 10 10 ns
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 8 of 12
Write Cycle
R1LV0408C-C
-5SC -7LC
Parameter Symbol Min Max Min Max Unit Notes
Write cycle time tWC 55 70 ns
Chip selection to end of write tCW 50 60 ns 4
Address setup time tAS 0 0 ns 5
Address valid to end of write tAW 50 60 ns
Write pulse width tWP 40 50 ns 3, 12
Write recovery time tWR 0 0 ns 6
Write to output in high-Z tWHZ 0 20 0 25 ns 1, 2, 7
Data to write time overlap tDW 25 30 ns
Data hold from write time tDH 0 0 ns
Output active from end of write tOW 5 5 ns 2
Output disable to output in high-Z tOHZ 0 20 0 25 ns 1, 2, 7
Notes: 1. tHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit conditions
and are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. A write occurs during the overlap (tWP) of a low CS# and a low WE#. A write begins at the later
transition of CS# going low or WE# going low. A write ends at the earlier transition of CS# going
high or WE# going high. tWP is measured from the beginning of write to the end of write.
4. tCW is measured from CS# going low to the end of write.
5. tAS is measured from the address valid to the beginning of write.
6. tWR is measured from the earlier of WE# or CS# going high to the end of write cycle.
7. During this period, I/O pins are in the output state so that the input signals of the opposite phase
to the outputs must not be applied.
8. If the CS# low transition occurs simultaneously with the WE# low transition or after the WE#
transition, the output remain in a high impedance state.
9. Dout is the same phase of the write data of this write cycle.
10. Dout is the read data of next address.
11. If CS# is low during this period, I/O pins are in the output state. Therefore, the input signals of
the opposite phase to the outputs must not be applied to them.
12. In the write cycle with OE# low fixed, tWP must satisfy the following equation to avoid a problem of
data bus contention. tWP tDW min + tWHZ max
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 9 of 12
Timing Waveform
Read Timing Waveform (WE# = VIH)
t
AA
t
CO
t
RC
t
LZ
t
OE
t
OLZ
t
HZ
t
OHZ
Valid data
Valid address
High impedance
Address
CS#
OE#
Dout
t
OH
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 10 of 12
Write Timing Waveform (1) (OE# Clock)
t
WC
t
CW
t
WP
t
AS
t
OHZ
t
DW
t
DH
t
AW
t
WR
*8
Address
OE#
CS#
WE#
Dout
Din Valid data
Valid address
High impedance
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 11 of 12
Write Timing Waveform (2) (OE# Low Fixed)
Address
CS#
WE#
Dout
Din
t
WC
t
CW
t
WR
t
AW
t
WP
t
AS
t
WHZ
t
OW
t
OH
t
DW
t
DH
*11
*9 *10
*8
Valid data
Valid address
High impedance
R1LV0408C-C Series
Rev.2.00, May.25.2004, page 12 of 12
Low VCC Data Retention Characteristics
(Ta = 20 to +70°C)
Parameter Symbol Min Typ Max Unit Test conditions*3
VCC for data retention VDR 2 V CS# VCC 0.2 V, Vin 0 V
to +70°C ICCDR 8 µA VCC = 3.0 V, Vin 0 V
to +40°C ICCDR 0.7*23 µA CS# VCC 0.2 V
5SC
to +25°C ICCDR 0.5*13 µA
to +70°C ICCDR 16 µA
to +40°C ICCDR 0.7*210 µA
Data
retention
current
7LC
to +25°C ICCDR 0.5*110 µA
Chip deselect to data retention time tCDR 0 ns See retention waveform
Operation recovery time tR t
RC*4 ns
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25°C and specified loading, and not guaranteed.
2. Typical values are at VCC = 3.0 V, Ta = +40°C and specified loading, and not guaranteed.
3. CS# controls address buffer, WE# buffer, OE# buffer, and Din buffer. In data retention mode,
Vin levels (address, WE#, OE#, I/O) can be in the high impedance state.
4. tRC = read cycle time.
Low VCC Data Retention Timing Waveform (CS# Controlled)
V
CC
2.7 V
2.2 V
0 V
CS#
t
CDR
t
R
CS# V
CC
– 0.2 V
V
DR
Data retention mode
Revision History R1LV0408C-C Series Data Sheet
Contents of Modification Rev. Date
Page Description
1.00 Jul. 24, 2003 Initial issue
2.00 May. 25, 2004 1
5
5
6
12
12
Features
Standby: 2.4 µW (typ) to 1.5 µW (typ)
Absolute Maximum Ratings
Notes 2 : +7.0 V to +4.6 V
DC Operating Conditions
VIHmin 2.0 V to 2.2 V
VILmax 0.8 V to 0.6 V
DC characteristics
5SC and 7LC items’ description are divided.
Low VCC Data Retention Characteristics
5SC and 7LC items’ description are divided.
Low VCC Data Retention Timing Waveform
4.5 V to 2.7 V
2.4 V to 2.2 V
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
http://www.renesas.com
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501
Renesas Technology Europe Limited.
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom
Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900
Renesas Technology Europe GmbH
Dornacher Str. 3, D-85622 Feldkirchen, Germany
Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11
Renesas Technology Hong Kong Ltd.
7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2375-6836
Renesas Technology Taiwan Co., Ltd.
FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
RENESAS SALES OFFICES
© 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .1.0