Parameter Max. Units
VDS Drain-Source Voltage 30 V
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 10
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 8.1 A
IDM Pulsed Drain Current 81
PD @TA = 25°C Power Dissipation 2.0 W
PD @TA = 70°C Power Dissipation1.3
Linear Derating Factor 0.02 W/°C
VGS Gate-to-Source Voltage ± 12 V
EAS (6 sigma) Single Pulse Avalanche Energy 50 mJ
TJOperating Junction and -55 to + 150
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
• Co-Pack Dual N-channel HEXFET Power MOSFET
and Schottky Diode
• Ideal for Synchronous Buck DC-DC
Converters Up to 11A Peak Output
• Low Conduction Losses
• Low Switching Losses
• Low Vf Schottky Rectifier
Dual FETKY
Co-Packaged Dual MOSFET Plus Schottky Diode
Description
The FETKY™ family of Co-Pack HEXFETMOSFETs and Schottky diodes offers the designer an innovative,
board space saving solution for switching regulator and power management applications. Advanced
HEXFETMOSFETs combined with low forward drop Schottky results in an extremely efficient device suitable
for a wide variety of portable electronics applications.
The SO-14 has been modified through a customized leadframe for enhanced thermal characteristics and
multiple die capability making it ideal in a variety of power applications. With these improvements multiple
devices can be used in an application with dramatically reduced board space. Internal connections enable
easier board layout design with reduced stray inductance.
IRF7335D1
PD- 94546
9/11/02
Device Ratings (Typ.Values)
Q1 Q2
and Schottky
RDS(on) 13.4 mΩ9.6 mΩ
QG 13 nC 18 nC
Qsw 5.5 nC 6.4 nC
VSD 1.0V 0.43V
Symbol Parameter Typ. Max. Units
RθJL Junction-to-Drain Lead 20
RθJA Junction-to-Ambient 62.5 °C/W
Thermal Resistance
Absolute Maximum Ratings
Notes through are on page 12
D1 1
2
3
4
5
6
7
14
13
12
11
10
9
8
D1
G1
S2
S2
S2
G2
S1 , D2
S1 , D2
S1 , D2
S1 , D2
S1 , D2
S1 , D2
S1 , D2
Q1
Q2
IRF7335D1
2www.irf.com
Parameter Min Typ Max Min Typ Max Units Conditions
Continuous Source Current IS10 10 A MOSFET symbol
(Body Diode) showing the
Pulse Source Current ISM 81 81 intergral reverse
(Body Diode) p-n junction diode
Diode Forward Voltage VSD 1 1.25 0.43 0.50 V TJ = 25°C, IS = 1.0A,VGS= 0V
Reverse Recovery Time trr 28 31 ns TJ = 125°C, IF = 8.0A, VR= 15V
Reverse Recovery Charge Qrr 24 26 nC di/dt = 100A/µs
Reverse Recovery Time trr 29 31 ns TJ = 125°C, IF =8.0A, VR= 15V
Reverse Recovery Charge Qrr 26 26 nC di/dt =100A/µs
Parameter Min Typ Max Min Typ Max Units Conditions
Drain-to-Source BVDSS 30 30 V VGS = 0V, I D = 250µA
Breakdown Voltage
Static Drain-Source RDS(on) 13.4 17.5 9.6 12.8 mΩVGS = 4.5V, ID = 10A
on Resistance
Gate Threshold Voltage VGS(th) 1.0 1.1 V VDS = VGS,ID = 250µA
Drain-Source Leakage IDSS 30 30 µA VDS = 24V, VGS = 0
0.3 10 mA VDS = 24V, VGS = 0, Tj = 125°C
Gate-Source Leakage IGSS ±100 ±100 nA VGS = ±12V
Current
Forward Transconductance gFS 21 28 S VGS=5V, ID=8.0A, VDS=15V
Total Gate Charge QG13 20 18 27 VGS=4.5V, ID=8.0A, VDS=15V
Pre-Vth QGS1 3.2 5.8
Gate-Source Charge
Post-Vth QGS2 1.4 1.5 nC
Gate-Source Charge
Gate to Drain Charge QGD 4.1 4.9
Switch Chg(Qgs2 + Qgd) Q
sw 5.5 6.4
Output Charge Qoss 7.7 11 nC VDS = 16V, VGS = 0
Gate Resistance RG4.3 10 2.6 5.0 Ω
Turn-on Delay Time td (on) 6.8 8.8 VDD = 16V, ID = 8.0A
Rise Time tr5.9 3.3 ns VGS = 4.5V
Turn-off Delay Time td (off) 19 17 Clamped Inductive Load
Fall Time tf9.1 7.0
Input Capacitance Ciss 1500 2300
Output Capacitance Coss 310 450 pF VDS = 15V, VGS = 0
Reverse Transfer Capacitance Crss 140 180
Electrical Characteristics
Source-Drain Rating & Characteristics
& Schottky
Current
Q1-Control FET Q2-Synch FET
Breakdown Voltage ∆BVDSS/∆TJ0.025 0.033 V Reference to 25°C, ID = 1.0mA
Tem. Coefficient
S
D
G
IRF7335D1
www.irf.com 3
Fig 3. Typical Output Characteristics
Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
Fig 4. Typical Output Characteristics
Fig 5. Typical Transfer Characteristics Fig 6. Typical Transfer Characteristics
Q1 - Control FET Q2 - Synchronous FET & Schottky
Typical Characteristics
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.25V 20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 12V
10V
8.0V
4.5V
3.5V
3.0V
2.5V
BOTTOM 2. 25V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
ID, Drain-to-Source Current (A)
2.25V
20µs PULSE WIDTH
Tj = 150°C
VGS
TOP 12V
10V
8.0V
4.5V
3.5V
3.0V
2.5V
BOTTOM 2.25V
2.0 3.0 4.0
VGS, Gate-to-Source Voltage (V)
0.1
1.0
10.0
100.0
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 150°C
VDS = 15V
20µs PULSE WIDTH
0.1 110 100
VDS, Drain-to-Source Volta ge (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.0V 20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 10V
5. 0V
4. 5V
3. 0V
2. 7V
2. 5V
2. 2V
B O TT OM 2. 0V
0.1 110 100
VDS, Drain -to-Source Voltag e (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.0V
20µs PULSE WIDTH
Tj = 150°C
VGS
TOP 10V
5.0V
4.5V
3.0V
2.7V
2.5V
2.2V
B OTT OM 2.0V
2.0 2.5 3.0 3.5 4.0 4.5
VGS, Gate-to- Source Voltage (V)
0.0
0.1
1.0
10.0
100.0
ID, Drain-to-Source Current (Α)
TJ = 25 ° C
TJ = 150°C
VDS = 15V
20µs PU LSE WIDTH
IRF7335D1
4www.irf.com
Fig 11. Typical Source-Drain Diode Forward Voltage
Fig. 7. Typical Reverse Output Characteristics Fig. 8. Typical Reverse Output Characteristics
Fig 12. Typical Source-Drain Diode Forward Voltage
Q1 - Control FET Q2 - Synchronous FET & Schottky
Typical Characteristics
Fig. 9 . Typical Reverse Output Characteristics Fig. 10. Typical Reverse Output Characteristics
0.0 0.4 0.8 1.2 1.6 2.0
VSD Source-to-Drain Voltage (V)
0
20
40
60
80
ID Drain-to-Source Current (A)
VGS
TOP 7.5V
4.5V
3.5V
2.5V
2.0V
1.5V
1.0V
BOTTOM 0.0V
20µs PULSE W IDT H
Tj = 25°C
0.0 0.4 0.8 1.2 1.6 2.0
VSD Source-to-Dr ain Vol tage (V)
0
20
40
60
80
ID Drain-to-Source Current (A)
VGS
TOP 7.5V
4.5V
3.5V
2.5V
2.0V
1.5V
1.0V
BOTTOM 0.0V
20µs PULSE W IDTH
Tj = 150°C
0.0 0.4 0.8 1.2 1.6
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
0.0 0.4 0.8 1.2 1.6 2.0
VSD S ourc e-to-Drain V oltage (V)
0
20
40
60
80
ID Drain-to-Source Current (A)
VGS
TOP 7.5V
4.5V
3.5V
2.5V
2.0V
1. 5V
1. 0V
BOTTOM 0.0V
20µs PU LSE WIDTH
Tj = 25°C
0.0 0.4 0.8 1.2 1.6 2.0
VSD Source-to-Drain Voltage (V)
0
20
40
60
80
ID Drain-to-Source Current (A)
VGS
TOP 7.5V
4.5V
3.5V
2.5V
2.0V
1.5V
1.0V
BOTTOM 0.0V
20µs PULSE WIDTH
Tj = 150°C
0.0 0.4 0.8 1.2 1.6 2.0
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
IRF7335D1
www.irf.com 5
Fig 13. Typical Capacitance Vs.Drain-to-Source Voltage Fig 14. Typical Capacitance Vs.Drain-to-Source Voltage
Fig 17. Maximum Safe Operating Area
Fig. 15. Gate-to-Source Voltage vs Typical Gate Charge Fig. 16. Gate-to-Source Voltage vs Typical Gate Charge
Fig 18. Maximum Safe Operating Area
Typical Characteristics
Q1 - Control FET Q2 - Synchronous FET & Schottky
110 100
VDS, Drain-to-Source Voltage (V)
0
500
1000
1500
2000
2500
3000
3500
4000
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd , Cds
SHORTED
Crss = Cgd
Coss = Cds + Cgd
0.1 1.0 10.0 100.0 1000.0
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
110 100
VDS, Drain-to-Source Voltage (V )
0
500
1000
1500
2000
2500
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + C gd , C ds
SHORTED
Crss = C
gd
Coss = C
ds + C
gd
0.1 1.0 10.0 100.0 1000.0
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
0 5 10 15 20 25 30
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 8.0A
0 5 10 15 20 25 30
QG Total Gate Charge ( nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 8.0A
IRF7335D1
6www.irf.com
Fig 23. Typical On-Resistance Vs. Gate Voltage
Fig 21. Typical On-Resistance Vs. Drain Current Fig 22. Typical On-Resistance Vs. Drain Current
Fig 24. Typical On-Resistance Vs. Gate Voltage
Q1 - Control FET Q2 - Synchronous FET & Schottky
Typical Characteristics
Fig 19. Normalized On-Resistance Vs. Temperature Fig 20. Normalized On-Resistance Vs. Temperature
-60 -40 -20 020 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
4.5V
10A
0 20406080100
ID , Drain Current (A)
0.009
0.010
0.011
RDS (on) , Drain-to-Source On Resistance (Ω)
VGS = 4.5V
3.0 3.5 4.0 4.5
VGS, Gate -to -Source Voltage (V)
0.005
0.010
0.015
RDS(on), Drain-to -Source On Resistance (Ω)
ID = 10A
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , J unction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 10A
VGS = 4.5 V
020 40 60 80
ID , Drain Current (A)
0.010
0.015
0.020
0.025
0.030
RDS ( on) , Drain-to-Source On Resistance ( Ω)
VGS= 4.5V
2.0 4.0 6.0 8.0 10.0
VGS, Gate -to -Source Voltage (V)
0.00
0.01
0.02
0.03
RDS(on), Drain-to -Source On Resistance (Ω)
ID = 10A
IRF7335D1
www.irf.com 7
Fig 25. Maximum Drain Current Vs.CaseTemperature
Fig. 28 . Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 27a&b. Basic Gate Charge Test Circuit
and Waveform
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VGS
Q
G
Q
GS
Q
GD
V
G
Charge
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
VGS
+
-
VDD
Fig 26a. Switching Time Test Circuit
Fig 26b. Switching Time Waveforms
25 50 75 100 125 150
TJ , Junction Temperature (°C )
0
2
4
6
8
10
12
ID , Drain Current (A)
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rectangular Pulse Duration (sec)
0.01
0.1
1
10
100
Thermal Response ( Z thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SING LE PULSE
( THERMAL R ESPONSE )
IRF7335D1
8www.irf.com
Schottky Diode Characteristics
Fig. 30 - Typical Values of
Reverse Current Vs. Reverse Voltage
Fig. 29 - Maximum Forward Voltage Drop
Characteristics
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Forward Voltage Drop - V F ( V )
0.1
1
10
100
Instantaneous Forward Current - IF ( A )
TJ = 150°C
TJ = 125°C
TJ = 25°C
0 5 10 15 20 25 30
Rever se Vol tage - V R (V)
0.1
1
10
100
1000
10000
100000
Reverse Current - I R (µA )
125°C
100°C
Tj = 150°C
75°C
50°C
25°C
IRF7335D1
www.irf.com 9
Fig. 31 Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Fig. 32 Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
IRF7335D1
10 www.irf.com
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
Power losses in the control switch Q1 are given
by;
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
This can be expanded and approximated by;
P
loss =Irms 2×Rds(on)
()
+I×Qgd
ig×Vin ×f
+I×Qgs2
ig×Vin ×f
+Qg×Vg×f
()
+Qoss
2×Vin ×f
This simplified loss equation includes the terms Qgs2
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Synchronous FET
The power loss equation for Q2 is approximated
by;
P
loss =P
conduction +P
drive +P
output
*
P
loss =Irms
2×Rds(on)()
+Qg×Vg×f
()
+Qoss
2×Vin ×f
+Qrr ×Vin ×
f
(
)
*dissipated primarily in Q1.
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and of f there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
Power MOSFET Selection for Non-Isolated DC/DC Converters
Figure A: Q oss Characteristic
IRF7335D1
www.irf.com 11
SO-14 Package Details
SO-14 Part Marking
IRF7335D1
12 www.irf.com
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width ≤ 300 µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
Combined Q1,Q2 IRMS @ Pwr Vout pins. Calculated continuous current based on max allowable junction temperature; switching or other
losses will decrease RMS current capability
Q1 and Q2 is tested 100% in production to 50mJ to stress and eliminate potentially defective parts. This is not a design for us e value.
SO-14 Tape and Reel
Data and specifications subject to change without notice.
This product has been designed and qualified for the consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.9/02
