128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO FLASH AND CellularRAMTM COMBO MEMORY MT28C128532W18/W30E MT28C128564W18/W30E Low Voltage, Wireless Temperature Features Figure 1: 77-Ball FBGA Stacked die Combo package * Includes two 64Mb Flash devices * Choice of either one 32Mb or one 64Mb CellularRAM device Basic configuration Flash * Flexible multibank architecture * 4 Meg x 16 configuration * Async/Page/Burst interface * Support for true concurrent operations with no latency CellularRAM * Low-power, high-density design * 2 Meg x 16 or 4 Meg x 16 configurations * Burst interface F_VCC, VCCQ, F_VPP, C_VCC voltages * 1.70V (MIN)/1.95V (MAX) F_VCC, C_VCC * 1.70V (MIN)/2.24V (MAX) VCCQ (W18) * 2.20V (MIN)/3.30V (MAX) VCCQ (W30) * 1.80V (TYP) F_VPP (in-system PROGRAM/ERASE) * 12V 5% (HV) F_VPP tolerant (factory programming compatibility) Fast programming Algorithm (FPA) Enhanced suspend options * ERASE-SUSPEND-to-READ within same bank * PROGRAM-SUSPEND-to-READ within same bank * ERASE-SUSPEND-to-PROGRAM within same bank Each Flash contains two 64-bit chip protection registers for security purposes 100,000 ERASE cycles per block Cross-compatible command set support * Extended command set * Common Flash interface (CFI) compliant Manufacturer's Identification Code (ManID) * Micron(R) * Intel(R) 2 3 4 5 6 7 8 A4 A18 A19 C_VSS F_VCC F_VCC A21 A11 B A5 C_LB# C_VSS NC CLK RFU A12 C A3 A17 F_VPP C_WE# C_CE# A9 A13 D A2 A7 F_WP# ADV# A20 A10 A15 E A1 A6 C_UB# F_RST# F_WE# A8 A14 A16 F A0 DQ8 DQ2 DQ10 DQ5 DQ13 WAIT# F_CE2# G C_OE# DQ0 DQ1 DQ3 DQ12 DQ14 DQ7 F_OE2# H NC F_OE1# DQ9 DQ11 DQ4 DQ6 DQ15 VCCQ J F_CE1# NC NC NC C_VCC F_VCC VCCQ C_CRE K C_VSS VSSQ VCCQ F_VCC C_VSS VSSQ F_VSS C_VSS Top View (Ball Down) Flash Boot Block Configuration * Top/Top * Top/Bottom * Bottom/Top * Bottom/Bottom CellularRAM Timing * 70ns * 85ns CellularRAM Burst Frequency * 66 MHz I/O Voltage Range * VccQ 1.70V-2.24V (W18) * VccQ 2.20V-3.30V (W30) Manufacturer's Identification Code (ManID) * Micron (0x2Ch) * Intel (0x89h) Operating Temperature Range * Wireless Temperature (-25C to +85C) Package * 77-ball FBGA (Standard) 8 x 10 grid * 77-ball FBGA (Lead-free) 8 x 10 grid2 Options Flash Timing * 60ns1 (W18) * 70ns (W18/W30) Flash Burst Frequency * 66 MHz1 (W18) * 54 MHz (W18/W30) NOTE: 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 1 A 1 1. Contact factory for availability. 2. Contact factory for details. (c)2004 Micron Technology, Inc. All rights reserved. PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Device General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Flash General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Flash Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 CellularRAM General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Part Number Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Valid Part Number Combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Device Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Boot Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 MultiChip Packaging Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Unique IDs, State Machines, and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Command Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 READ Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Flash Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Power Consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Data Sheet Designation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 2 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO List of Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: 77-Ball FBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Part Number Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 77-Ball FBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 3 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO List of Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Ball Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Possible Boot Configurations for Flash Die . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Truth Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 CFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 4 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Device General Description words each (524,288 bits). The parameter blocks are addressed either by the low order addresses (bottom boot) or by the higher order addresses (top boot). The two Flash devices can be supplied with any combination of top or bottom boot (e.g., top/top, bottom/bottom, top/bottom, or bottom/top). The MT28C128532W18/W30E/MT28C128564W18/ W30E combination Flash and CellularRAM devices are a high-performance, high-density, memory solution that can significantly improve system performance. This memory solution is comprised of two 64Mb Flash devices and one 32Mb or one 64Mb CellularRAM device. It is important to note that the specifications contained in this document supersede the specifications listed in the referenced individual Flash and CellularRAM data sheets. CellularRAM General Description The CellularRAM architecture features high-speed CMOS, dynamic random-access memories developed for low-power portable applications The CellularRAM device is available in either 32Mb or 64Mb densities. Two user-accessible control registers define the device operation. The bus configuration register (BCR) defines how the CellularRAM device interacts with the system memory bus and is nearly identical to its counterpart on burst mode Flash devices. The refresh configuration register (RCR) is used to control how refresh is performed on the CellularRAM array. These registers are automatically loaded with default settings during power-up and can be updated anytime during normal operation. To operate seamlessly on a burst Flash bus, CellularRAM products have incorporated a transparent self-refresh mechanism. The hidden refresh requires no additional support from the system memory controller and has no significant impact on device read/write performance. CellularRAM products include three system-accessible mechanisms used to minimize standby current. Partial array refresh (PAR) limits refresh to the portion of the memory array being used. Temperature compensated refresh (TCR) is used to adjust the refresh rate according to the ambient temperature. The refresh rate can be decreased at lower temperatures to minimize current consumption during standby. Deep sleep mode halts the refresh operation altogether and is used when no vital information is stored in the device. These three refresh mechanisms are adjusted through the refresh configuration register (RCR). For device specifications and additional documentation concerning CellularRAM features, please refer to the MT45W2MW16BFB, MT45W2ML16BFB, MT45M4MW16BFB, and MT45W4ML16BFB data sheets at www.micron.com/cellularram. Flash General Description The Flash architecture features a multipartition configuration that supports READ-While-PROGRAM/ ERASE operations with no latency. A 4Mb partition size enables optimal design flexibility. Two Flash devices are stacked to achieve the 128Mb density. Each Flash die has a dedicated CE# and OE# control. The stacked Flash device enables soft protection for blocks, as read only, by configuring soft protection registers with dedicated command sequences. For security purposes, two user-programmable 64-bit chip protection registers are provided for each Flash device. The embedded WORD PROGRAM and BLOCK ERASE functions are fully automated by an on-chip write state machine (WSM). An on-chip device status register can be used to monitor the WSM status and determine the progress of the PROGRAM/ERASE tasks. Each Flash device has a read configuration register (RCR) that defines how the Flash interacts with the memory bus. For device specifications and additional documentation concerning Flash features, please refer to the MT28F644W18 data sheet at www.micron.com/ flash. Flash Configurations Each Flash memory implements a multibank architecture (16 banks of 4Mb each) to allow concurrent operations. Any address within a block address range selects that block for the required READ, PROGRAM, or ERASE operation. Each Flash memory features eight 4K-word sectors (8 x 65,536 bits), designated as parameter blocks, and the remaining part is organized in main blocks of 32K 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Figure 2: Flash Memory Map Parameter Blocks - Top Boot Main Main Main Main Main Parameter Blocks - Bottom Boot Main F_CE1#/F_OE1# controlled lower address space (0Mb to 64Mb) F_CE2#/F_OE2# controlled upper address space (64Mb to 128Mb) NOTE: Figure 2 shows a TB (top/bottom) dual Flash configuration. 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 6 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Figure 3: Block Diagram F_OE2# F_CE2# F_WE# FLASH #2 Bank 31 4,096K x 16 Bank 16 ADV# F_VPP FLASH #1 F_OE1# Bank 15 F_CE1# C_CE# C_CRE C_OE# C_WE# 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN DQ0-DQ15 CLK WAIT# 4,096K x 16 A0-A21 VCCQ VSSQ F_WP# F_RST# F_VCC F_VSS Bank 0 CellularRAM 2,048K x 16 4,096K x 16 7 C_UB# C_LB# C_VSS C_VCC Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Part Number Information Micron's combination memory devices are available with several different combinations of features (see Figure 4). Figure 4: Part Number Chart MT28C 1285 64 W18 E FW -F70 5 -P85 6 BB WT ES Production Status Micron Technology 28C = Dual-Supply Flash/CellularRAM Combo Blank = Production ES = Engineering Samples QS = Qualification Samples Density/Organization/Banks Operating Temperature Range Flash Family WT = Wireless (-25C to +85C) 128 = two 64Mb (4,096K x 16) bank x = 5 Multibank 32 Banks (all banks have the same dimensions) Flash Boot Block Starting Address1 TT = Top boot/Top boot TB = Top boot/Bottom boot BT = Bottom boot/Top boot BB = Bottom boot/Bottom boot CellularRAM Density 32 = 32Mb CellularRAM (2 Meg x 16) 64 = 64Mb CellularRAM (4 Meg x 16) Flash Manufacturer's Identification Code Flash Read Operation W = Flash Async/Page/Burst None = Micron (2Ch) K = Intel (89h) Operating Voltage Range CellularRAM Burst Frequency 18 VCC = 1.70V-1.95V VCCQ = 1.70V-2.24V 6 = 66 MHz CellularRAM Access Time P70 = 70ns P85 = 85ns 30 VCC = 1.70V-1.95V VCCQ = 2.20V-3.30V Flash Burst Frequency 5 = 54 MHz 6 = 66 MHz2 CE Select/Special Mark E = Dual CE Flash with Burst CellularRAM Memory Flash Access Time Package Code F60 = 60ns2 F70 = 70ns FW = 77-ball FBGA (Standard) 8 x 10 grid BW = 77-ball FBGA (Lead-free) 8 x 10 grid2 NOTE: 1. The first character in this field refers to Flash die #2. The second character in this field refers to Flash die #1. 2. Contact factory for availability. Valid Part Number Combinations Device Marking After building the part number from the part number chart above, please go to Micron's Part Marking Decoder Web site at www.micron.com/decoder to verify that the part number is offered and valid. If the device required is not on this list, please contact the factory. Due to the size of the package, the Micron standard part number is not printed on the top of each device. Instead, an abbreviated device mark comprised of a five-digit alphanumeric code is used. The abbreviated device marks are cross-referenced to the Micron part numbers at www.micron.com/decoder. To view the location of the abbreviated mark on the device, please refer to customer service note CSN-11, "Product Mark/ Label," at www.micron.com/csn. 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 8 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Table 1: Ball Descriptions 77-BALL FBGA NUMBERS F1, E1, D1, C1, A1, B1, E2, D2, E6, C7, D7, A8, B8, C8, E7, D8, E8, C2, A2, A3, D6, A7 J1 F8 H2 G8 E5 D4 E4 B2 E3 C5 G1 C6 J8 D5 B6 G2, G3, F3, G4, H5, F5, H6, G7, F2, H3, F4, H4, G5, F6, G6, H7 F7 K7 C4 A5, A6, J6, K4 A4, B4, K1, K5, K8 J5 H8, J7, K3 K2, K6 B5, H1, J2, J3, J4 B7 B3, C3, D3 SYMBOL TYPE A0-A21 Input F_CE1# F_CE2# F_OE1# F_OE2# F_WE# F_WP# F_RST# C_LB# C_UB# C_WE# C_OE# C_CE# C_CRE ADV# CLK DQ0-DQ15 Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input I/O WAIT# F_VSS F_VPP F_VCC C_VSS C_VCC VCCQ VSSQ NC RFU - Output Supply Supply Supply Supply Supply Supply Supply - - - 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN DESCRIPTIONS Addresses: Flash: A0-A21 (128Mb). CellularRAM: A0-A21 (64Mb). CellularRAM: A0-A20 (32Mb). Flash Chip Enable #1. Flash Chip Enable #2. Flash Output Enable #1. Flash Output Enable #2. Flash Write Enable. Flash Write Protect. Flash Reset. CellularRAM Lower Byte Control. CellularRAM Upper Byte Control. CellularRAM Write Enable. CellularRAM Output Enable. CellularRAM Chip Enable. CellularRAM Deep Sleep Mode and Configuration Mode. Address Valid (burst operation only). Clock (burst operation only). Flash/CellularRAM Data Input/Output. WAIT#. See "WAIT Ball Operation" on page 10. Flash Core Ground. Flash VPP. Flash Core Power Supply. CellularRAM Core Ground. CellularRAM Core Power Supply. Flash/CellularRAM I/O Supply. Flash/CellularRAM I/O Ground. No Connect. Not internally connected to the die. Reserved for Future Use (A22). Ball not Mounted. Reserved for Future Use (A23, A24, A25). 9 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Boot Configurations Command Codes The possible configurations for Flash die are shown in Table 2 below. This table shows the possible configurations of the two Flash devices for either top boot or bottom boot: F_CE1# and F_CE2# indicate to which Flash die the configuration is referred. All Flash command codes are independent within each device. Care must be taken when crossing the array boundary between the upper and lower Flash and the CellularRAM memory to ensure that only one device is enabled at one time. In a two-cycle command sequence such as word program (0x40/data), it is required that both commands be issued to the same device. It is not recommended that simultaneous READ, simultaneous WRITE, or simultaneous ERASE operations occur on both Flash devices. Table 2: Possible Boot Configurations for Flash Die CONFIGURATION F_CE2# F_CE1# ORDER CODE Top/Top Top/Bottom Bottom/Top Bottom/Bottom Top Top Bottom Bottom Top Bottom Top Bottom TT TB BT BB READ Operation All READ operations are limited to the address boundaries of each device. A new READ operation must be started when crossing a device boundary. MultiChip Packaging Considerations Flash Reset Multichip packaging presents unique challenges when controlling complex memory devices. The MT28C128532W18/W30E and MT28C128564W18/W30E devices combine two Micron Flash devices with a single CellularRAM device. The reset control is shared by both Flash die. Bringing F_RST# control LOW will reset both the upper and lower device. WAIT Ball Operation It is important to note that the Flash and CellularRAM devices share the WAIT ball functionality and must be configured correctly for proper burst mode operation. The Flash and CellularRAM devices use different registers to configure the WAIT polarity and have opposite default values. The WAIT ball polarity for the Flash device is configured by programming bit 10 in the read configuration register (RCR). The default is active LOW. The WAIT ball polarity for the CellularRAM device is configured by programming bit 10 in the bus configuration register (BCR). The default is active HIGH. Both the Flash and CellularRAM WAIT ball polarities must be set to the same active level for proper operation. Unique IDs, State Machines, and Registers Each Flash device has a separate command state machine (CSM) and status register (SR) and read configuration register (RCR). The read configuration register (RCR) settings are separate and can be different for the upper and lower device. Each Flash device has its own OTP, CFI, and device code. Depending on the boot configuration of each Flash device, the OTP, CFI, and device code information may differ. Both Flash devices will share the same ManID, either Micron (0x2Ch) or Intel (0x89h), which is defined by the part number. The CellularRAM memory has a refresh configuration register (RCR) that defines how the device performs self refresh, and a bus configuration register (BCR) to define the interface configuration. 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN Power Consumption Multiple chip packaging requires that power calculations consider the active operation of the upper and lower Flash as well as that of the CellularRAM device. Total power consumed will be the sum of the currents associated with the state of each device. 10 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. Truth Table FLASH SIGNALS FLASH F_CE1# MODES 11 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004, Micron Technology, Inc. CELLULARRAM MEMORY SHARED SIGNALS F_CE1# F_CE2# F_OE1# F_OE2# F_WE# F_RST# ADV# WAIT# Read L H L X H H L Write Standby Output Disable Reset L H H X H X X X L X H H X X Active1 Asserted High-Z L X H X H H X Active1 X X X X X L X High-Z CellularRAM SIGNALS MEMORY OUTPUT MEMORY BUS C_CE# C_CRE C_OE# C_UB/LB# C_WE# CONTROL CellularRAM memory must be in High-Z CellularRAMmemory any mode allowable DQ0- DQ15 Flash DOUT Flash Other DIN High-Z Other High-Z None High-Z Flash DOUT Flash Other DIN High-Z Other High-Z High-Z Read H L X L H H L Active1 Write Standby Output Disable Reset H X L H X X H X L X H H X X Asserted High-Z X L X H H H X Active1 X X X X X L X High-Z L Active1 L L L L H Write L Active1 L L H L L Standby Output Disable Deep Sleep Mode X X H L X X X None Cellular RAM Cellular RAM Other X X L L H X H Other High-Z X X H H X X X Other High-Z Read CellularRAM memory must be in High-Z CellularRAM memory any mode allowable Flash must be in High-Z DOUT DIN High-Z Flash any mode allowable NOTE: 1. WAIT status is only valid for burst mode operation. WAIT should be ignored for all other operating modes. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO FLASH F_CE2# 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN Table 3: 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Electrical Specifications Table 4: Absolute Maximum Ratings Note 1 PARAMETERS/CONDITIONS Operating Temperature Range Storage Temperature Range Soldering Cycle MIN MAX UNITS NOTES -25 -55 +85 +125 +260 C C C 2 NOTE: 1. Stresses greater than those listed in Table 4 may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. See technical note TN-00-15 for more information. Table 5: Recommended Operating Conditions PARAMETER VCC Supply Voltage (F_VCC and C_VCC) I/O Supply Voltage Table 6: SYMBOL MIN TYP MAX UNITS VCC VccQ (W18) VccQ (W30) 1.70 1.70 2.20 - 1.95 2.24 3.30 V SYMBOL TYP MAX UNITS CIN COUT CCLK 13 18 22 17 20 23 pF pF pF - V Capacitance TA = +25C; f = 1 MHz PARAMETER/CONDITION Input Capacitance Output Capacitance Clock Capacitance 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 12 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Table 7: DC Characteristics It is important to note that the specifications contained in this document supersede the specifications listed in the referenced individual Flash and CellularRAM data sheets. All currents are in RMS unless otherwise noted. W18/W30 PARAMETER SYMBOL VCC Standby Current with 32Mb CellularRAM device with 64Mb CellularRAM device VCC Standby with CellularRAM device in deep powerdown (DPD) mode with 32Mb CellularRAM device with 64Mb CellularRAM device VCC Program Suspend Current with 32Mb CellularRAM device with 64Mb CellularRAM device VCC Erase Suspend Current with 32Mb CellularRAM device with 64Mb CellularRAM device VCC Automatic Power Save Current with 32Mb CellularRAM device with 64Mb CellularRAM device TYP ICCS ISBZZ MAX UNITS NOTES 160 170 A 4 A 1, 4 60 60 ICCWS 160 170 A 2, 4 ICCES 160 170 A 2, 4 ICCAPS 160 170 A 3, 4 NOTE: 1. C_CRE ball HIGH, CR4 bit in the CellularRAM refresh configuration register set to zero. Measured at 25C, this standby current is the sum of the Flash standby current and the CellularRAM deep-power down mode current. 2. ICCES and ICCWS values are valid when the device is deselected. Any READ operation performed while in suspend mode will have an additional current draw of suspend current. 3. Automatic power save (APS) mode reduces ICC to approximately ICCS levels. 4. Currents are measured using CellularRAM full array self-refresh. Currents may be further reduced by using the TCR or PAR features. Table 8: CFI It is important to note that the specifications contained in this document supersede the specifications listed in the referenced individual Flash and CellularRAM data sheets. OFFSET 78 DATA DESCRIPTION 32Mb: 0020 CellularRAM Density 64Mb: 0040 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 13 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc. 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Figure 5: 77-Ball FBGA 1.025 0.075 SEATING PLANE C SOLDER BALL MATERIAL: EUTECTIC 62% Sn, 36% Pb, 2% Ag SUBSTRATE: PLASTIC LAMINATE MOLD COMPOUND: EPOXY NOVOLAC 0.10 C 77X 0.35 SOLDER BALL DIAMETER REFERS TO POST REFLOW CONDITION. THE PRE-REFLOW DIAMETER IS O 0.35mm ON A 0.30mm SMD BALL PAD. 5.60 BALL A1 ID BALL A1 0.80 TYP BALL A1 ID 5.00 0.05 BALL A8 7.20 10.00 0.10 CL 3.60 0.05 0.80 TYP CL 2.80 0.05 4.00 0.05 1.40 MAX 8.00 0.10 NOTE: 1. All dimensions in millimeters. Data Sheet Designation Production: This data sheet contains minimum and maximum limits specified over the complete power supply and temperature range for production devices. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. For additional documentation concerning Flash and CellularRAM features, functional descriptions, programming, and timing, please refer to the table below. Table 9: References DEVICE Flash CellularRAM PART NUMBER LINK MT28F644W18/W30 MT45W2MW16BFB, MT45W2ML16BFB, MT45M4MW16BFB, MT45W4ML16BFB www.micron.com/flash www.micron.com/cellularram (R) 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc. CellularRAM is a trademark of Micron Technology, Inc., inside the U.S. and a trademark of Infineon Technologies outside the U.S. All other trademarks are the property of their respective owners. 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 14 Micron Technology, Inc., reserves the right to change products or specifications without notice.. (c)2004 Micron Technology, Inc 128Mb MULTIBANK BURST FLASH 32Mb/64Mb BURST CellularRAM COMBO Revision History Rev C, Production............................................................................................................................................................2/04 * Removed Preliminary status/designation * Updated standby current specifications in the DC Characteristics Table Rev B, Preliminary .........................................................................................................................................................11/03 Original document, Rev. A, Preview...............................................................................................................................8/03 09005aef80df9a45 MT28C128564W18E.fm - Rev. C Pub 2/04 EN 15 Micron Technology, Inc., reserves the right to change products or specifications without notice. (c)2004 Micron Technology. Inc.