QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER QS5805/A/B FEATURES: DESCRIPTION - - - - - The QS5805 clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of five non-inverting outputs. The QS5805 device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals. - - 10 CMOS outputs Monitor output Rail-to-rail output voltage swing Input hysteresis for better noise margin Guaranteed low skew: * 0.7ns output skew (same bank) * 0.8ns output skew (different banks) * 1.2ns part-to-part skew Std., A, and B speed grades Available in QSOP and SOIC packages The QS5805 is characterized for operation at -40C to +85C. FUNCTIONAL BLOCK DIAGRAM OE A 5 OA 5 IN A OA 1 MON 5 IN B OB 5 OB 1 OE B INDUSTRIAL TEMPERATURE RANGE JULY 2000 1 c 1999 Integrated Device Technology, Inc. DSC-4579/- QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (1) Symbol Description Max. Unit VTERM(2) Supply Voltage to Ground - 0.5 to +7 V V C CA 1 20 V C CB DC Output Voltage VOUT - 0.5 to +7 V OA1 2 19 O B1 VTERM(3) DC Input Voltage VIN - 0.5 to +7 V OA2 3 18 O B2 VAC AC Input Voltage (pulse width 20ns) -3 V OA3 4 17 O B3 IOUT DC Output Current VIN < 0 -20 mA DC Output Current Max. Sink Current/Pin 120 mA GND A 5 OA4 6 SO 20-2 16 SO 20-8 15 OA5 7 14 O B5 GNDQ 8 13 MON OEA 9 12 O EB INA 10 11 INB G ND B O B4 TSTG Storage Temperature - 65 to +150 C TJ Junction Temperature 150 C NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc Terminals. 3. All terminals except Vcc. QSOP/ SOIC TOP VIEW CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V) QSOP SOIC Pins CIN Typ. 4 Max. (1) 6 Typ. 5 Max. (1) 7 Unit pF COUT 7 9 7 9 pF NOTE: 1. This parameter is guaranteed but not production tested. PIN DESCRIPTION 2 Pin Names OEA, OEB I/O I Description Output Enable Inputs INA, INB I Clock Inputs OAn, OBn O Clock Outputs MON O Monitor Outputs (non-disable) QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10%, VHC = VCC - 0.2V, VLC = 0.2V Symbol VIH Parameter Input HIGH Voltage Test Conditions Guaranteed Logic HIGH for All Inputs Min. 2 Typ.(1) -- Max. -- Unit V VIL Input LOW Voltage Guaranteed Logic LOW for All Inputs -- -- 0.8 V VIC Clamp Diode Voltage (3) Vcc = Min., IIN = -18mA -- -0.7 -1.2 V VOH Output HIGH Voltage Vcc = Min., VIN = VIH or VIL, IOH = -300A VHC Vcc -- Vcc = Min., VIN = VIH or VIL, IOH = -15mA 3.6 4.3 -- Vcc = Min., VIN = VIH or VIL, IOH = -24mA 2.4 3.8 -- Vcc = Min., VIN = VIH or VIL, IOL = 300A -- GND VLC Vcc = Min., VIN = VIH or VIL, IOL = 64mA -- 0.3 0.55 Vcc = Max., VIN = Vcc or GND -- -- 1 A VOL Output LOW Voltage V V IIN Input Leakage Current IOZ Output Leakage Current Vcc = Max., VOUT = Vcc or GND -- -- 1 A IOFF Input Power Off Leakage Vcc = 0V, VIN = Vcc or GND -- -- 1 A Vcc = Max., VOUT = GND -60 -- -- mA VTLH - VTHL for All Inputs -- 0.2 -- V IOS Short Circuit Current VT Input Hysteresis (2,3) NOTES: 1. Typical values are at VCC = 5.0V, TA = 25C. 2. Not more than one output should be used to test this high power condition. Duration is less than one second. 3. Guaranteed by design but not tested. POWER SUPPLY CHARACTERISTICS Parameter Quiescent Power Supply Current Test Conditions (1) VCC = Max., VIN = GND or Vcc ICC Supply Current per Input HIGH ICCD Dynamic Power Supply Current per Output (2) IC Total Supply Current Examples (2,4) Symbol ICC Typ. (3) 0.005 Max. 0.5 Unit mA VCC = Max., VIN = 3.4V 0.5 2.5 mA VCC = Max., OEA = OEB = GND Outputs Enabled, 50% duty cycle VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 10MHz Five outputs toggling VCC = Max., OEA = OEB = GND 50% duty cycle, fI = 2.5MHz All outputs toggling 0.1 0.2 mA/MHz VIN = GND or Vcc 8.5 15.5 VIN = GND or 3.4V 9 16.8 mA VIN = GND or Vcc 5 8.8 VIN = GND or 3.4V 6 11.3 NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Guaranteed by design but not tested. CL = 0pF. 3. Typical values are for reference only. Conditions are VCC = 5.0V, TA = 25C. 4. IC = ICC + (ICC)(DH)(NT) + ICCD (fO)(NO) where: DH = Input Duty Cycle NT = Number of TTL HIGH inputs at DH fO = Output Frequency NO = Number of outputs at fO 3 QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE SKEW CHARACTERISTICS OVER OPERATING RANGE TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF, RLOAD = 500 unless otherwise noted. QS5805 Parameter (1) Symbol QS5805A QS5805B Min. Max. Min. Max. Min. Max. Unit tSK(01) Skew between all outputs, same transition, same bank -- 0.7 -- 0.7 -- 0.7 ns tSK(02) Skew between outputs of all banks, same transition -- 0.8 -- 0.8 -- 0.8 ns tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH) -- 1 -- 1 -- 1 ns tSK(T) Part-to-part skew (2) -- 1.5 -- 1.5 -- 1.2 ns NOTES: 1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters are measured at 0.5Vcc. 2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade. SWITCHING CHARACTERISTICS OVER OPERATING RANGE TA = -40C to +85C, VCC = 5.0V 10% CLOAD = 50pF, RLOAD = 500 unless otherwise noted. QS5805 Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tR tF Parameter (1) Max. Min. Max. Min. Max. Unit 1.5 5.6 1.5 5.3 1.5 5 ns 1.5 8 1.5 8 1.5 7 ns 1.5 7 1.5 7 1.5 6 ns 0.8V to 2V (3) -- 1.5 -- 1.5 -- 1.5 ns 0.2Vcc to 0.8Vcc -- 3 -- 3 -- 3 ns 0.8V to 2V (3) -- 1.5 -- 1.5 -- 1.5 ns 0.2Vcc to 0.8Vcc -- 3 -- 3 -- 3 ns Output Disable Time Output Fall Time QS5805B Min. Propagation Delay (2) INA to OAn, INB to OBn Output Enable Time Output Rise Time QS5805A NOTES: 1. Minimums guaranteed but not production tested. Timing parameters are measured at 0.5Vcc. 2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation delays do not imply limit skew. 3. This parameter is guaranteed but not production tested. 4 QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS Parameter Tested Switch Position tPLZ, tPZL Closed All Others Open 500 V CC 7.0 V V IN V OUT Pulse Generator DUT 50 50pF 500 Pulse generator for all pulses: f 1.0MHz; tF 2.5ns; tR 2.5ns PROPAGATION DELAY PULSE SKEW -- tSK(P) 3V 3V 1.5V INPUT 0V tPLH 1.5V INPUT tPHL 0V VOH 2.0V 0.5Vcc 0.8V VOL OUPUT tR tPHL tPLH VOH OUPUT 0.5Vcc VOL tF tSK(p) = t PHL - tPLH OUTPUT SKEW (SAME BANK) -- tSK(O1) OUPUT SKEW (DIFFERENT BANKS) -- tSK(O2) 3V 3V 1.5V INPUT 1.5V INPUT 0V 0V tPHL1 tPLH1 tPHLA tPLHA VOH OUPUT 1 VOH OUPUT A 0.5Vcc 0.5Vcc VOL tSK(01) tSK(01) VOL OUPUT 2 tSK(02) tSK(02) VOH OUPUT B 0.5Vcc 0.5Vcc VOL VOL tPLH2 tPLHB tPHL2 tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1 tPHLB tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA PART-TO-PART SKEW -- tSK(T) ENABLE AND DISABLE TIMES ENABLE DISABLE 3V 3V CONTROL INPUT 1.5V 0V tPLH1 tPLZ tPHL1 VOH 3V SWITCH CLOSED PART 1 OUTPUT 1.5V VOL tPHZ tSK(t) 0.3V VOH SWITCH OPEN 0.5Vcc 0.3V V OL tPZH OUTPUT NORMALLY HIGH 1.5V INPUT 0V tPZL OUTPUT NORMALLY LOW VOH 1.5V tSK(t) PART 2 OUTPUT VOH 0.5Vcc VOL 0V tPLH2 tPHL2 tSK(t) = t PLH2 - tPLH1 or tPHL2 - tPHL1 5 QS5805/A/B GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION QS XXXX XX Device Type Package Q SO Quarter Size Small Outline Pacakge (SO20-8) Small Outline IC (SO20-2) 5805 5805A 5805B Guaranteed Low Skew CMOS Clock Driver/Buffer CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com* *To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc. 6