HCPL-3700 AC/DC to Logic Interface Optocoupler tm Features Description AC or DC input The HCPL-3700 voltage/current threshold detection optocoupler consists of an AlGaAs LED connected to a threshold sensing input buffer IC which are optically coupled to a high gain darlington output. The input buffer chip is capable of controlling threshold levels over a wide range of input voltages with a single resistor. The output is TTL and CMOS compatible. Programmable sense voltage Logic level compatibility Threshold guaranteed over temperature (0C to 70C) OptoplanarTM construction for high common mode immunity UL recognized (file # E90700) VDE certified - ordering option `V', e.g., HCPL3700V Applications Low voltage detection 5 V to 240 V AC/DC voltage sensing Relay contact monitor Current sensing Microprocessor Interface Industrial controls Schematic Package AC 1 8 VCC DC+ 2 7 NC DC- 3 6 VO AC 4 5 GND 8 1 8 8 1 TRUTH TABLE (Positive Logic) Input Output H L L H A 0.1 F bypass capacitor must be connected between pins 8 and 5. (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 AC/DC POWER GND 1 1 RX HCPL-3700 LOGIC GND 2 www.fairchildsemi.com HCPL-3700 AC/DC to Logic Interface Optocoupler April 2007 Symbol Parameter Value Units TSTG Storage Temperature -55 to +125 C TOPR Operating Temperature -40 to +85 C TSOL Lead Solder Temperature 260 for 10 sec C Average 50 (Max.) mA Surge, 3ms, 120Hz Pulse Rate 140 (Max.) Transient, 10s, 120Hz Pulse Rate 500 (Max.) EMITTER IIN Input Current VIN Input Voltage (Pins 2-3) -0.5 (Max.) V PIN Input Power Dissipation(1) 230 (Max.) mW PT Total Package Power Dissipation(2) 305 (Max.) mW Output Current (Average)(3) 30 (Max.) mA VCC Supply Voltage (Pins 8-5) -0.5 to 20 V VO Output Voltage (Pins 6-5) -0.5 to 20 V 210 (Max.) mW DETECTOR IO PO Output Power Dissipation(4) Notes: 1. Derate linearly above 70C free-air temperature at a rate of 1.8 mW/C. 2. Derate linearly above 70C free-air temperature at a rate of 2.5 mW/C. 3. Derate linearly above 70C free-air temperature at a rate of 0.6 mA/C. 4. Derate linearly above 70C free-air temperature at a rate of 1.9 mW/C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC TA f Min. Max. Units Supply Voltage Parameter 2 18 V Operating Temperature 0 70 C Operating Frequency 0 4 kHz (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 2 HCPL-3700 AC/DC to Logic Interface Optocoupler Absolute Maximum Ratings (No derating required up to 70C) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol ITH+ Parameter Input Threshold Current Input Threshold Voltage DC (Pins 2,3) VTH- VTH+ AC (Pins 1,4) VTH- IHYS Hysteresis VHYS VIHC1 Min. Typ. Max. Unit 1.96 2.4 3.11 mA 1.00 1.2 1.62 mA VIN = V2 - V3 (Pins 1 & 4 Open) VCC = 4.5 V, VO = 0.4V(5) IO 4.2mA 3.35 3.8 4.05 V VIN = V2 - V3 (Pins 1 & 4 Open) VCC = 4.5 V, VO = 2.4 V(5) IO 100A 2.01 2.5 2.86 V |VIN = V1 - V4| (Pins 2 & 3 Open) VCC = 4.5 V, VO = 0.4 V(5) IO 4.2 mA 4.23 5.0 5.50 V |VIN = |V1 - V4| (Pins 2 & 3 Open) VCC = 4.5 V, VO = 2.4 V(5) IO 100A 2.87 3.7 4.20 V VIN = VTH+, VCC = 4.5 V VO = 0.4 V, IO ITHVTH+ Test Conditions IHYS = ITH+ - ITH- 1.2 mA VHYS = VTH+ - VTH- 1.3 V VIHC1 = V2 - V3, V3 = GND IIN = 10 mA, Pins 1 & 4 connected to Pin 3 5.4 6.3 6.6 V VIHC2 VIHC2 = |V1 - V4|, |IIN| = 10mA (Pins 2 & 3 Open) 6.1 7.0 7.3 V VIHC3 VIHC3 = V2 - V3, V3 = GND, IIN = 15mA (Pins 1 & 4 Open) 12.5 13.4 V VILC VILC = V2 - V3, V3 = GND, IIN = -10mA -0.75 IIN VD1,2 VD3,4 VOL Input Clamp Voltage 4.2mA(5) Input Current VIN = V2 - V3 = 5.0V (Pins 1 & 4 Open) Bridge Diode Forward Voltage IIN = 3mA Logic LOW Output Voltage IIN = 3mA VCC = 4.5 V, IOL = 4.2mA(5) 3.0 3.7 V 4.4 mA 0.65 V 0.65 V 0.04 18V(5) 0.4 V IOH Logic HIGH Output Current VOH = VCC = 100 A ICCL Logic LOW Supply Current V2 - V3 = 5.0V, VO = Open, VCC = 5V 1.0 4 mA ICCH Logic HIGH Supply Current VCC = 18V, VO = Open 0.01 4 A CIN Input Capacitance f = 1MHz, VIN = 0V (Pins 2 & 3, Pins 1 & 4 Open) 50 pF Note: 5. Logic LOW output level at pin 6 occurs when VIN VTH+ and when VIN > VTH- once VIN exceeds VTH+. Logic HIGH output level at pin 6 occurs when VIN VTH- and when VIN < VTH+ once VIN decreases below VTH-. (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 3 HCPL-3700 AC/DC to Logic Interface Optocoupler Electrical Characteristics (TA = 0C to 70C Unless otherwise specified) Symbol AC Characteristics Test Conditions Typ. Max. Unit 30pF(6) Min. 6.0 15 s 25.0 40 s TPHL Propagation Delay Time (to Output Low Level) RL = 4.7k, CL = TPLH Propagation Delay Time (to Output High Level) RL = 4.7k, CL = 30pF(6) tr Output Rise Time (10-90%) RL = 4.7k, CL = 30pF 45 s tf Output Fall Time (90-10%) RL = 4.7k, CL = 30pF 0.5 s |CMH| Common Mode Transient Immunity (at Output High Level) IIN = 0 mA, RL = 4.7k, VO min = 2.0 V, VCM = 1400V(7)(8) 4000 V/s |CML| Common Mode Transient Immunity (at Output Low Level) IN = 3.11mA, RL = 4.7k, VO max = 0.8V, VCM = 140V(7)(8) 600 V/s Package Characteristics (TA = 0C to 70C Unless otherwise specified) Symbol Characteristics Test Conditions Min. 2500 VISO Withstand Insulation Voltage Relative humidity < 50%, TA = 25C, t = 1 min, II-O 2A(9)(10) RI-O Resistance (input to output) VIO = 500Vdc(9) CI-O Capacitance (input to output) f = 1MHz, VIO = 0Vdc Typ. Max. Unit VRMS 1012 0.6 pF Notes: 6. TPHL propagation delay is measured from the 2.5V level of the leading edge of a 5.0V input pulse (1s rise time) to the 1.5 V level on the leading edge of the output pulse. TPLH propagation delay is measured on the trailing edges of the input and output pulse. (Refer to Fig. 9) 7. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO < 0.8 V). Refer to Fig. 10. 8. In applications where dVcm/dt may exceed 50,000 V/s (Such as static discharge), a series resistor, RCC, should be included to protect the detector chip from destructive surge currents. The recommended value for RCC is 240V per volt of allowable drop in VCC (between pin 8 and VCC) with a minimum value of 240. 9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 10. The 2500 VRMS/1 min. capability is validated by a 3.0 kVRMS/1 sec. dielectric voltage withstand test. 11. AC voltage is instantaneous voltage for VTH+ & VTH-. 12. All typicals at TA = 25C, VCC = 5V unless otherwise specified. (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 4 HCPL-3700 AC/DC to Logic Interface Optocoupler Switching Characteristics (TA = 25C, VCC = 5 V Unless otherwise specified) Fig. 2 Input Current vs. Input Voltage 4.0 50 3.5 45 DC (Pins 1,2 shorted together pins 3,4 shorted together) 40 IIN - INPUT CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 30 25 20 15 10 5 0 0.5 AC (pins 2 & 3 Open) -5 0.0 -10 6 8 10 12 14 16 18 20 0 2 4 VCC - OPERATING SUPPLY VOLTAGE (V) 8 10 12 14 Fig. 4 Current Threshold/Voltage Threshold vs. Temperature Fig. 3 Input Current/Low Level Output Voltage vs. Temperature 120 4.2 3.2 4.0 110 4.0 3.0 3.8 100 3.6 90 IIN VIN = 5.0 V (PINS 2 and 3) VCC = 5.0 V 3.4 3.2 80 70 3.0 60 2.8 50 2.6 40 VOL VCC = 5.0 V IOL = 4.2 mA 2.4 2.2 30 20 2.0 1.8 -40 10 -20 0 25 45 VTH(DC) - VOLTAGE THRESHOLD (V) 4.2 VOL (mV) Input Current, IIN (mA) 6 VIN - INPUT VOLTAGE (V) 2.8 VTH+ 3.6 2.6 3.4 2.4 3.2 2.2 ITH+ 3.0 2.0 2.8 1.8 2.6 1.6 VTH- 2.4 1.4 2.2 1.2 ITH- 2.0 1.0 1.8 0 85 65 3.8 ITH(DC) - CURRENT THRESHOLD (mA) 4 0.8 -40 -20 0 25 45 65 85 TA - TEMPERATURE (C) TA - TEMPERATURE (C) Fig. 5 Propagation Delay vs. Temperature Fig. 6 Rise and Fall Time vs. Temperature 70 100 0.8 90 60 0.7 Tf 80 0.6 50 Tr - RISE TIME (s) TP - PROPAGATION DELAY (s) DC (Pins 1 & 4 Open) 35 40 TPLH 30 TPHL 20 70 0.5 60 50 0.4 40 0.3 30 Tf - FALL TIME (s) ICCL - LOGIC LOW SUPPLY CURRENT (mA) Fig. 1 Logic Low Supply Current vs. Operating Supply Voltage 0.2 20 10 Tr 0.1 10 0 -60 -40 -20 0 20 40 60 80 0 -40 100 TA - TEMPERATURE (C) (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 0.0 -20 0 25 45 65 85 TA - TEMPERATURE (C) www.fairchildsemi.com 5 HCPL-3700 AC/DC to Logic Interface Optocoupler Typical Performance Curves V+/V- -EXTERNAL THRESHOLD VOLTAGE (V) Fig. 8 External Threshold Characteristics V+/V- vs. Rx ICCH - LOGIC HIGH SUPPLY CURRENT (nA) 1000 VCC = 18 V VO = OPEN IIN = 0 mA 100 10 1 -60 -40 -20 0 20 40 60 80 100 V- (AC) V+ (AC) 250 200 V+ (DC) 150 100 V- (DC) 50 0 0 40 80 120 160 200 240 RX - EXTERNAL SERIES RESISTOR (K) TA - TEMPERATURE (C) (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 300 www.fairchildsemi.com 6 HCPL-3700 AC/DC to Logic Interface Optocoupler Fig. 7 Logic High Supply Current vs. Temperature 5V 1 AC Pulse Generator tr = 5ns Z O= 50 VCC 8 2 DC+ 3 DC4 AC 7 VO .1uf bypass 2.5V Input (VIN) RL 0V t PHL Output 6 t PLH (VO ) VO Output (VO ) GND 5 90% 10% 90% 10% 1.5 V VOL tr tf VIN Pulse Amplitude = 50 V Pulse Width = 1 ms f = 100 Hz Tr = Tf = 1.0 s (10 - 90%) Fig. 9. Switching Test Circuit VCM H I IN RCC* 1 AC A B 2 DC+ 3 DC- VFF 4 AC VCM L +5V VCC 8 7 VO .1uf bypass RL VCM (VO ) GND 5 CL** + 5V Output 6 5V CM H VO Switching Pos. (A) I IN = 0 mA VO (Min) VCM * SEE NOTE 8 Pulse Gen VO (Max) ** CL IS 30 pF, WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE VO Switching Pos. (B) I IN = 3.11 mA VOL CM L Fig. 10. Test Circuit for Common Mode Transient Immunity and Typical Waveforms (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 7 HCPL-3700 AC/DC to Logic Interface Optocoupler +5V Through Hole 0.4" Lead Spacing PIN 1 ID. 4 3 2 PIN 1 ID. 1 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 0.270 (6.86) 0.250 (6.35) 8 5 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 6 7 8 0.390 (9.91) 0.370 (9.40) SEATING PLANE SEATING PLANE 0.390 (9.91) 0.370 (9.40) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0.070 (1.78) 0.045 (1.14) 0.004 (0.10) MIN 0.200 (5.08) 0.140 (3.55) 15 MAX 0.154 (3.90) 0.120 (3.05) 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP Surface Mount Recommended Pad Layout for Surface Mount Leadforms 0.390 (9.91) 0.370 (9.40) 4 3 2 1 PIN 1 ID. 0.070 (1.78) 0.270 (6.86) 0.250 (6.35) 5 6 7 0 to 15 0.400 (10.16) TYP 0.060 (1.52) 8 0.100 (2.54) 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX 0.295 (7.49) 0.300 (7.62) TYP 0.415 (10.54) 0.030 (0.76) 0.016 (0.41) 0.008 (0.20) 0.045 [1.14] 0.315 (8.00) MIN 0.405 (10.30) MIN Note: All dimensions are in inches (millimeters) (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 8 HCPL-3700 AC/DC to Logic Interface Optocoupler Package Dimensions Option Example Part Number No Suffix HCPL3700 S HCPL3700S SD HCPL3700SD Surface Mount; Tape and Reel W HCPL3700W 0.4" Lead Spacing V HCPL3700V VDE0884 WV HCPL3700WV SV HCPL3700SV SDV HCPL3700SDV Description Shipped in Tubes Surface Mount Lead Bend VDE0884; 0.4" Lead Spacing VDE0884; Surface Mount VDE0884; Surface Mount; Tape and Reel Marking Information 1 V 3 3700 2 XX YY T1 6 4 5 Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) 4 Two digit year code, e.g., `07' 5 Two digit work week ranging from `01' to `53' 6 Assembly package code (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 9 HCPL-3700 AC/DC to Logic Interface Optocoupler Ordering Information 12.0 0.1 4.0 0.1 4.90 0.20 O1.55 0.05 4.0 0.1 0.30 0.05 1.75 0.10 7.5 0.1 16.0 0 13.2 0.2 10.30 0.20 O1.6 0.1 10.30 0.20 0.1 MAX User Direction of Feed Reflow Profile Temperature (C) 300 215 C, 10-30 s 250 225 C peak 200 150 Time above 183C, 60-150 sec 100 50 Ramp up = 3C/sec 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) * Peak reflow temperature: 225C (package surface temperature) * Time of temperature higher than 183C for 60-150 seconds * One time soldering reflow is recommended (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 10 HCPL-3700 AC/DC to Logic Interface Optocoupler Carrier Tape Specifications (R) ACEx Across the board. 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FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I25 (c)2005 Fairchild Semiconductor Corporation HCPL-3700 Rev. 1.0.1 www.fairchildsemi.com 11 HCPL-3700 AC/DC to Logic Interface Optocoupler TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.